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authorru <ru@FreeBSD.org>2004-07-03 18:29:24 +0000
committerru <ru@FreeBSD.org>2004-07-03 18:29:24 +0000
commit1cf159866714352fd8d7789b97068220cbb5a1a4 (patch)
tree5526e5113f4e9589bb734483867453b89a7ca4e6 /share/man/man4/man4.i386/perfmon.4
parentbf15efbfc56854d6fb20bb4ff7801d7549fe2bfd (diff)
downloadFreeBSD-src-1cf159866714352fd8d7789b97068220cbb5a1a4.zip
FreeBSD-src-1cf159866714352fd8d7789b97068220cbb5a1a4.tar.gz
Mechanically kill hard sentence breaks and double whitespaces.
Diffstat (limited to 'share/man/man4/man4.i386/perfmon.4')
-rw-r--r--share/man/man4/man4.i386/perfmon.427
1 files changed, 18 insertions, 9 deletions
diff --git a/share/man/man4/man4.i386/perfmon.4 b/share/man/man4/man4.i386/perfmon.4
index 2791382..f39ed07 100644
--- a/share/man/man4/man4.i386/perfmon.4
+++ b/share/man/man4/man4.i386/perfmon.4
@@ -46,7 +46,8 @@ capabilities of the
.Tn Pentium
and
.Tn "Pentium Pro"
-CPUs. These processors implement two internal counters which can be
+CPUs.
+These processors implement two internal counters which can be
configured to measure a variety of events for either count or duration
(in CPU cycles), as well as a cycle counter which counts clock cycles.
The
@@ -67,7 +68,8 @@ and
processors.
.Pp
.Sy NOTA BENE :
-The set of available events differs from processor to processor. It
+The set of available events differs from processor to processor.
+It
is the responsibility of the programmer to ensure that the event
numbers used are the correct ones for the CPU type being measured.
.Pp
@@ -119,22 +121,27 @@ returns the current configuration of the specified counter.
.It Dv PMIOSTART
.It Dv PMIOSTOP
.Pq Li int
-starts (stops) the specified counter. Due to hardware deficiencies,
-counters must be started and stopped in numerical order. (That is to
+starts (stops) the specified counter.
+Due to hardware deficiencies,
+counters must be started and stopped in numerical order.
+(That is to
say, counter 0 can never be stopped without first stopping counter 1.)
The driver will
.Em not
enforce this restriction (since it may not be present in future CPUs).
.It Dv PMIORESET
.Pq Li int
-reset the specified counter to zero. The counter should be stopped
+reset the specified counter to zero.
+The counter should be stopped
with
.Dv PMIOSTOP
-before it is reset. All counters are automatically reset by
+before it is reset.
+All counters are automatically reset by
.Dv PMIOSETUP .
.It Dv PMIOREAD
.Pq Li "struct pmc_data"
-get the current value of the counter. The
+get the current value of the counter.
+The
.Li pmc_data
structure defines two fields:
.Pp
@@ -152,7 +159,8 @@ instruction on
processors to read the counters directly.
.It Dv PMIOTSTAMP
.Pq Li "struct pmc_tstamp"
-read the time stamp counter. The
+read the time stamp counter.
+The
.Li pmc_tstamp
structure defines two fields:
.Pp
@@ -166,7 +174,8 @@ the current value of the counter as a 64-bit integer
It is important to note that the counter rate, as provided in the
.Li pmct_rate
field, is often incorrect because of calibration difficulties and
-non-integral clock rates. This field should be considered more of a
+non-integral clock rates.
+This field should be considered more of a
hint or sanity-check than an actual representation of the rate of
clock ticks.
.El
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