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authorben <ben@FreeBSD.org>2000-11-18 20:18:34 +0000
committerben <ben@FreeBSD.org>2000-11-18 20:18:34 +0000
commit0927c1e22a157887aa8615a67187be275cfbeef0 (patch)
tree7882630e27481b1cc1c94a3e18a72feaa7d0f5ad /share/man/man4/iicbus.4
parent7b2462e42511c2cb2ee66df009cb0ddbf74cb4b5 (diff)
downloadFreeBSD-src-0927c1e22a157887aa8615a67187be275cfbeef0.zip
FreeBSD-src-0927c1e22a157887aa8615a67187be275cfbeef0.tar.gz
Fix typos.
PR: 22922 Submitted by: Jimmy Olgeni <olgeni@uli.it>
Diffstat (limited to 'share/man/man4/iicbus.4')
-rw-r--r--share/man/man4/iicbus.46
1 files changed, 3 insertions, 3 deletions
diff --git a/share/man/man4/iicbus.4 b/share/man/man4/iicbus.4
index 3b494de..7c0e874 100644
--- a/share/man/man4/iicbus.4
+++ b/share/man/man4/iicbus.4
@@ -59,11 +59,11 @@ Serial DAta line and SCL is the Serial CLock line.
Every component hooked up to the bus has its own unique address whether it
is a CPU, LCD driver, memory, or complex function chip.
Each of these chips
-can act as a receiver and/or transmitter depending on it's functionality.
+can act as a receiver and/or transmitter depending on its functionality.
Obviously an LCD driver is only a receiver, while a memory or I/O chip can
both be transmitter and receiver.
Furthermore there may be one or
-more BUS MASTER's.
+more BUS MASTERs.
The BUS MASTER is the chip issuing the commands on the BUS.
In the I2C protocol
@@ -92,7 +92,7 @@ Hardware interfaces are more intelligent and receive
8-bit characters they write to the bus according to the I2C protocol.
I2C interfaces may act on the bus as slave devices, allowing spontaneous
-bidirectional communications, thanks to the mutli-master capabilities of the
+bidirectional communications, thanks to the multi-master capabilities of the
I2C protocol.
Some I2C interfaces are available:
OpenPOWER on IntegriCloud