Add references to new device support.

Add information on target mode.

Add more entries to the bugs sections (all having to do with target mode).

1 files changed, 79 insertions, 30 deletions

diff --git a/share/man/man4/ahc.4 b/share/man/man4/ahc.4
index c114f7a..cb102f1 100644
--- a/share/man/man4/ahc.4
+++ b/share/man/man4/ahc.4
@@ -1,5 +1,5 @@
 .\"
-.\" Copyright (c) 1995, 1996, 1997, 1998
+.\" Copyright (c) 1995, 1996, 1997, 1998, 2000
 .\" 	Justin T. Gibbs.  All rights reserved.
 .\"
 .\" Redistribution and use in source and binary forms, with or without
@@ -26,7 +26,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd October 15, 1998
+.Dd February 13, 2000
 .Dt AHC 4
 .Os FreeBSD
 .Sh NAME
@@ -44,6 +44,9 @@ For one or more PCI cards:
 To allow PCI adapters to use memory mapped I/O if enabled:
 .Cd options AHC_ALLOW_MEMIO
 .Pp
+To configure one or more controllers to assume the target role:
+.Cd options AHC_TMODE_ENABLE <bitmask of units>
+.Pp
 For one or more SCSI busses:
 .Cd device scbus0 at ahc0
 .Sh DESCRIPTION
@@ -57,27 +60,36 @@ bus(es) connected to Adaptec
 .Tn AIC7880,
 .Tn AIC7890,
 .Tn AIC7891,
+.Tn AIC7892,
 .Tn AIC7895,
 .Tn AIC7896,
-or
 .Tn AIC7897
+and
+.Tn AIC7899
 host adapter chips.
 These chips are found on many motherboards as well as the following
 Adaptec SCSI controller cards:
 .Tn 274X(W),
 .Tn 274X(T),
 .Tn 284X,
-.Tn 2920C,
+.Tn 2910,
+.Tn 2915,
+.Tn 2920,
+.Tn 2930C,
 .Tn 2930U2,
 .Tn 2940,
 .Tn 2940U,
 .Tn 2940AU,
 .Tn 2940UW,
 .Tn 2940UW Dual,
+.Tn 2940UW Pro,
 .Tn 2940U2W,
 .Tn 2940U2B,
 .Tn 2950U2W,
 .Tn 2950U2B,
+.Tn 19160B,
+.Tn 29160B,
+.Tn 29160N,
 .Tn 3940,
 .Tn 3940U,
 .Tn 3940AU,
@@ -85,13 +97,15 @@ Adaptec SCSI controller cards:
 .Tn 3940AUW,
 .Tn 3940U2W,
 .Tn 3950U2,
+.Tn 3960,
+.Tn 39160,
+.Tn 3985,
 and
-.Tn 3985.
+.Tn 4944UW.
 .Pp
 Driver features include support for twin and wide busses,
-fast, ultra and ultra2 synchronous transfers depending on controller type,
-tagged queuing,
-and SCB paging.
+fast, ultra or ultra2 synchronous transfers depending on controller type,
+tagged queuing, SCB paging, and target mode.
 .Pp
 Memory mapped I/O can be enabled for PCI devices with the
 .Dq Dv AHC_ALLOW_MEMIO
@@ -101,12 +115,19 @@ Most PCI BIOSes will map devices so that either technique for communicating
 with the card is available.
 In some cases,
 usually when the PCI device is sitting behind a PCI->PCI bridge,
-the BIOS fails to properly initialize the chip for memory mapped I/O.
-The symptom of this problem is usually a system hang if memory mapped I/O
+the BIOS may fail to properly initialize the chip for memory mapped I/O.
+The typical symptom of this problem is a system hang if memory mapped I/O
 is attempted.
 Most modern motherboards perform the initialization correctly and work fine
 with this option enabled.
 .Pp
+Individual controllers may be configured to operate in the target role
+through the 
+.Dq Dv AHC_TMODE_ENABLE
+configuration option.  The value assigned to this option should be a bitmap
+of all units where target mode is desired.
+For example, a value of 0x25, would enable target mode on units 0, 2, and 5. 
+.Pp
 Per target configuration performed in the 
 .Tn SCSI-Select
 menu, accessible at boot
@@ -118,12 +139,10 @@ or through an
 configuration utility for 
 .Tn EISA
 models,
-is honored by this driver with the stipulation that the 
-.Tn BIOS
-must be enabled for 
-.Tn EISA
-adaptors.  This includes synchronous/asynchronous transfers,
+is honored by this driver.
+This includes synchronous/asynchronous transfers,
 maximum synchronous negotiation rate,
+wide transfers,
 disconnection,
 the host adapter's SCSI ID,
 and,
@@ -131,13 +150,21 @@ in the case of
 .Tn EISA
 Twin Channel controllers,
 the primary channel selection.
+For systems that store non-volatile settings in a system specific manner
+rather than a serial eeprom directly connected to the aic7xxx controller,
+the 
+.Tn BIOS
+must be enabled for the driver to access this information.
+This restriction applies to all
+.Tn EISA
+and many motherboard configurations.
 .Pp
 Note that I/O addresses are determined automatically by the probe routines,
 but care should be taken when using a 284x
 .Pq Tn VESA No local bus controller
 in an
 .Tn EISA 
-system.  Ensure that the jumpers setting the I/O area for the 284x match the 
+system.  The jumpers setting the I/O area for the 284x should match the 
 .Tn EISA
 slot into which the card is inserted to prevent conflicts with other
 .Tn EISA
@@ -159,11 +186,14 @@ aic7850     10    PCI/32     10MHz      8Bit     3
 aic7860     10    PCI/32     20MHz      8Bit     3
 aic7870     10    PCI/32     10MHz     16Bit    16
 aic7880     10    PCI/32     20MHz     16Bit    16 
-aic7890     20    PCI/32     40MHz     16Bit    16        3 4 5 6 7
-aic7891     20    PCI/64     40MHz     16Bit    16        3 4 5 6 7
+aic7890     20    PCI/32     40MHz     16Bit    16        3 4 5 6 7 8
+aic7891     20    PCI/64     40MHz     16Bit    16        3 4 5 6 7 8
+aic7892     20    PCI/64     80MHz     16Bit    16        3 4 5 6 7 8
 aic7895     15    PCI/32     20MHz     16Bit    16      2 3 4 5
-aic7896     20    PCI/32     40MHz     16Bit    16      2 3 4 5 6 7
-aic7897     20    PCI/64     40MHz     16Bit    16      2 3 4 5 6 7
+aic7895C    15    PCI/32     20MHz     16Bit    16      2 3 4 5     8
+aic7896     20    PCI/32     40MHz     16Bit    16      2 3 4 5 6 7 8
+aic7897     20    PCI/64     40MHz     16Bit    16      2 3 4 5 6 7 8
+aic7899     20    PCI/64     80MHz     16Bit    16      2 3 4 5 6 7 8
 .El 
 .Pp
 .Bl -enum -compact
@@ -185,6 +215,9 @@ style Scatter Gather Engine - Improves S/G prefetch performance.
 .It
 Queuing Registers - Allows queuing of new transactions without pausing the
 sequencer.
+.It
+Multiple Target IDs - Allows the controller to respond to selection as a
+target on multiple SCSI IDs.
 .El
 .Ed
 .Pp
@@ -194,16 +227,17 @@ Every transaction sent to a device on the SCSI bus is assigned a
 .Sq SCSI Control Block
 (SCB).  The SCB contains all of the information required by the
 controller to process a transaction.  The chip feature table lists
-the number of SCBs that can be stored in on chip memory.  All chips
+the number of SCBs that can be stored in on-chip memory.  All chips
 with model numbers greater than or equal to 7870 allow for the on chip
 SCB space to be augmented with external SRAM up to a maximum of 255 SCBs.
-Very few Adaptec controller have external SRAM.
-
-If external SRAM is not available, SCBs are a limited resource and
-using them in a straight forward manner would only allow us to
-keep as many transactions as there are SCBs outstanding at a time.
-This would not allow enough concurrency to fully utilize the SCSI
-bus and it's devices. The solution to this problem is
+Very few Adaptec controller configurations have external SRAM.
+.Pp
+If external SRAM is not available, SCBs are a limited resource.
+Using the SCBs in a straight forward manner would only allow the dirver to
+handle as many concurrent transactions as there are physical SCBs.
+To fully utilize the SCSI bus and the devices on it,
+requires much more concurrency.
+The solution to this problem is
 .Em SCB Paging ,
 a concept similar to memory paging.  SCB paging takes advantage of
 the fact that devices usually disconnect from the SCSI bus for long
@@ -227,8 +261,23 @@ Rev B in synchronous mode at 10MHz.  Controllers with this problem have a
 the drive and hangs the bus.  Setting a maximum synchronous negotiation rate
 of 8MHz in the 
 .Tn SCSI-Select
-utility
-will allow normal operation.
+utility will allow normal operation.
+.Pp
+Double Transition clocking is not yet supported for Ultra160 controllers.
+This limits these controllers to 40MHz or 80MB/s.
+.Pp
+Although the Ultra2 and Ultra160 products have sufficient instruction
+ram space to support both the initiator and target roles concurrently,
+this configuration is disabled in favor of allowing the target role
+to respond on multiple target ids.  A method for configuring dual
+role mode should be provided.
+.Pp
+Tagged Queuing is not supported in target mode.
+.Pp
+Reselection in target mode fails to function correctly on all high
+voltage differential boards as shipped by Adaptec.  Information on
+how to modify HVD board to work correctly in target mode is available
+from Adaptec.
 .Sh SEE ALSO
 .Xr aha 4 ,
 .Xr ahb 4 ,