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author | simon <simon@FreeBSD.org> | 2009-06-14 19:51:05 +0000 |
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committer | simon <simon@FreeBSD.org> | 2009-06-14 19:51:05 +0000 |
commit | c2624ed238285b10690b8008cd36e0d9aff09b0d (patch) | |
tree | c583a68a7b74a895df55b53bbd6b70432f5b3caa /secure/lib/libcrypto/man/OPENSSL_ia32cap.3 | |
parent | 55bfce5e08a8fe3ddb5834f27ad6d8e0172bc0c6 (diff) | |
download | FreeBSD-src-c2624ed238285b10690b8008cd36e0d9aff09b0d.zip FreeBSD-src-c2624ed238285b10690b8008cd36e0d9aff09b0d.tar.gz |
Regenerate manual pages for OpenSSL 0.9.8k.
Diffstat (limited to 'secure/lib/libcrypto/man/OPENSSL_ia32cap.3')
-rw-r--r-- | secure/lib/libcrypto/man/OPENSSL_ia32cap.3 | 40 |
1 files changed, 24 insertions, 16 deletions
diff --git a/secure/lib/libcrypto/man/OPENSSL_ia32cap.3 b/secure/lib/libcrypto/man/OPENSSL_ia32cap.3 index b8bf340..cb9137b 100644 --- a/secure/lib/libcrypto/man/OPENSSL_ia32cap.3 +++ b/secure/lib/libcrypto/man/OPENSSL_ia32cap.3 @@ -1,4 +1,4 @@ -.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.35 +.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.37 .\" .\" Standard preamble: .\" ======================================================================== @@ -129,7 +129,7 @@ .\" ======================================================================== .\" .IX Title "OPENSSL_ia32cap 3" -.TH OPENSSL_ia32cap 3 "2007-03-15" "0.9.8e" "OpenSSL" +.TH OPENSSL_ia32cap 3 "2009-06-14" "0.9.8k" "OpenSSL" .SH "NAME" OPENSSL_ia32cap \- finding the IA\-32 processor capabilities .SH "SYNOPSIS" @@ -146,17 +146,25 @@ register after executing \s-1CPUID\s0 instruction with EAX=1 input value (see Intel Application Note #241618). Naturally it's meaningful on IA\-32[E] platforms only. The variable is normally set up automatically upon toolkit initialization, but can be manipulated afterwards to modify -crypto library behaviour. For the moment of this writing three bits are -significant, namely bit #28 denoting Hyperthreading, which is used to -distinguish Intel P4 core, bit #26 denoting \s-1SSE2\s0 support, and bit #4 -denoting presence of Time-Stamp Counter. Clearing bit #26 at run-time -for example disables high-performance \s-1SSE2\s0 code present in the crypto -library. You might have to do this if target OpenSSL application is -executed on \s-1SSE2\s0 capable \s-1CPU\s0, but under control of \s-1OS\s0 which does not -support \s-1SSE2\s0 extentions. Even though you can manipulate the value -programmatically, you most likely will find it more appropriate to set -up an environment variable with the same name prior starting target -application, e.g. 'env OPENSSL_ia32cap=0x10 apps/openssl', to achieve -same effect without modifying the application source code. -Alternatively you can reconfigure the toolkit with no\-sse2 option and -recompile. +crypto library behaviour. For the moment of this writing six bits are +significant, namely: +.PP +1. bit #28 denoting Hyperthreading, which is used to distiguish + cores with shared cache; +2. bit #26 denoting \s-1SSE2\s0 support; +3. bit #25 denoting \s-1SSE\s0 support; +4. bit #23 denoting \s-1MMX\s0 support; +5. bit #20, reserved by Intel, is used to choose between \s-1RC4\s0 code + pathes; +6. bit #4 denoting presence of Time-Stamp Counter. +.PP +For example, clearing bit #26 at run-time disables high-performance +\&\s-1SSE2\s0 code present in the crypto library. You might have to do this if +target OpenSSL application is executed on \s-1SSE2\s0 capable \s-1CPU\s0, but under +control of \s-1OS\s0 which does not support \s-1SSE2\s0 extentions. Even though you +can manipulate the value programmatically, you most likely will find it +more appropriate to set up an environment variable with the same name +prior starting target application, e.g. on Intel P4 processor 'env +OPENSSL_ia32cap=0x12900010 apps/openssl', to achieve same effect +without modifying the application source code. Alternatively you can +reconfigure the toolkit with no\-sse2 option and recompile. |