Argh! The Athlon64 and Opteron only implement 40 bits of address space in

the MTRR Base/Mask registers.  If you use the documented algorithm in the
systems programming guide, you'll get a GPF. The only thing that has
prevented this so far is that the bios pre-sets some MTRR entries which
we mis-interpreted sufficiently to fool the memcontrol interface into
thinking all the address space was taken and therefore rejected XFree86's
requests.  However, not all bioses do this..  You get an insta-panic in
that case.  Grrr.  A better fix (dynamic mask) will happen by 5.3/5-stable
so that we automatically adapt to more than 40 physical bits.

Approved by:  re (scottl)

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