Fix a bug in the description of the "p6-div" event. [1]

Update the description of the "p6-div" and "p6-mul" events according
to the "Intel(r) 64 and IA-32 Architectures Software Developers
Manual Volume 3B: System Programming Guide, Part 2, November 2006".

Reported by: 	Harald Servat <redcrash at gmail dot com> [1]

1 files changed, 4 insertions, 2 deletions

diff --git a/lib/libpmc/pmc.3 b/lib/libpmc/pmc.3
index f3d4407..aee4c9a 100644
--- a/lib/libpmc/pmc.3
+++ b/lib/libpmc/pmc.3
@@ -1600,7 +1600,8 @@ Count the weighted number of cycles while a data cache unit miss is
 outstanding, incremented by the number of outstanding cache misses at
 any time.
 .It Li p6-div
-Count the number of floating point multiplies.
+Count the number of integer and floating-point divides including
+speculative divides.
 This event is only allocated on counter 1.
 .It Li p6-emon-esp-uops
 .Pq Tn "Pentium M"
@@ -2046,7 +2047,8 @@ Count the number of MMX saturating instructions executed.
 .Pq Tn "Pentium II" , Tn "Pentium III"
 Count the number of MMX micro-ops executed.
 .It Li p6-mul
-Count the number of floating point multiplies.
+Count the number of integer and floating-point multiplies, including
+speculative multiplies.
 This event is only allocated on counter 1.
 .It Li p6-partial-rat-stalls
 Count the number of cycles or events for partial stalls.