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| author | rrs <rrs@FreeBSD.org> | 2015-03-24 20:00:11 +0000 |
|---|---|---|
| committer | rrs <rrs@FreeBSD.org> | 2015-03-24 20:00:11 +0000 |
| commit | 0444d8258d3c6c2219b8aadd39daf2fe9473512c (patch) | |
| tree | 4d16eb1cb375dcd059efa00e91a45c0fbf17563a /lib | |
| parent | f5cf31bac5259172697ccde44e661519990bc4b4 (diff) | |
| download | FreeBSD-src-0444d8258d3c6c2219b8aadd39daf2fe9473512c.zip FreeBSD-src-0444d8258d3c6c2219b8aadd39daf2fe9473512c.tar.gz | |
MFC of r277177 and r279894 with the fixes for the PMC for Haswell.
Sponsored by: Netflix Inc.
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/libpmc/libpmc.c | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/lib/libpmc/libpmc.c b/lib/libpmc/libpmc.c index 5282bb2..2cdf6b7 100644 --- a/lib/libpmc/libpmc.c +++ b/lib/libpmc/libpmc.c @@ -200,6 +200,12 @@ static const struct pmc_event_descr haswell_event_table[] = __PMC_EV_ALIAS_HASWELL() }; +static const struct pmc_event_descr haswell_xeon_event_table[] = +{ + __PMC_EV_ALIAS_HASWELL_XEON() +}; + + static const struct pmc_event_descr ivybridge_event_table[] = { __PMC_EV_ALIAS_IVYBRIDGE() @@ -267,6 +273,7 @@ PMC_MDEP_TABLE(core2, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); PMC_MDEP_TABLE(corei7, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); PMC_MDEP_TABLE(nehalem_ex, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); PMC_MDEP_TABLE(haswell, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); +PMC_MDEP_TABLE(haswell_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); PMC_MDEP_TABLE(ivybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); PMC_MDEP_TABLE(ivybridge_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); PMC_MDEP_TABLE(sandybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); @@ -312,6 +319,7 @@ PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap); PMC_CLASS_TABLE_DESC(corei7, IAP, corei7, iap); PMC_CLASS_TABLE_DESC(nehalem_ex, IAP, nehalem_ex, iap); PMC_CLASS_TABLE_DESC(haswell, IAP, haswell, iap); +PMC_CLASS_TABLE_DESC(haswell_xeon, IAP, haswell, iap); PMC_CLASS_TABLE_DESC(ivybridge, IAP, ivybridge, iap); PMC_CLASS_TABLE_DESC(ivybridge_xeon, IAP, ivybridge_xeon, iap); PMC_CLASS_TABLE_DESC(sandybridge, IAP, sandybridge, iap); @@ -626,6 +634,8 @@ static struct pmc_event_alias core2_aliases_without_iaf[] = { #define nehalem_ex_aliases_without_iaf core2_aliases_without_iaf #define haswell_aliases core2_aliases #define haswell_aliases_without_iaf core2_aliases_without_iaf +#define haswell_xeon_aliases core2_aliases +#define haswell_xeon_aliases_without_iaf core2_aliases_without_iaf #define ivybridge_aliases core2_aliases #define ivybridge_aliases_without_iaf core2_aliases_without_iaf #define ivybridge_xeon_aliases core2_aliases @@ -896,7 +906,8 @@ iap_allocate_pmc(enum pmc_event pe, char *ctrspec, n = pmc_parse_mask(iap_rsp_mask_sb_sbx_ib, p, &rsp); } else return (-1); - } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_HASWELL) { + } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_HASWELL || + cpu_info.pm_cputype == PMC_CPU_INTEL_HASWELL_XEON) { if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { n = pmc_parse_mask(iap_rsp_mask_haswell, p, &rsp); } else @@ -2788,6 +2799,10 @@ pmc_event_names_of_class(enum pmc_class cl, const char ***eventnames, ev = haswell_event_table; count = PMC_EVENT_TABLE_SIZE(haswell); break; + case PMC_CPU_INTEL_HASWELL_XEON: + ev = haswell_xeon_event_table; + count = PMC_EVENT_TABLE_SIZE(haswell_xeon); + break; case PMC_CPU_INTEL_IVYBRIDGE: ev = ivybridge_event_table; count = PMC_EVENT_TABLE_SIZE(ivybridge); @@ -3115,6 +3130,9 @@ pmc_init(void) pmc_class_table[n++] = &haswelluc_class_table_descr; PMC_MDEP_INIT_INTEL_V2(haswell); break; + case PMC_CPU_INTEL_HASWELL_XEON: + PMC_MDEP_INIT_INTEL_V2(haswell_xeon); + break; case PMC_CPU_INTEL_IVYBRIDGE: PMC_MDEP_INIT_INTEL_V2(ivybridge); break; @@ -3280,6 +3298,11 @@ _pmc_name_of_event(enum pmc_event pe, enum pmc_cputype cpu) ev = haswell_event_table; evfence = haswell_event_table + PMC_EVENT_TABLE_SIZE(haswell); break; + case PMC_CPU_INTEL_HASWELL_XEON: + ev = haswell_xeon_event_table; + evfence = haswell_xeon_event_table + PMC_EVENT_TABLE_SIZE(haswell_xeon); + break; + case PMC_CPU_INTEL_IVYBRIDGE: ev = ivybridge_event_table; evfence = ivybridge_event_table + PMC_EVENT_TABLE_SIZE(ivybridge); |
