Mark all inline asms that read the floating-point control or status

registers as volatile.  Instructions that *wrote* to FP state were
already marked volatile, but apparently gcc has license to move
non-volatile asms past volatile asms.  This broke amd64's feupdateenv
at -O2 due to a WAR conflict between fnstsw and fldenv there.

7 files changed, 11 insertions, 11 deletions

diff --git a/lib/msun/alpha/fenv.h b/lib/msun/alpha/fenv.h
index 9ecec59..7b79a3f 100644
--- a/lib/msun/alpha/fenv.h
+++ b/lib/msun/alpha/fenv.h
@@ -56,7 +56,7 @@ typedef	__uint16_t	fexcept_t;
 #define	_FPUSW_SHIFT	51
 
 #define	__excb()	__asm __volatile("excb")
-#define	__mf_fpcr(__cw)	__asm ("mf_fpcr %0" : "=f" (*(__cw)))
+#define	__mf_fpcr(__cw)	__asm __volatile("mf_fpcr %0" : "=f" (*(__cw)))
 #define	__mt_fpcr(__cw)	__asm __volatile("mt_fpcr %0" : : "f" (__cw))
 
 union __fpcr {
diff --git a/lib/msun/amd64/fenv.h b/lib/msun/amd64/fenv.h
index b148caf..29efad9 100644
--- a/lib/msun/amd64/fenv.h
+++ b/lib/msun/amd64/fenv.h
@@ -79,9 +79,9 @@ extern const fenv_t	__fe_dfl_env;
 #define	__fldcw(__cw)		__asm __volatile("fldcw %0" : : "m" (__cw))
 #define	__fldenv(__env)		__asm __volatile("fldenv %0" : : "m" (__env))
 #define	__fnclex()		__asm __volatile("fnclex")
-#define	__fnstenv(__env)	__asm("fnstenv %0" : "=m" (*(__env)))
-#define	__fnstcw(__cw)		__asm("fnstcw %0" : "=m" (*(__cw)))
-#define	__fnstsw(__sw)		__asm("fnstsw %0" : "=am" (*(__sw)))
+#define	__fnstenv(__env)	__asm __volatile("fnstenv %0" : "=m" (*(__env)))
+#define	__fnstcw(__cw)		__asm __volatile("fnstcw %0" : "=m" (*(__cw)))
+#define	__fnstsw(__sw)		__asm __volatile("fnstsw %0" : "=am" (*(__sw)))
 #define	__fwait()		__asm __volatile("fwait")
 #define	__ldmxcsr(__csr)	__asm __volatile("ldmxcsr %0" : : "m" (__csr))
 #define	__stmxcsr(__csr)	__asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
diff --git a/lib/msun/arm/fenv.h b/lib/msun/arm/fenv.h
index c5cfb4e..7f93b15 100644
--- a/lib/msun/arm/fenv.h
+++ b/lib/msun/arm/fenv.h
@@ -54,7 +54,7 @@ extern const fenv_t	__fe_dfl_env;
 #define	_ENABLE_MASK	(FE_ALL_EXCEPT << _FPUSW_SHIFT)
 
 #ifdef	ARM_HARD_FLOAT
-#define	__rfs(__fpsr)	__asm("rfs %0" : "=r" (*(__fpsr)))
+#define	__rfs(__fpsr)	__asm __volatile("rfs %0" : "=r" (*(__fpsr)))
 #define	__wfs(__fpsr)	__asm __volatile("wfs %0" : : "r" (__fpsr))
 #else
 #define __rfs(__fpsr)
diff --git a/lib/msun/i387/fenv.h b/lib/msun/i387/fenv.h
index 6989c05..27cd416 100644
--- a/lib/msun/i387/fenv.h
+++ b/lib/msun/i387/fenv.h
@@ -68,9 +68,9 @@ extern const fenv_t	__fe_dfl_env;
 #define	__fldcw(__cw)		__asm __volatile("fldcw %0" : : "m" (__cw))
 #define	__fldenv(__env)		__asm __volatile("fldenv %0" : : "m" (__env))
 #define	__fnclex()		__asm __volatile("fnclex")
-#define	__fnstenv(__env)	__asm("fnstenv %0" : "=m" (*(__env)))
-#define	__fnstcw(__cw)		__asm("fnstcw %0" : "=m" (*(__cw)))
-#define	__fnstsw(__sw)		__asm("fnstsw %0" : "=am" (*(__sw)))
+#define	__fnstenv(__env)	__asm __volatile("fnstenv %0" : "=m" (*(__env)))
+#define	__fnstcw(__cw)		__asm __volatile("fnstcw %0" : "=m" (*(__cw)))
+#define	__fnstsw(__sw)		__asm __volatile("fnstsw %0" : "=am" (*(__sw)))
 #define	__fwait()		__asm __volatile("fwait")
 
 static __inline int
diff --git a/lib/msun/ia64/fenv.h b/lib/msun/ia64/fenv.h
index 97ce1d7..f1415f1 100644
--- a/lib/msun/ia64/fenv.h
+++ b/lib/msun/ia64/fenv.h
@@ -60,7 +60,7 @@ extern const fenv_t	__fe_dfl_env;
 
 #define	_FPUSW_SHIFT	13
 
-#define	__stfpsr(__r)	__asm("mov %0=ar.fpsr" : "=r" (*(__r)))
+#define	__stfpsr(__r)	__asm __volatile("mov %0=ar.fpsr" : "=r" (*(__r)))
 #define	__ldfpsr(__r)	__asm __volatile("mov ar.fpsr=%0" : : "r" (__r))
 
 static __inline int
diff --git a/lib/msun/powerpc/fenv.h b/lib/msun/powerpc/fenv.h
index ece436c..ed9d935 100644
--- a/lib/msun/powerpc/fenv.h
+++ b/lib/msun/powerpc/fenv.h
@@ -82,7 +82,7 @@ extern const fenv_t	__fe_dfl_env;
 #define	_ENABLE_MASK	((FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \
 			 FE_OVERFLOW | FE_UNDERFLOW) >> _FPUSW_SHIFT)
 
-#define	__mffs(__env)	__asm("mffs %0" : "=f" (*(__env)))
+#define	__mffs(__env)	__asm __volatile("mffs %0" : "=f" (*(__env)))
 #define	__mtfsf(__env)	__asm __volatile("mtfsf 255,%0" : : "f" (__env))
 
 union __fpscr {
diff --git a/lib/msun/sparc64/fenv.h b/lib/msun/sparc64/fenv.h
index 793adcf..b425515 100644
--- a/lib/msun/sparc64/fenv.h
+++ b/lib/msun/sparc64/fenv.h
@@ -68,7 +68,7 @@ extern const fenv_t	__fe_dfl_env;
 #define	_ENABLE_MASK	(FE_ALL_EXCEPT << _FPUSW_SHIFT)
 
 #define	__ldxfsr(__r)	__asm __volatile("ldx %0, %%fsr" : : "m" (__r))
-#define	__stxfsr(__r)	__asm("stx %%fsr, %0" : "=m" (*(__r)))
+#define	__stxfsr(__r)	__asm __volatile("stx %%fsr, %0" : "=m" (*(__r)))
 
 static __inline int
 feclearexcept(int __excepts)