Fix typos and spelling mistakes.

4 files changed, 8 insertions, 8 deletions

diff --git a/lib/libpmc/pmc.corei7.3 b/lib/libpmc/pmc.corei7.3
index e1cf602..ba973b7 100644
--- a/lib/libpmc/pmc.corei7.3
+++ b/lib/libpmc/pmc.corei7.3
@@ -833,7 +833,7 @@ Counts mispredicted indirect branches that have a rear return mnemonic.
 Counts mispredicted non-indirect near calls executed, (should always be 0).
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
 .Pq Event 89H , Umask 20H
-Counts mispredicted indirect near calls exeucted, including both register
+Counts mispredicted indirect near calls executed, including both register
 and memory indirect.
 .It Li BR_MISP_EXEC.NEAR_CALLS
 .Pq Event 89H , Umask 30H
diff --git a/lib/libpmc/pmc.mips.3 b/lib/libpmc/pmc.mips.3
index 3fe6825..194838e 100644
--- a/lib/libpmc/pmc.mips.3
+++ b/lib/libpmc/pmc.mips.3
@@ -153,7 +153,7 @@ Floating point instructions completed.
 Integer and co-processor loads completed.
 .It Li STORE_COMPLETED
 .Pq Event 15, Counter 1
-Integer and co-porocessor stores completed.
+Integer and co-processor stores completed.
 .It Li BARRIER_COMPLETED
 .Pq Event 16, Counter 0
 Direct jump (and link) instructions completed.
@@ -225,10 +225,10 @@ valid instruction to the ALU.
 Counts the number of cycles where the ALU pipeline cannot advance.
 .It Li UNCACHED_LOAD
 .Pq Event 33, Counter 0
-Counts uncached and uncached acclerated loads.
+Counts uncached and uncached accelerated loads.
 .It Li UNCACHED_STORE
 .Pq Event 33, Counter 1
-Counts uncached and uncached acclerated stores.
+Counts uncached and uncached accelerated stores.
 .It Li CP2_REG_TO_REG_COMPLETED
 .Pq Event 35, Counter 0
 Co-processor 2 register to register instructions completed.
diff --git a/lib/libpmc/pmc.westmere.3 b/lib/libpmc/pmc.westmere.3
index 267ac48..af7838f 100644
--- a/lib/libpmc/pmc.westmere.3
+++ b/lib/libpmc/pmc.westmere.3
@@ -775,7 +775,7 @@ Counts mispredicted indirect branches that have a rear return mnemonic.
 Counts mispredicted non-indirect near calls executed, (should always be 0).
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
 .Pq Event 89H , Umask 20H
-Counts mispredicted indirect near calls exeucted, including both register
+Counts mispredicted indirect near calls executed, including both register
 and memory indirect.
 .It Li BR_MISP_EXEC.NEAR_CALLS
 .Pq Event 89H , Umask 30H
diff --git a/lib/libpmc/pmc.westmereuc.3 b/lib/libpmc/pmc.westmereuc.3
index 6365044..d8a4cef 100644
--- a/lib/libpmc/pmc.westmereuc.3
+++ b/lib/libpmc/pmc.westmereuc.3
@@ -715,7 +715,7 @@ qualified by mask value written to MSR 396H. The following mask values are
 supported:
 0: NONE 40000000_00000000H:RSPFWDI 40001A00_00000000H:RSPFWDS
 40001D00_00000000H:RSPIWB
-Match opcode/addres s by writing MSR 396H with mask supported mask value
+Match opcode/address by writing MSR 396H with mask supported mask value
 .It Li ADDR_OPCODE_MATCH.REMOTE
 .Pq Event 35H , Umask 02H
 Counts number of requests from the remote socket, address/opcode of request
@@ -723,7 +723,7 @@ is qualified by mask value written to MSR 396H. The following mask values
 are supported:
 0: NONE 40000000_00000000H:RSPFWDI 40001A00_00000000H:RSPFWDS
 40001D00_00000000H:RSPIWB
-Match opcode/addres s by writing MSR 396H with mask supported mask value
+Match opcode/address by writing MSR 396H with mask supported mask value
 .It Li ADDR_OPCODE_MATCH.LOCAL
 .Pq Event 35H , Umask 04H
 Counts number of requests from the local socket, address/opcode of request
@@ -731,7 +731,7 @@ is qualified by mask value written to MSR 396H. The following mask values
 are supported:
 0: NONE 40000000_00000000H:RSPFWDI 40001A00_00000000H:RSPFWDS
 40001D00_00000000H:RSPIWB
-Match opcode/addres s by writing MSR 396H with mask supported mask value
+Match opcode/address by writing MSR 396H with mask supported mask value
 .It Li QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0
 .Pq Event 40H , Umask 01H
 Counts cycles the Quickpath outbound link 0 HOME virtual channel is stalled