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| author | eadler <eadler@FreeBSD.org> | 2012-03-29 05:02:12 +0000 |
|---|---|---|
| committer | eadler <eadler@FreeBSD.org> | 2012-03-29 05:02:12 +0000 |
| commit | 1ef5fe44d364187e492b6a152c0176186161b44f (patch) | |
| tree | bc9e037fdf2ed91d8f914cfe43bade2553a869c2 /lib/libpmc/pmc.xscale.3 | |
| parent | 0b5862156580ae2abf520982aca1e1085730d500 (diff) | |
| download | FreeBSD-src-1ef5fe44d364187e492b6a152c0176186161b44f.zip FreeBSD-src-1ef5fe44d364187e492b6a152c0176186161b44f.tar.gz | |
Remove trailing whitespace per mdoc lint warning
Disussed with: gavin
No objection from: doc
Approved by: joel
MFC after: 3 days
Diffstat (limited to 'lib/libpmc/pmc.xscale.3')
| -rw-r--r-- | lib/libpmc/pmc.xscale.3 | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/libpmc/pmc.xscale.3 b/lib/libpmc/pmc.xscale.3 index 521cc9c..965ea74 100644 --- a/lib/libpmc/pmc.xscale.3 +++ b/lib/libpmc/pmc.xscale.3 @@ -45,7 +45,7 @@ have 4 counters. Third generation cores also have an increased number of PMC events. .Pp .Tn Intel XScale -PMCs are documented in +PMCs are documented in .Rs .%B "3rd Generation Intel XScale Microarchitecture Developer's Manual" .%D May 2007 @@ -117,7 +117,7 @@ Self initiated address bus transaction. .It Li DATA_BUS_TRANS Data bus transaction. .El -.Ss Event Name Aliases +.Ss Event Name Aliases The following table shows the mapping between the PMC-independent aliases supported by .Lb libpmc |
