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| author | neel <neel@FreeBSD.org> | 2010-01-21 02:21:31 +0000 |
|---|---|---|
| committer | neel <neel@FreeBSD.org> | 2010-01-21 02:21:31 +0000 |
| commit | 92755e4d60b98447fbb74284fad12d6edbf24108 (patch) | |
| tree | 07b003ab49deb75375c5fc65477b05d70f49228f /lib/libgssapi/gss_indicate_mechs.c | |
| parent | 5a5053f56cd7538b0a873c54b557ddb04eb2a098 (diff) | |
| download | FreeBSD-src-92755e4d60b98447fbb74284fad12d6edbf24108.zip FreeBSD-src-92755e4d60b98447fbb74284fad12d6edbf24108.tar.gz | |
Get rid of redundant setting of interrupt enable bit when restoring the status
register from the PCB.
Remove a couple of misleading comments while I am here. The comments are
misleading because they imply that interrupts will be enabled after the
status register is restored from the PCB. This is not the case because
the processor is at the exception level (SR_EXL is set).
Approved by: imp (mentor)
Diffstat (limited to 'lib/libgssapi/gss_indicate_mechs.c')
0 files changed, 0 insertions, 0 deletions
