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| author | marcel <marcel@FreeBSD.org> | 2008-02-14 18:46:50 +0000 |
|---|---|---|
| committer | marcel <marcel@FreeBSD.org> | 2008-02-14 18:46:50 +0000 |
| commit | 257f2d8fc2d6f9e98f16196ad31a552be87e33f9 (patch) | |
| tree | 9733d59af46f580b2765066f2ec831be08f21988 /lib/libc/stdlib | |
| parent | 9713f1f445b6ba1d2c2b46e10a1c5b61b5633763 (diff) | |
| download | FreeBSD-src-257f2d8fc2d6f9e98f16196ad31a552be87e33f9.zip FreeBSD-src-257f2d8fc2d6f9e98f16196ad31a552be87e33f9.tar.gz | |
On Montecito processors, the instruction cache is in fact not
coherent with the data caches. Implement a quick fix to allow
us to boot on Montecito, while I'm working on a better fix in
the mean time.
Commit made on Montecito-based Itanium...
Diffstat (limited to 'lib/libc/stdlib')
0 files changed, 0 insertions, 0 deletions
