Remove 'register' keyword.

8 files changed, 66 insertions, 66 deletions

diff --git a/lib/libc/sparc64/fpu/fpu_add.c b/lib/libc/sparc64/fpu/fpu_add.c
index 45e1873..5be2261 100644
--- a/lib/libc/sparc64/fpu/fpu_add.c
+++ b/lib/libc/sparc64/fpu/fpu_add.c
@@ -64,11 +64,11 @@
 
 struct fpn *
 __fpu_add(fe)
-	register struct fpemu *fe;
+	struct fpemu *fe;
 {
-	register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
-	register u_int r0, r1, r2, r3;
-	register int rd;
+	struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
+	u_int r0, r1, r2, r3;
+	int rd;
 
 	/*
 	 * Put the `heavier' operand on the right (see fpu_emu.h).
diff --git a/lib/libc/sparc64/fpu/fpu_compare.c b/lib/libc/sparc64/fpu/fpu_compare.c
index 5d63699..4eaabde 100644
--- a/lib/libc/sparc64/fpu/fpu_compare.c
+++ b/lib/libc/sparc64/fpu/fpu_compare.c
@@ -95,8 +95,8 @@ static int fcc_shift[] = {
 void
 __fpu_compare(struct fpemu *fe, int cmpe, int fcc)
 {
-	register struct fpn *a, *b;
-	register int cc;
+	struct fpn *a, *b;
+	int cc;
 	FPU_DECL_CARRY
 
 	a = &fe->fe_f1;
diff --git a/lib/libc/sparc64/fpu/fpu_div.c b/lib/libc/sparc64/fpu/fpu_div.c
index 3dc6bf4..c3895c2 100644
--- a/lib/libc/sparc64/fpu/fpu_div.c
+++ b/lib/libc/sparc64/fpu/fpu_div.c
@@ -156,11 +156,11 @@
 
 struct fpn *
 __fpu_div(fe)
-	register struct fpemu *fe;
+	struct fpemu *fe;
 {
-	register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
-	register u_int q, bit;
-	register u_int r0, r1, r2, r3, d0, d1, d2, d3, y0, y1, y2, y3;
+	struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
+	u_int q, bit;
+	u_int r0, r1, r2, r3, d0, d1, d2, d3, y0, y1, y2, y3;
 	FPU_DECL_CARRY
 
 	/*
diff --git a/lib/libc/sparc64/fpu/fpu_explode.c b/lib/libc/sparc64/fpu/fpu_explode.c
index 769f492..48c22fe 100644
--- a/lib/libc/sparc64/fpu/fpu_explode.c
+++ b/lib/libc/sparc64/fpu/fpu_explode.c
@@ -86,8 +86,8 @@
  */
 int
 __fpu_itof(fp, i)
-	register struct fpn *fp;
-	register u_int i;
+	struct fpn *fp;
+	u_int i;
 {
 
 	if (i == 0)
@@ -112,8 +112,8 @@ __fpu_itof(fp, i)
  */
 int
 __fpu_xtof(fp, i)
-	register struct fpn *fp;
-	register u_int64_t i;
+	struct fpn *fp;
+	u_int64_t i;
 {
 
 	if (i == 0)
@@ -173,11 +173,11 @@ __fpu_xtof(fp, i)
  */
 int
 __fpu_stof(fp, i)
-	register struct fpn *fp;
-	register u_int i;
+	struct fpn *fp;
+	u_int i;
 {
-	register int exp;
-	register u_int frac, f0, f1;
+	int exp;
+	u_int frac, f0, f1;
 #define SNG_SHIFT (SNG_FRACBITS - FP_LG)
 
 	exp = (i >> (32 - 1 - SNG_EXPBITS)) & mask(SNG_EXPBITS);
@@ -193,11 +193,11 @@ __fpu_stof(fp, i)
  */
 int
 __fpu_dtof(fp, i, j)
-	register struct fpn *fp;
-	register u_int i, j;
+	struct fpn *fp;
+	u_int i, j;
 {
-	register int exp;
-	register u_int frac, f0, f1, f2;
+	int exp;
+	u_int frac, f0, f1, f2;
 #define DBL_SHIFT (DBL_FRACBITS - 32 - FP_LG)
 
 	exp = (i >> (32 - 1 - DBL_EXPBITS)) & mask(DBL_EXPBITS);
@@ -214,11 +214,11 @@ __fpu_dtof(fp, i, j)
  */
 int
 __fpu_qtof(fp, i, j, k, l)
-	register struct fpn *fp;
-	register u_int i, j, k, l;
+	struct fpn *fp;
+	u_int i, j, k, l;
 {
-	register int exp;
-	register u_int frac, f0, f1, f2, f3;
+	int exp;
+	u_int frac, f0, f1, f2, f3;
 #define EXT_SHIFT (-(EXT_FRACBITS - 3 * 32 - FP_LG))	/* left shift! */
 
 	/*
@@ -235,7 +235,7 @@ __fpu_qtof(fp, i, j, k, l)
 }
 
 /*
- * Explode the contents of a register / regpair / regquad.
+ * Explode the contents of a / regpair / regquad.
  * If the input is a signalling NaN, an NV (invalid) exception
  * will be set.  (Note that nothing but NV can occur until ALU
  * operations are performed.)
diff --git a/lib/libc/sparc64/fpu/fpu_implode.c b/lib/libc/sparc64/fpu/fpu_implode.c
index ee7a8f7..207fa63 100644
--- a/lib/libc/sparc64/fpu/fpu_implode.c
+++ b/lib/libc/sparc64/fpu/fpu_implode.c
@@ -62,7 +62,7 @@
 #include "fpu_emu.h"
 #include "fpu_extern.h"
 
-static int round __P((register struct fpemu *, register struct fpn *));
+static int round __P((struct fpemu *, struct fpn *));
 static int toinf __P((struct fpemu *, int));
 
 /*
@@ -78,10 +78,10 @@ static int toinf __P((struct fpemu *, int));
  * responsibility to fix this if necessary.
  */
 static int
-round(register struct fpemu *fe, register struct fpn *fp)
+round(struct fpemu *fe, struct fpn *fp)
 {
-	register u_int m0, m1, m2, m3;
-	register int gr, s;
+	u_int m0, m1, m2, m3;
+	int gr, s;
 
 	m0 = fp->fp_mant[0];
 	m1 = fp->fp_mant[1];
@@ -193,10 +193,10 @@ toinf(struct fpemu *fe, int sign)
 u_int
 __fpu_ftoi(fe, fp)
 	struct fpemu *fe;
-	register struct fpn *fp;
+	struct fpn *fp;
 {
-	register u_int i;
-	register int sign, exp;
+	u_int i;
+	int sign, exp;
 
 	sign = fp->fp_sign;
 	switch (fp->fp_class) {
@@ -242,11 +242,11 @@ __fpu_ftoi(fe, fp)
 u_int
 __fpu_ftox(fe, fp, res)
 	struct fpemu *fe;
-	register struct fpn *fp;
+	struct fpn *fp;
 	u_int *res;
 {
-	register u_int64_t i;
-	register int sign, exp;
+	u_int64_t i;
+	int sign, exp;
 
 	sign = fp->fp_sign;
 	switch (fp->fp_class) {
@@ -294,10 +294,10 @@ __fpu_ftox(fe, fp, res)
 u_int
 __fpu_ftos(fe, fp)
 	struct fpemu *fe;
-	register struct fpn *fp;
+	struct fpn *fp;
 {
-	register u_int sign = fp->fp_sign << 31;
-	register int exp;
+	u_int sign = fp->fp_sign << 31;
+	int exp;
 
 #define	SNG_EXP(e)	((e) << SNG_FRACBITS)	/* makes e an exponent */
 #define	SNG_MASK	(SNG_EXP(1) - 1)	/* mask for fraction */
@@ -378,11 +378,11 @@ done:
 u_int
 __fpu_ftod(fe, fp, res)
 	struct fpemu *fe;
-	register struct fpn *fp;
+	struct fpn *fp;
 	u_int *res;
 {
-	register u_int sign = fp->fp_sign << 31;
-	register int exp;
+	u_int sign = fp->fp_sign << 31;
+	int exp;
 
 #define	DBL_EXP(e)	((e) << (DBL_FRACBITS & 31))
 #define	DBL_MASK	(DBL_EXP(1) - 1)
@@ -439,11 +439,11 @@ done:
 u_int
 __fpu_ftoq(fe, fp, res)
 	struct fpemu *fe;
-	register struct fpn *fp;
+	struct fpn *fp;
 	u_int *res;
 {
-	register u_int sign = fp->fp_sign << 31;
-	register int exp;
+	u_int sign = fp->fp_sign << 31;
+	int exp;
 
 #define	EXT_EXP(e)	((e) << (EXT_FRACBITS & 31))
 #define	EXT_MASK	(EXT_EXP(1) - 1)
@@ -499,9 +499,9 @@ done:
 void
 __fpu_implode(fe, fp, type, space)
 	struct fpemu *fe;
-	register struct fpn *fp;
+	struct fpn *fp;
 	int type;
-	register u_int *space;
+	u_int *space;
 {
 
 	switch (type) {
diff --git a/lib/libc/sparc64/fpu/fpu_mul.c b/lib/libc/sparc64/fpu/fpu_mul.c
index f090120..4f6b691 100644
--- a/lib/libc/sparc64/fpu/fpu_mul.c
+++ b/lib/libc/sparc64/fpu/fpu_mul.c
@@ -104,11 +104,11 @@
  */
 struct fpn *
 __fpu_mul(fe)
-	register struct fpemu *fe;
+	struct fpemu *fe;
 {
-	register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
-	register u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m;
-	register int sticky;
+	struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
+	u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m;
+	int sticky;
 	FPU_DECL_CARRY
 
 	/*
diff --git a/lib/libc/sparc64/fpu/fpu_sqrt.c b/lib/libc/sparc64/fpu/fpu_sqrt.c
index fba8c43..044ee07 100644
--- a/lib/libc/sparc64/fpu/fpu_sqrt.c
+++ b/lib/libc/sparc64/fpu/fpu_sqrt.c
@@ -193,12 +193,12 @@ struct fpn *
 __fpu_sqrt(fe)
 	struct fpemu *fe;
 {
-	register struct fpn *x = &fe->fe_f1;
-	register u_int bit, q, tt;
-	register u_int x0, x1, x2, x3;
-	register u_int y0, y1, y2, y3;
-	register u_int d0, d1, d2, d3;
-	register int e;
+	struct fpn *x = &fe->fe_f1;
+	u_int bit, q, tt;
+	u_int x0, x1, x2, x3;
+	u_int y0, y1, y2, y3;
+	u_int d0, d1, d2, d3;
+	int e;
 
 	/*
 	 * Take care of special cases first.  In order:
diff --git a/lib/libc/sparc64/fpu/fpu_subr.c b/lib/libc/sparc64/fpu/fpu_subr.c
index 693255e..7d6769d 100644
--- a/lib/libc/sparc64/fpu/fpu_subr.c
+++ b/lib/libc/sparc64/fpu/fpu_subr.c
@@ -67,10 +67,10 @@
  * sticky field is ignored anyway.
  */
 int
-__fpu_shr(register struct fpn *fp, register int rsh)
+__fpu_shr(struct fpn *fp, int rsh)
 {
-	register u_int m0, m1, m2, m3, s;
-	register int lsh;
+	u_int m0, m1, m2, m3, s;
+	int lsh;
 
 #ifdef DIAGNOSTIC
 	if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))
@@ -141,10 +141,10 @@ __fpu_shr(register struct fpn *fp, register int rsh)
  * a supernormal and it will fix it (provided fp->fp_mant[3] == 0).
  */
 void
-__fpu_norm(register struct fpn *fp)
+__fpu_norm(struct fpn *fp)
 {
-	register u_int m0, m1, m2, m3, top, sup, nrm;
-	register int lsh, rsh, exp;
+	u_int m0, m1, m2, m3, top, sup, nrm;
+	int lsh, rsh, exp;
 
 	exp = fp->fp_exp;
 	m0 = fp->fp_mant[0];
@@ -209,9 +209,9 @@ __fpu_norm(register struct fpn *fp)
  * As a side effect, we set NV (invalid) for the current exceptions.
  */
 struct fpn *
-__fpu_newnan(register struct fpemu *fe)
+__fpu_newnan(struct fpemu *fe)
 {
-	register struct fpn *fp;
+	struct fpn *fp;
 
 	fe->fe_cx = FSR_NV;
 	fp = &fe->fe_f3;