MFC 263631, 263637, 263664, 263676, 263679, 263698, 263711,

  Implement __flt_rounds for ARMv6 hard-float. The fpscr register stores the
  current rounding mode used by the VFP unit.

  Simplify how we build MACHINE_ARCH. There are 3 options that may be set
  however only arm, armeb, armv6, and soon armv6hf will be used.

  Add the llvm/clang patch for r263619.

  Reorder the pmap macros so "ARM_MMU_V6 + ARM_MMU_V7" is first. As they are
  identical this allows us to build for both v6 and v7 together.

  Add code for enabling second CPU core for A20 SoC.
  Enable SMP on Cubieboard2.

  Switch to freebsd.org emal address in copyright.

1 files changed, 14 insertions, 10 deletions

diff --git a/lib/libc/arm/gen/flt_rounds.c b/lib/libc/arm/gen/flt_rounds.c
index 81ab08b..86509d2 100644
--- a/lib/libc/arm/gen/flt_rounds.c
+++ b/lib/libc/arm/gen/flt_rounds.c
@@ -30,20 +30,32 @@ __FBSDID("$FreeBSD$");
 #include <fenv.h>
 #include <float.h>
 
+#ifndef __ARM_PCS_VFP
 #include "softfloat-for-gcc.h"
 #include "milieu.h"
 #include "softfloat.h"
+#endif
 
 int
 __flt_rounds(void)
 {
+	int mode;
 
-#ifndef ARM_HARD_FLOAT
+#ifndef __ARM_PCS_VFP
 	/*
 	 * Translate our rounding modes to the unnamed
 	 * manifest constants required by C99 et. al.
 	 */
-	switch (__softfloat_float_rounding_mode) {
+	mode = __softfloat_float_rounding_mode;
+#else /* __ARM_PCS_VFP */
+	/*
+	 * Read the floating-point status and control register
+	 */
+	__asm __volatile("vmrs %0, fpscr" : "=&r"(mode));
+	mode &= _ROUND_MASK;
+#endif /* __ARM_PCS_VFP */
+
+	switch (mode) {
 	case FE_TOWARDZERO:
 		return (0);
 	case FE_TONEAREST:
@@ -54,12 +66,4 @@ __flt_rounds(void)
 		return (3);
 	}
 	return (-1);
-#else /* ARM_HARD_FLOAT */
-	/*
-	 * Apparently, the rounding mode is specified as part of the
-	 * instruction format on ARM, so the dynamic rounding mode is
-	 * indeterminate.  Some FPUs may differ.
-	 */
-	return (-1);
-#endif /* ARM_HARD_FLOAT */
 }