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| author | ed <ed@FreeBSD.org> | 2009-06-14 09:23:33 +0000 |
|---|---|---|
| committer | ed <ed@FreeBSD.org> | 2009-06-14 09:23:33 +0000 |
| commit | db89e312d968c258aba3c79c1c398f5fb19267a3 (patch) | |
| tree | 49817b316c4fdaa56d9d16ebf2555303d1a990e0 /lib/Target/X86/X86ISelLowering.cpp | |
| parent | de000e339094f8c6e06a635dac9a803861416ec6 (diff) | |
| download | FreeBSD-src-db89e312d968c258aba3c79c1c398f5fb19267a3.zip FreeBSD-src-db89e312d968c258aba3c79c1c398f5fb19267a3.tar.gz | |
Import LLVM r73340.
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 9e15a54..36e3ab2 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -944,7 +944,7 @@ SDValue X86TargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) { SDValue StackAdjustment = TailCall.getOperand(2); assert(((TargetAddress.getOpcode() == ISD::Register && (cast<RegisterSDNode>(TargetAddress)->getReg() == X86::EAX || - cast<RegisterSDNode>(TargetAddress)->getReg() == X86::R9)) || + cast<RegisterSDNode>(TargetAddress)->getReg() == X86::R11)) || TargetAddress.getOpcode() == ISD::TargetExternalSymbol || TargetAddress.getOpcode() == ISD::TargetGlobalAddress) && "Expecting an global address, external symbol, or register"); @@ -1171,8 +1171,6 @@ CCAssignFn *X86TargetLowering::CCAssignFnForNode(unsigned CC) const { if (Subtarget->is64Bit()) { if (Subtarget->isTargetWin64()) return CC_X86_Win64_C; - else if (CC == CallingConv::Fast && PerformTailCallOpt) - return CC_X86_64_TailCall; else return CC_X86_64_C; } @@ -1799,7 +1797,7 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) { Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy()); } else if (IsTailCall) { - unsigned Opc = Is64Bit ? X86::R9 : X86::EAX; + unsigned Opc = Is64Bit ? X86::R11 : X86::EAX; Chain = DAG.getCopyToReg(Chain, dl, DAG.getRegister(Opc, getPointerTy()), @@ -7696,7 +7694,7 @@ static bool EltsFromConsecutiveLoads(ShuffleVectorSDNode *N, unsigned NumElems, SelectionDAG &DAG, MachineFrameInfo *MFI, const TargetLowering &TLI) { LDBase = NULL; - LastLoadedElt = -1; + LastLoadedElt = -1U; for (unsigned i = 0; i < NumElems; ++i) { if (N->getMaskElt(i) < 0) { if (!LDBase) |
