diff options
author | ed <ed@FreeBSD.org> | 2009-06-03 21:10:15 +0000 |
---|---|---|
committer | ed <ed@FreeBSD.org> | 2009-06-03 21:10:15 +0000 |
commit | 1941b8772a36a33c7b86cb67163cd735b3d57221 (patch) | |
tree | db103e2a0755ab86f18c181a2d208a6a63284c97 /lib/Target/PIC16 | |
parent | 036fdcfb2d357cecb320b5a6fd05f4859a63aeba (diff) | |
download | FreeBSD-src-1941b8772a36a33c7b86cb67163cd735b3d57221.zip FreeBSD-src-1941b8772a36a33c7b86cb67163cd735b3d57221.tar.gz |
Import LLVM, at r72805, which fixes PR4315 and PR4316.
Normally I'm not updating sources this often, but I want to get rid of
this breakage, because right now I can't offer a proper source snapshot
yet.
Diffstat (limited to 'lib/Target/PIC16')
-rw-r--r-- | lib/Target/PIC16/PIC16.h | 2 | ||||
-rw-r--r-- | lib/Target/PIC16/PIC16AsmPrinter.cpp | 12 | ||||
-rw-r--r-- | lib/Target/PIC16/PIC16DebugInfo.cpp | 26 | ||||
-rw-r--r-- | lib/Target/PIC16/PIC16DebugInfo.h | 7 | ||||
-rw-r--r-- | lib/Target/PIC16/PIC16ISelLowering.cpp | 34 | ||||
-rw-r--r-- | lib/Target/PIC16/PIC16InstrInfo.cpp | 28 | ||||
-rw-r--r-- | lib/Target/PIC16/PIC16InstrInfo.h | 5 | ||||
-rw-r--r-- | lib/Target/PIC16/PIC16InstrInfo.td | 8 |
8 files changed, 102 insertions, 20 deletions
diff --git a/lib/Target/PIC16/PIC16.h b/lib/Target/PIC16/PIC16.h index 40bed2f..cf0f9db 100644 --- a/lib/Target/PIC16/PIC16.h +++ b/lib/Target/PIC16/PIC16.h @@ -300,9 +300,11 @@ namespace PIC16CC { case PIC16CC::LT: return "lt"; case PIC16CC::ULT: return "lt"; case PIC16CC::LE: return "le"; + case PIC16CC::ULE: return "le"; case PIC16CC::GT: return "gt"; case PIC16CC::UGT: return "gt"; case PIC16CC::GE: return "ge"; + case PIC16CC::UGE: return "ge"; } } diff --git a/lib/Target/PIC16/PIC16AsmPrinter.cpp b/lib/Target/PIC16/PIC16AsmPrinter.cpp index ef3bc4b..b42ee45 100644 --- a/lib/Target/PIC16/PIC16AsmPrinter.cpp +++ b/lib/Target/PIC16/PIC16AsmPrinter.cpp @@ -47,6 +47,7 @@ bool PIC16AsmPrinter::runOnMachineFunction(MachineFunction &MF) { const Function *F = MF.getFunction(); CurrentFnName = Mang->getValueName(F); + DbgInfo.EmitFileDirective(F); // Emit the function variables. EmitFunctionFrame(MF); @@ -181,17 +182,11 @@ void PIC16AsmPrinter::printLibcallDecls(void) { bool PIC16AsmPrinter::doInitialization (Module &M) { bool Result = AsmPrinter::doInitialization(M); - DbgInfo.EmitFileDirective(M); // FIXME:: This is temporary solution to generate the include file. // The processor should be passed to llc as in input and the header file // should be generated accordingly. O << "\n\t#include P16F1937.INC\n"; - MachineModuleInfo *MMI = getAnalysisIfAvailable<MachineModuleInfo>(); - assert(MMI); - DwarfWriter *DW = getAnalysisIfAvailable<DwarfWriter>(); - assert(DW && "Dwarf Writer is not available"); - DW->BeginModule(&M, MMI, O, this, TAI); // Set the section names for all globals. for (Module::global_iterator I = M.global_begin(), E = M.global_end(); @@ -199,13 +194,14 @@ bool PIC16AsmPrinter::doInitialization (Module &M) { I->setSection(TAI->SectionForGlobal(I)->getName()); } + DbgInfo.EmitFileDirective(M); EmitFunctionDecls(M); EmitUndefinedVars(M); EmitDefinedVars(M); EmitIData(M); EmitUData(M); EmitRomData(M); - DbgInfo.PopulateFunctsDI(M); + DbgInfo.PopulateFunctsDI(M); return Result; } @@ -285,7 +281,7 @@ void PIC16AsmPrinter::EmitRomData (Module &M) bool PIC16AsmPrinter::doFinalization(Module &M) { printLibcallDecls(); DbgInfo.EmitVarDebugInfo(M); - O << "\n\t" << ".EOF"; + DbgInfo.EmitEOF(); O << "\n\t" << "END\n"; bool Result = AsmPrinter::doFinalization(M); return Result; diff --git a/lib/Target/PIC16/PIC16DebugInfo.cpp b/lib/Target/PIC16/PIC16DebugInfo.cpp index 4d43811..faf4590 100644 --- a/lib/Target/PIC16/PIC16DebugInfo.cpp +++ b/lib/Target/PIC16/PIC16DebugInfo.cpp @@ -264,7 +264,29 @@ void PIC16DbgInfo::EmitFileDirective(Module &M) { if (CU) { DICompileUnit DIUnit(CU); std::string Dir, FN; - O << "\n\t.file\t\"" << DIUnit.getDirectory(Dir) <<"/" - << DIUnit.getFilename(FN) << "\"" ; + std::string File = DIUnit.getDirectory(Dir) + "/" + DIUnit.getFilename(FN); + O << "\n\t.file\t\"" << File << "\"\n" ; + CurFile = File; } } + +void PIC16DbgInfo::EmitFileDirective(const Function *F) { + std::string FunctName = F->getName(); + DISubprogram *SP = getFunctDI(FunctName); + if (SP) { + std::string Dir, FN; + DICompileUnit CU = SP->getCompileUnit(); + std::string File = CU.getDirectory(Dir) + "/" + CU.getFilename(FN); + if ( File != CurFile) { + EmitEOF(); + O << "\n\t.file\t\"" << File << "\"\n" ; + CurFile = File; + } + } +} + +void PIC16DbgInfo::EmitEOF() { + if (CurFile != "") + O << "\n\t.EOF"; +} + diff --git a/lib/Target/PIC16/PIC16DebugInfo.h b/lib/Target/PIC16/PIC16DebugInfo.h index 96b23da..be39393 100644 --- a/lib/Target/PIC16/PIC16DebugInfo.h +++ b/lib/Target/PIC16/PIC16DebugInfo.h @@ -94,8 +94,11 @@ namespace llvm { std::map <std::string, DISubprogram *> FunctNameMap; raw_ostream &O; const TargetAsmInfo *TAI; + std::string CurFile; public: - PIC16DbgInfo(raw_ostream &o, const TargetAsmInfo *T) : O(o), TAI(T) {} + PIC16DbgInfo(raw_ostream &o, const TargetAsmInfo *T) : O(o), TAI(T) { + CurFile = ""; + } ~PIC16DbgInfo(); void PopulateDebugInfo(DIType Ty, unsigned short &TypeNo, bool &HasAux, int Aux[], std::string &TypeName); @@ -109,6 +112,8 @@ namespace llvm { inline void EmitSymbol(std::string Name, int Class); void EmitVarDebugInfo(Module &M); void EmitFileDirective(Module &M); + void EmitFileDirective(const Function *F); + void EmitEOF(); }; } // end namespace llvm; #endif diff --git a/lib/Target/PIC16/PIC16ISelLowering.cpp b/lib/Target/PIC16/PIC16ISelLowering.cpp index 92fdcb2..0f83fd2 100644 --- a/lib/Target/PIC16/PIC16ISelLowering.cpp +++ b/lib/Target/PIC16/PIC16ISelLowering.cpp @@ -354,16 +354,29 @@ SDValue PIC16TargetLowering::ExpandFrameIndex(SDNode *N, SelectionDAG &DAG) { FrameIndexSDNode *FR = dyn_cast<FrameIndexSDNode>(SDValue(N,0)); // FIXME there isn't really debug info here DebugLoc dl = FR->getDebugLoc(); - int Index = FR->getIndex(); + // FIXME: Not used. + // int Index = FR->getIndex(); // Expand FrameIndex like GlobalAddress and ExternalSymbol // Also use Offset field for lo and hi parts. The default // offset is zero. + + /* SDValue Offset = DAG.getConstant(0, MVT::i8); SDValue FI = DAG.getTargetFrameIndex(Index, MVT::i8); SDValue Lo = DAG.getNode(PIC16ISD::Lo, dl, MVT::i8, FI, Offset); SDValue Hi = DAG.getNode(PIC16ISD::Hi, dl, MVT::i8, FI, Offset); return DAG.getNode(ISD::BUILD_PAIR, dl, N->getValueType(0), Lo, Hi); + */ + + SDValue ES; + int FrameOffset; + SDValue FI = SDValue(N,0); + LegalizeFrameIndex(FI, DAG, ES, FrameOffset); + SDValue Offset = DAG.getConstant(FrameOffset, MVT::i8); + SDValue Lo = DAG.getNode(PIC16ISD::Lo, dl, MVT::i8, ES, Offset); + SDValue Hi = DAG.getNode(PIC16ISD::Hi, dl, MVT::i8, ES, Offset); + return DAG.getNode(ISD::BUILD_PAIR, dl, N->getValueType(0), Lo, Hi); } @@ -626,12 +639,22 @@ void PIC16TargetLowering::LegalizeAddress(SDValue Ptr, SelectionDAG &DAG, // Expansion of FrameIndex has Lo/Hi parts if (isDirectAddress(Ptr)) { SDValue TFI = Ptr.getOperand(0).getOperand(0); + int FrameOffset; if (TFI.getOpcode() == ISD::TargetFrameIndex) { - int FrameOffset; LegalizeFrameIndex(TFI, DAG, Lo, FrameOffset); Hi = DAG.getConstant(1, MVT::i8); Offset += FrameOffset; return; + } else if (TFI.getOpcode() == ISD::TargetExternalSymbol) { + // FrameIndex has already been expanded. + // Now just make use of its expansion + Lo = TFI; + Hi = DAG.getConstant(1, MVT::i8); + SDValue FOffset = Ptr.getOperand(0).getOperand(1); + assert (FOffset.getOpcode() == ISD::Constant && + "Invalid operand of PIC16ISD::Lo"); + Offset += dyn_cast<ConstantSDNode>(FOffset)->getZExtValue(); + return; } } @@ -721,7 +744,8 @@ SDValue PIC16TargetLowering::ExpandLoad(SDNode *N, SelectionDAG &DAG) { for (iter=MemBytes; iter<ExtdBytes; ++iter) { PICLoads.push_back(SRA); } - } else if (ISD::isZEXTLoad(N)) { + } else if (ISD::isZEXTLoad(N) || ISD::isEXTLoad(N)) { + //} else if (ISD::isZEXTLoad(N)) { // ZeroExtendedLoad -- For all ExtdBytes use constant 0 SDValue ConstZero = DAG.getConstant(0, MVT::i8); for (iter=MemBytes; iter<ExtdBytes; ++iter) { @@ -1557,8 +1581,8 @@ static PIC16CC::CondCodes IntCCToPIC16CC(ISD::CondCode CC) { case ISD::SETLT: return PIC16CC::LT; case ISD::SETLE: return PIC16CC::LE; case ISD::SETULT: return PIC16CC::ULT; - case ISD::SETULE: return PIC16CC::LE; - case ISD::SETUGE: return PIC16CC::GE; + case ISD::SETULE: return PIC16CC::ULE; + case ISD::SETUGE: return PIC16CC::UGE; case ISD::SETUGT: return PIC16CC::UGT; } } diff --git a/lib/Target/PIC16/PIC16InstrInfo.cpp b/lib/Target/PIC16/PIC16InstrInfo.cpp index 2a769e8..8418423 100644 --- a/lib/Target/PIC16/PIC16InstrInfo.cpp +++ b/lib/Target/PIC16/PIC16InstrInfo.cpp @@ -184,3 +184,31 @@ bool PIC16InstrInfo::isMoveInstr(const MachineInstr &MI, return false; } +/// InsertBranch - Insert a branch into the end of the specified +/// MachineBasicBlock. This operands to this method are the same as those +/// returned by AnalyzeBranch. This is invoked in cases where AnalyzeBranch +/// returns success and when an unconditional branch (TBB is non-null, FBB is +/// null, Cond is empty) needs to be inserted. It returns the number of +/// instructions inserted. +unsigned PIC16InstrInfo:: +InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, + MachineBasicBlock *FBB, + const SmallVectorImpl<MachineOperand> &Cond) const { + // Shouldn't be a fall through. + assert(TBB && "InsertBranch must not be told to insert a fallthrough"); + + if (FBB == 0) { // One way branch. + if (Cond.empty()) { + // Unconditional branch? + DebugLoc dl = DebugLoc::getUnknownLoc(); + BuildMI(&MBB, dl, get(PIC16::br_uncond)).addMBB(TBB); + } + return 1; + } + + // FIXME: If the there are some conditions specified then conditional branch + // should be generated. + // For the time being no instruction is being generated therefore + // returning NULL. + return 0; +} diff --git a/lib/Target/PIC16/PIC16InstrInfo.h b/lib/Target/PIC16/PIC16InstrInfo.h index 0b67679..85c0984 100644 --- a/lib/Target/PIC16/PIC16InstrInfo.h +++ b/lib/Target/PIC16/PIC16InstrInfo.h @@ -64,6 +64,11 @@ public: unsigned &SrcReg, unsigned &DstReg, unsigned &SrcSubIdx, unsigned &DstSubIdx) const; + virtual + unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, + MachineBasicBlock *FBB, + const SmallVectorImpl<MachineOperand> &Cond) const; + }; } // namespace llvm diff --git a/lib/Target/PIC16/PIC16InstrInfo.td b/lib/Target/PIC16/PIC16InstrInfo.td index c572188..7557716 100644 --- a/lib/Target/PIC16/PIC16InstrInfo.td +++ b/lib/Target/PIC16/PIC16InstrInfo.td @@ -189,22 +189,22 @@ def movlw : BitFormat<12, (outs GPR:$dst), (ins i8imm:$src), // Move a Lo(TGA) to W. def movlw_lo_1 : BitFormat<12, (outs GPR:$dst), (ins i8imm:$src, i8imm:$src2), - "movlw LOW(${src}) + ${src2}", + "movlw LOW(${src} + ${src2})", [(set GPR:$dst, (PIC16Lo tglobaladdr:$src, imm:$src2 ))]>; // Move a Lo(TES) to W. def movlw_lo_2 : BitFormat<12, (outs GPR:$dst), (ins i8imm:$src, i8imm:$src2), - "movlw LOW(${src}) + ${src2}", + "movlw LOW(${src} + ${src2})", [(set GPR:$dst, (PIC16Lo texternalsym:$src, imm:$src2 ))]>; // Move a Hi(TGA) to W. def movlw_hi_1 : BitFormat<12, (outs GPR:$dst), (ins i8imm:$src, i8imm:$src2), - "movlw HIGH(${src}) + ${src2}", + "movlw HIGH(${src} + ${src2})", [(set GPR:$dst, (PIC16Hi tglobaladdr:$src, imm:$src2))]>; // Move a Hi(TES) to W. def movlw_hi_2 : BitFormat<12, (outs GPR:$dst), (ins i8imm:$src, i8imm:$src2), - "movlw HIGH(${src}) + ${src2}", + "movlw HIGH(${src} + ${src2})", [(set GPR:$dst, (PIC16Hi texternalsym:$src, imm:$src2))]>; } |