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author | dim <dim@FreeBSD.org> | 2012-04-14 13:54:10 +0000 |
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committer | dim <dim@FreeBSD.org> | 2012-04-14 13:54:10 +0000 |
commit | 1fc08f5e9ef733ef1ce6f363fecedc2260e78974 (patch) | |
tree | 19c69a04768629f2d440944b71cbe90adae0b615 /lib/Target/Mips/MipsExpandPseudo.cpp | |
parent | 07637c87f826cdf411f0673595e9bc92ebd793f2 (diff) | |
download | FreeBSD-src-1fc08f5e9ef733ef1ce6f363fecedc2260e78974.zip FreeBSD-src-1fc08f5e9ef733ef1ce6f363fecedc2260e78974.tar.gz |
Vendor import of llvm trunk r154661:
http://llvm.org/svn/llvm-project/llvm/trunk@r154661
Diffstat (limited to 'lib/Target/Mips/MipsExpandPseudo.cpp')
-rw-r--r-- | lib/Target/Mips/MipsExpandPseudo.cpp | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/lib/Target/Mips/MipsExpandPseudo.cpp b/lib/Target/Mips/MipsExpandPseudo.cpp index a622258..baeae97 100644 --- a/lib/Target/Mips/MipsExpandPseudo.cpp +++ b/lib/Target/Mips/MipsExpandPseudo.cpp @@ -1,4 +1,4 @@ -//===-- MipsExpandPseudo.cpp - Expand pseudo instructions ----------------===// +//===-- MipsExpandPseudo.cpp - Expand Pseudo Instructions ----------------===// // // The LLVM Compiler Infrastructure // @@ -64,16 +64,22 @@ bool MipsExpandPseudo::runOnMachineBasicBlock(MachineBasicBlock& MBB) { const MCInstrDesc& MCid = I->getDesc(); switch(MCid.getOpcode()) { - default: + default: ++I; continue; + case Mips::SETGP2: + // Convert "setgp2 $globalreg, $t9" to "addu $globalreg, $v0, $t9" + BuildMI(MBB, I, I->getDebugLoc(), TII->get(Mips::ADDu), + I->getOperand(0).getReg()) + .addReg(Mips::V0).addReg(I->getOperand(1).getReg()); + break; case Mips::BuildPairF64: ExpandBuildPairF64(MBB, I); break; case Mips::ExtractElementF64: ExpandExtractElementF64(MBB, I); break; - } + } // delete original instr MBB.erase(I++); @@ -84,12 +90,12 @@ bool MipsExpandPseudo::runOnMachineBasicBlock(MachineBasicBlock& MBB) { } void MipsExpandPseudo::ExpandBuildPairF64(MachineBasicBlock& MBB, - MachineBasicBlock::iterator I) { + MachineBasicBlock::iterator I) { unsigned DstReg = I->getOperand(0).getReg(); unsigned LoReg = I->getOperand(1).getReg(), HiReg = I->getOperand(2).getReg(); const MCInstrDesc& Mtc1Tdd = TII->get(Mips::MTC1); DebugLoc dl = I->getDebugLoc(); - const unsigned* SubReg = + const uint16_t* SubReg = TM.getRegisterInfo()->getSubRegisters(DstReg); // mtc1 Lo, $fp @@ -105,12 +111,12 @@ void MipsExpandPseudo::ExpandExtractElementF64(MachineBasicBlock& MBB, unsigned N = I->getOperand(2).getImm(); const MCInstrDesc& Mfc1Tdd = TII->get(Mips::MFC1); DebugLoc dl = I->getDebugLoc(); - const unsigned* SubReg = TM.getRegisterInfo()->getSubRegisters(SrcReg); + const uint16_t* SubReg = TM.getRegisterInfo()->getSubRegisters(SrcReg); BuildMI(MBB, I, dl, Mfc1Tdd, DstReg).addReg(*(SubReg + N)); } -/// createMipsMipsExpandPseudoPass - Returns a pass that expands pseudo +/// createMipsMipsExpandPseudoPass - Returns a pass that expands pseudo /// instrs into real instrs FunctionPass *llvm::createMipsExpandPseudoPass(MipsTargetMachine &tm) { return new MipsExpandPseudo(tm); |