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authordim <dim@FreeBSD.org>2011-12-09 18:27:22 +0000
committerdim <dim@FreeBSD.org>2011-12-09 18:27:22 +0000
commit07637c87f826cdf411f0673595e9bc92ebd793f2 (patch)
treed5baf24dba561bcf8bc6ec60db36bfc5586f6378 /lib/Target/Mips/MipsCodeEmitter.cpp
parent7b3392326c40c3c20697816acae597ba7b3144eb (diff)
downloadFreeBSD-src-07637c87f826cdf411f0673595e9bc92ebd793f2.zip
FreeBSD-src-07637c87f826cdf411f0673595e9bc92ebd793f2.tar.gz
Vendor import of llvm 3.0 final release:
http://llvm.org/svn/llvm-project/llvm/tags/RELEASE_30/final@145349
Diffstat (limited to 'lib/Target/Mips/MipsCodeEmitter.cpp')
-rw-r--r--lib/Target/Mips/MipsCodeEmitter.cpp31
1 files changed, 26 insertions, 5 deletions
diff --git a/lib/Target/Mips/MipsCodeEmitter.cpp b/lib/Target/Mips/MipsCodeEmitter.cpp
index 9220d9c..23fabe3 100644
--- a/lib/Target/Mips/MipsCodeEmitter.cpp
+++ b/lib/Target/Mips/MipsCodeEmitter.cpp
@@ -105,6 +105,9 @@ class MipsCodeEmitter : public MachineFunctionPass {
unsigned getRelocation(const MachineInstr &MI,
const MachineOperand &MO) const;
+ unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
+ unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const;
+ unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const;
};
}
@@ -153,6 +156,28 @@ unsigned MipsCodeEmitter::getRelocation(const MachineInstr &MI,
return Mips::reloc_mips_lo;
}
+unsigned MipsCodeEmitter::getMemEncoding(const MachineInstr &MI,
+ unsigned OpNo) const {
+ // Base register is encoded in bits 20-16, offset is encoded in bits 15-0.
+ assert(MI.getOperand(OpNo).isReg());
+ unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16;
+ return
+ (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits;
+}
+
+unsigned MipsCodeEmitter::getSizeExtEncoding(const MachineInstr &MI,
+ unsigned OpNo) const {
+ // size is encoded as size-1.
+ return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
+}
+
+unsigned MipsCodeEmitter::getSizeInsEncoding(const MachineInstr &MI,
+ unsigned OpNo) const {
+ // size is encoded as pos+size-1.
+ return getMachineOpValue(MI, MI.getOperand(OpNo-1)) +
+ getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
+}
+
/// getMachineOpValue - Return binary encoding of operand. If the machine
/// operand requires relocation, record the relocation and return zero.
unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI,
@@ -238,8 +263,4 @@ FunctionPass *llvm::createMipsJITCodeEmitterPass(MipsTargetMachine &TM,
return new MipsCodeEmitter(TM, JCE);
}
-unsigned MipsCodeEmitter::getBinaryCodeForInstr(const MachineInstr &MI) const {
- // this function will be automatically generated by the CodeEmitterGenerator
- // using TableGen
- return 0;
-}
+#include "MipsGenCodeEmitter.inc"
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