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author | rdivacky <rdivacky@FreeBSD.org> | 2010-03-03 17:27:15 +0000 |
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committer | rdivacky <rdivacky@FreeBSD.org> | 2010-03-03 17:27:15 +0000 |
commit | 8230c40430a1325b5cc5bc0221931487b4bd573c (patch) | |
tree | 836a05cff50ca46176117b86029f061fa4db54f0 /lib/Target/MSP430/MSP430ISelLowering.cpp | |
parent | f25ddd991a5601d0101602c4c263a58c7af4b8a2 (diff) | |
download | FreeBSD-src-8230c40430a1325b5cc5bc0221931487b4bd573c.zip FreeBSD-src-8230c40430a1325b5cc5bc0221931487b4bd573c.tar.gz |
Update LLVM to 97654.
Diffstat (limited to 'lib/Target/MSP430/MSP430ISelLowering.cpp')
-rw-r--r-- | lib/Target/MSP430/MSP430ISelLowering.cpp | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp index 7281b37..e6c7e1e 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -795,18 +795,15 @@ SDValue MSP430TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) { if (andCC) { // C = ~Z, thus Res = SRW & 1, no processing is required } else { - // Res = (SRW >> 1) & 1 + // Res = ~((SRW >> 1) & 1) Shift = true; + Invert = true; } break; case MSP430CC::COND_E: - if (andCC) { - // C = ~Z, thus Res = ~(SRW & 1) - } else { - // Res = ~((SRW >> 1) & 1) - Shift = true; - } - Invert = true; + Shift = true; + // C = ~Z for AND instruction, thus we can put Res = ~(SRW & 1), however, + // Res = (SRW >> 1) & 1 is 1 word shorter. break; } EVT VT = Op.getValueType(); |