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authordim <dim@FreeBSD.org>2013-06-10 20:36:52 +0000
committerdim <dim@FreeBSD.org>2013-06-10 20:36:52 +0000
commitaa45f148926e3461a1fd8b10c990f0a51a908cc9 (patch)
tree909310b2e05119d1d6efda049977042abbb58bb1 /lib/Target/Hexagon/HexagonTargetMachine.cpp
parent169d2bd06003c39970bc94c99669a34b61bb7e45 (diff)
downloadFreeBSD-src-aa45f148926e3461a1fd8b10c990f0a51a908cc9.zip
FreeBSD-src-aa45f148926e3461a1fd8b10c990f0a51a908cc9.tar.gz
Vendor import of llvm tags/RELEASE_33/final r183502 (effectively, 3.3
release): http://llvm.org/svn/llvm-project/llvm/tags/RELEASE_33/final@183502
Diffstat (limited to 'lib/Target/Hexagon/HexagonTargetMachine.cpp')
-rw-r--r--lib/Target/Hexagon/HexagonTargetMachine.cpp63
1 files changed, 34 insertions, 29 deletions
diff --git a/lib/Target/Hexagon/HexagonTargetMachine.cpp b/lib/Target/Hexagon/HexagonTargetMachine.cpp
index ce45c62..caa1ba4 100644
--- a/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -25,19 +25,17 @@
using namespace llvm;
-static cl::
-opt<bool> DisableHardwareLoops(
- "disable-hexagon-hwloops", cl::Hidden,
- cl::desc("Disable Hardware Loops for Hexagon target"));
+static cl:: opt<bool> DisableHardwareLoops("disable-hexagon-hwloops",
+ cl::Hidden, cl::desc("Disable Hardware Loops for Hexagon target"));
-static cl::
-opt<bool> DisableHexagonMISched("disable-hexagon-misched",
- cl::Hidden, cl::ZeroOrMore, cl::init(false),
- cl::desc("Disable Hexagon MI Scheduling"));
+static cl::opt<bool> DisableHexagonMISched("disable-hexagon-misched",
+ cl::Hidden, cl::ZeroOrMore, cl::init(false),
+ cl::desc("Disable Hexagon MI Scheduling"));
static cl::opt<bool> DisableHexagonCFGOpt("disable-hexagon-cfgopt",
- cl::Hidden, cl::ZeroOrMore, cl::init(false),
- cl::desc("Disable Hexagon CFG Optimization"));
+ cl::Hidden, cl::ZeroOrMore, cl::init(false),
+ cl::desc("Disable Hexagon CFG Optimization"));
+
/// HexagonTargetMachineModule - Note that this is used on hosts that
/// cannot link in a library unless there are references into the
@@ -126,55 +124,62 @@ TargetPassConfig *HexagonTargetMachine::createPassConfig(PassManagerBase &PM) {
}
bool HexagonPassConfig::addInstSelector() {
+ const HexagonTargetMachine &TM = getHexagonTargetMachine();
+ bool NoOpt = (getOptLevel() == CodeGenOpt::None);
- if (getOptLevel() != CodeGenOpt::None)
- addPass(createHexagonRemoveExtendOps(getHexagonTargetMachine()));
+ if (!NoOpt)
+ addPass(createHexagonRemoveExtendArgs(TM));
- addPass(createHexagonISelDag(getHexagonTargetMachine(), getOptLevel()));
+ addPass(createHexagonISelDag(TM, getOptLevel()));
- if (getOptLevel() != CodeGenOpt::None)
+ if (!NoOpt) {
addPass(createHexagonPeephole());
+ printAndVerify("After hexagon peephole pass");
+ }
return false;
}
-
bool HexagonPassConfig::addPreRegAlloc() {
- if (!DisableHardwareLoops && getOptLevel() != CodeGenOpt::None)
- addPass(createHexagonHardwareLoops());
+ if (getOptLevel() != CodeGenOpt::None)
+ if (!DisableHardwareLoops)
+ addPass(createHexagonHardwareLoops());
return false;
}
bool HexagonPassConfig::addPostRegAlloc() {
- if (!DisableHexagonCFGOpt && getOptLevel() != CodeGenOpt::None)
- addPass(createHexagonCFGOptimizer(getHexagonTargetMachine()));
- return true;
+ const HexagonTargetMachine &TM = getHexagonTargetMachine();
+ if (getOptLevel() != CodeGenOpt::None)
+ if (!DisableHexagonCFGOpt)
+ addPass(createHexagonCFGOptimizer(TM));
+ return false;
}
-
bool HexagonPassConfig::addPreSched2() {
if (getOptLevel() != CodeGenOpt::None)
addPass(&IfConverterID);
- return true;
+ return false;
}
bool HexagonPassConfig::addPreEmitPass() {
+ const HexagonTargetMachine &TM = getHexagonTargetMachine();
+ bool NoOpt = (getOptLevel() == CodeGenOpt::None);
- if (!DisableHardwareLoops && getOptLevel() != CodeGenOpt::None)
- addPass(createHexagonFixupHwLoops());
-
- if (getOptLevel() != CodeGenOpt::None)
+ if (!NoOpt)
addPass(createHexagonNewValueJump());
// Expand Spill code for predicate registers.
- addPass(createHexagonExpandPredSpillCode(getHexagonTargetMachine()));
+ addPass(createHexagonExpandPredSpillCode(TM));
// Split up TFRcondsets into conditional transfers.
- addPass(createHexagonSplitTFRCondSets(getHexagonTargetMachine()));
+ addPass(createHexagonSplitTFRCondSets(TM));
// Create Packets.
- if (getOptLevel() != CodeGenOpt::None)
+ if (!NoOpt) {
+ if (!DisableHardwareLoops)
+ addPass(createHexagonFixupHwLoops());
addPass(createHexagonPacketizer());
+ }
return false;
}
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