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author | dim <dim@FreeBSD.org> | 2012-08-15 19:34:23 +0000 |
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committer | dim <dim@FreeBSD.org> | 2012-08-15 19:34:23 +0000 |
commit | 721c201bd55ffb73cb2ba8d39e0570fa38c44e15 (patch) | |
tree | eacfc83d988e4b9d11114387ae7dc41243f2a363 /lib/Target/Hexagon/HexagonSubtarget.cpp | |
parent | 2b2816e083a455f7a656ae88b0fd059d1688bb36 (diff) | |
download | FreeBSD-src-721c201bd55ffb73cb2ba8d39e0570fa38c44e15.zip FreeBSD-src-721c201bd55ffb73cb2ba8d39e0570fa38c44e15.tar.gz |
Vendor import of llvm trunk r161861:
http://llvm.org/svn/llvm-project/llvm/trunk@161861
Diffstat (limited to 'lib/Target/Hexagon/HexagonSubtarget.cpp')
-rw-r--r-- | lib/Target/Hexagon/HexagonSubtarget.cpp | 28 |
1 files changed, 22 insertions, 6 deletions
diff --git a/lib/Target/Hexagon/HexagonSubtarget.cpp b/lib/Target/Hexagon/HexagonSubtarget.cpp index 654d336..5d087db 100644 --- a/lib/Target/Hexagon/HexagonSubtarget.cpp +++ b/lib/Target/Hexagon/HexagonSubtarget.cpp @@ -13,6 +13,7 @@ #include "HexagonSubtarget.h" #include "Hexagon.h" +#include "HexagonRegisterInfo.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/ErrorHandling.h" using namespace llvm; @@ -29,11 +30,17 @@ static cl::opt<bool> EnableMemOps( "enable-hexagon-memops", cl::Hidden, cl::ZeroOrMore, cl::ValueDisallowed, - cl::desc("Generate V4 MEMOP in code generation for Hexagon target")); + cl::desc("Generate V4 memop instructions.")); + +static cl::opt<bool> +EnableIEEERndNear( + "enable-hexagon-ieee-rnd-near", + cl::Hidden, cl::ZeroOrMore, cl::init(false), + cl::desc("Generate non-chopped conversion from fp to int.")); HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS): HexagonGenSubtargetInfo(TT, CPU, FS), - HexagonArchVersion(V1), + HexagonArchVersion(V2), CPUString(CPU.str()) { ParseSubtargetFeatures(CPU, FS); @@ -45,18 +52,27 @@ HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS): break; case HexagonSubtarget::V4: break; + case HexagonSubtarget::V5: + break; default: - llvm_unreachable("Unknown Architecture Version."); + // If the programmer has not specified a Hexagon version, default + // to -mv4. + CPUString = "hexagonv4"; + HexagonArchVersion = HexagonSubtarget::V4; + break; } // Initialize scheduling itinerary for the specified CPU. InstrItins = getInstrItineraryForCPU(CPUString); - // Max issue per cycle == bundle width. - InstrItins.IssueWidth = 4; - if (EnableMemOps) UseMemOps = true; else UseMemOps = false; + + if (EnableIEEERndNear) + ModeIEEERndNear = true; + else + ModeIEEERndNear = false; } + |