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| author | rdivacky <rdivacky@FreeBSD.org> | 2009-11-18 14:58:34 +0000 |
|---|---|---|
| committer | rdivacky <rdivacky@FreeBSD.org> | 2009-11-18 14:58:34 +0000 |
| commit | d2e985fd323c167e20f77b045a1d99ad166e65db (patch) | |
| tree | 6a111e552c75afc66228e3d8f19b6731e4013f10 /lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp | |
| parent | ded64d5d348ce8d8c5aa42cf63f6de9dd84b7e89 (diff) | |
| download | FreeBSD-src-d2e985fd323c167e20f77b045a1d99ad166e65db.zip FreeBSD-src-d2e985fd323c167e20f77b045a1d99ad166e65db.tar.gz | |
Update LLVM to r89205.
Diffstat (limited to 'lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp')
| -rw-r--r-- | lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp b/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp index 8686961..c49fee3 100644 --- a/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp @@ -137,6 +137,7 @@ void ARMMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { case MachineOperand::MO_Register: // Ignore all implicit register operands. if (MO.isImplicit()) continue; + assert(!MO.getSubReg() && "Subregs should be eliminated!"); MCOp = MCOperand::CreateReg(MO.getReg()); break; case MachineOperand::MO_Immediate: |
