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| author | ed <ed@FreeBSD.org> | 2009-06-22 08:08:12 +0000 |
|---|---|---|
| committer | ed <ed@FreeBSD.org> | 2009-06-22 08:08:12 +0000 |
| commit | a4c19d68f13cf0a83bc0da53bd6d547fcaf635fe (patch) | |
| tree | 86c1bc482baa6c81fc70b8d715153bfa93377186 /lib/Target/ARM/ARMCodeEmitter.cpp | |
| parent | db89e312d968c258aba3c79c1c398f5fb19267a3 (diff) | |
| download | FreeBSD-src-a4c19d68f13cf0a83bc0da53bd6d547fcaf635fe.zip FreeBSD-src-a4c19d68f13cf0a83bc0da53bd6d547fcaf635fe.tar.gz | |
Update LLVM sources to r73879.
Diffstat (limited to 'lib/Target/ARM/ARMCodeEmitter.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMCodeEmitter.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 44fac12..f6629fe 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -900,6 +900,10 @@ void Emitter<CodeEmitter>::emitMiscLoadStoreInstruction(const MachineInstr &MI, // Set first operand Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdShift; + // Skip LDRD and STRD's second operand. + if (TID.Opcode == ARM::LDRD || TID.Opcode == ARM::STRD) + ++OpIdx; + // Set second operand if (ImplicitRn) // Special handling for implicit use (e.g. PC). |
