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author | rdivacky <rdivacky@FreeBSD.org> | 2010-04-02 08:54:30 +0000 |
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committer | rdivacky <rdivacky@FreeBSD.org> | 2010-04-02 08:54:30 +0000 |
commit | 20e856b2a58d12231aa42d5d13888b15ac03e5a4 (patch) | |
tree | cf5763d092b81cecc168fa28032247ee495d06e2 /lib/CodeGen/VirtRegRewriter.cpp | |
parent | 2f2afc1aae898651e26987a5c71f3febb19bca98 (diff) | |
download | FreeBSD-src-20e856b2a58d12231aa42d5d13888b15ac03e5a4.zip FreeBSD-src-20e856b2a58d12231aa42d5d13888b15ac03e5a4.tar.gz |
Update LLVM to r100181.
Diffstat (limited to 'lib/CodeGen/VirtRegRewriter.cpp')
-rw-r--r-- | lib/CodeGen/VirtRegRewriter.cpp | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/lib/CodeGen/VirtRegRewriter.cpp b/lib/CodeGen/VirtRegRewriter.cpp index 44d5311..0b7fde7 100644 --- a/lib/CodeGen/VirtRegRewriter.cpp +++ b/lib/CodeGen/VirtRegRewriter.cpp @@ -572,6 +572,9 @@ static bool InvalidateRegDef(MachineBasicBlock::iterator I, static void UpdateKills(MachineInstr &MI, const TargetRegisterInfo* TRI, BitVector &RegKills, std::vector<MachineOperand*> &KillOps) { + // These do not affect kill info at all. + if (MI.isDebugValue()) + return; for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { MachineOperand &MO = MI.getOperand(i); if (!MO.isReg() || !MO.isUse() || MO.isUndef()) @@ -987,10 +990,17 @@ static unsigned FindFreeRegister(MachineBasicBlock::iterator MII, SmallVector<unsigned, 4> Kills; // Take a look at 2 instructions at most. - for (unsigned Count = 0; Count < 2; ++Count) { + unsigned Count = 0; + while (Count < 2) { if (MII == MBB.begin()) break; MachineInstr *PrevMI = prior(MII); + MII = PrevMI; + + if (PrevMI->isDebugValue()) + continue; // Skip over dbg_value instructions. + ++Count; + for (unsigned i = 0, e = PrevMI->getNumOperands(); i != e; ++i) { MachineOperand &MO = PrevMI->getOperand(i); if (!MO.isReg() || MO.getReg() == 0) @@ -1019,8 +1029,6 @@ static unsigned FindFreeRegister(MachineBasicBlock::iterator MII, for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) Uses.set(*AS); } - - MII = PrevMI; } return 0; @@ -1210,6 +1218,9 @@ OptimizeByUnfold2(unsigned VirtReg, int SS, std::vector<MachineOperand*> &KillOps) { MachineBasicBlock::iterator NextMII = llvm::next(MII); + // Skip over dbg_value instructions. + while (NextMII != MBB->end() && NextMII->isDebugValue()) + NextMII = llvm::next(NextMII); if (NextMII == MBB->end()) return false; @@ -1274,6 +1285,9 @@ OptimizeByUnfold2(unsigned VirtReg, int SS, VRM->RemoveMachineInstrFromMaps(&NextMI); MBB->erase(&NextMI); ++NumModRefUnfold; + // Skip over dbg_value instructions. + while (NextMII != MBB->end() && NextMII->isDebugValue()) + NextMII = llvm::next(NextMII); if (NextMII == MBB->end()) break; } while (FoldsStackSlotModRef(*NextMII, SS, PhysReg, TII, TRI, *VRM)); @@ -1619,7 +1633,7 @@ TransferDeadness(unsigned Reg, BitVector &RegKills, for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(Reg), RE = MRI->reg_end(); RI != RE; ++RI) { MachineInstr *UDMI = &*RI; - if (UDMI->getParent() != MBB) + if (UDMI->isDebugValue() || UDMI->getParent() != MBB) continue; DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UDMI); if (DI == DistanceMap.end()) |