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| author | gonzo <gonzo@FreeBSD.org> | 2012-08-15 03:21:56 +0000 |
|---|---|---|
| committer | gonzo <gonzo@FreeBSD.org> | 2012-08-15 03:21:56 +0000 |
| commit | b501ab9dc953c1526e2383baf8e4a5c4165d7c7e (patch) | |
| tree | d932e4ed6baded4e0705e97bb5e3d07841b77019 /gnu/usr.bin/binutils/libbfd | |
| parent | 0c19fd41e201fbcbf4ce5cb949c595c01a9ad102 (diff) | |
| download | FreeBSD-src-b501ab9dc953c1526e2383baf8e4a5c4165d7c7e.zip FreeBSD-src-b501ab9dc953c1526e2383baf8e4a5c4165d7c7e.tar.gz | |
Merging of projects/armv6, part 3
r238211:
Support TARGET_ARCH=armv6 and TARGET_ARCH=armv6eb
This adds a new TARGET_ARCH for building on ARM
processors that support the ARMv6K multiprocessor
extensions. In particular, these processors have
better support for TLS and mutex operations.
This mostly touches a lot of Makefiles to extend
existing patterns for inferring CPUARCH from ARCH.
It also configures:
* GCC to default to arm1176jz-s
* GCC to predefine __FreeBSD_ARCH_armv6__
* gas to default to ARM_ARCH_V6K
* uname -p to return 'armv6'
* make so that MACHINE_ARCH defaults to 'armv6'
It also changes a number of headers to use
the compiler __ARM_ARCH_XXX__ macros to configure
processor-specific support routines.
Submitted by: Tim Kientzle <kientzle@freebsd.org>
Diffstat (limited to 'gnu/usr.bin/binutils/libbfd')
| -rw-r--r-- | gnu/usr.bin/binutils/libbfd/Makefile.arm | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gnu/usr.bin/binutils/libbfd/Makefile.arm b/gnu/usr.bin/binutils/libbfd/Makefile.arm index 4910f38..8674b19 100644 --- a/gnu/usr.bin/binutils/libbfd/Makefile.arm +++ b/gnu/usr.bin/binutils/libbfd/Makefile.arm @@ -1,6 +1,6 @@ # $FreeBSD$ -.if ${TARGET_ARCH} == "armeb" +.if ${TARGET_ARCH} == "armeb" || ${TARGET_ARCH} == "armv6eb" DEFAULT_VECTOR= bfd_elf32_bigarm_vec .else DEFAULT_VECTOR= bfd_elf32_littlearm_vec @@ -14,7 +14,7 @@ SRCS+= cpu-arm.c \ elflink.c VECS+= ${DEFAULT_VECTOR} -.if ${TARGET_ARCH} == "armeb" +.if ${TARGET_ARCH} == "armeb" || ${TARGET_ARCH} == "armv6eb" VECS+= bfd_elf32_littlearm_vec .else VECS+= bfd_elf32_bigarm_vec |
