Add TARGET_ARCH=mipsel and TARGET_ARCH=mipseb as a valid targets.

Unlike the unisex architecutres we've had so far, mips is bisexual.
These tools can produce either byte sex, and the compiler/make
determines the proper gender to use.  Otherwise, we'd have to have had
mipsel and mipseb in all the places that we have just mips.  And there
are other complications with doing that (binutils doesn't like to
build mips tools without both byte genders, it seems).

Introduced BINUTIL_ARCH so that other bisexual architectures can a
generic mechanism.

We cannot just define MACHINE_ARCH as mips because we need to
differentiate big and little endian types of binaries.  Discussions on
freebsd-arch have hashed out this issue (and the parallel libc
issues).  NetBSD is moving towards mipsel and mipseb for their two
flavors of mips ports (in time for 1.4, if this change hasn't already
been accomplished).

I've been building i386 worlds with this tree for a three months with
these files in place with no ill effects.

1 files changed, 47 insertions, 0 deletions

diff --git a/gnu/usr.bin/binutils/as/mips-freebsd/itbl-cpu.h b/gnu/usr.bin/binutils/as/mips-freebsd/itbl-cpu.h
new file mode 100644
index 0000000..f6482bd
--- /dev/null
+++ b/gnu/usr.bin/binutils/as/mips-freebsd/itbl-cpu.h
@@ -0,0 +1,47 @@
+
+/* itbl-mips.h
+
+   Copyright (C) 1997  Free Software Foundation, Inc.
+
+   This file is part of GAS, the GNU Assembler.
+
+   GAS is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2, or (at your option)
+   any later version.
+
+   GAS is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GAS; see the file COPYING.  If not, write to the Free
+   Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+   02111-1307, USA.  */
+
+/* Defines for Mips itbl cop support */
+
+#include "opcode/mips.h"
+
+/* Values for processors will be from 0 to NUMBER_OF_PROCESSORS-1 */
+#define NUMBER_OF_PROCESSORS 4
+#define MAX_BITPOS 31
+
+/* Mips specifics */
+#define MIPS_OPCODE_COP0 (0x21)	/* COPz+CO, bits 31-25: 0100zz1 */
+#define MIPS_ENCODE_COP_NUM(z) ((MIPS_OPCODE_COP0|z<<1)<<25)
+#define MIPS_IS_COP_INSN(insn) ((MIPS_OPCODE_COP0&(insn>>25)) \
+	== MIPS_OPCODE_COP0)
+#define MIPS_DECODE_COP_NUM(insn) ((~MIPS_OPCODE_COP0&(insn>>25))>>1)
+#define MIPS_DECODE_COP_COFUN(insn) ((~MIPS_ENCODE_COP_NUM(3))&(insn))
+
+/* definitions required by generic code */
+#define ITBL_IS_INSN(insn) MIPS_IS_COP_INSN(insn)
+#define ITBL_DECODE_PNUM(insn) MIPS_DECODE_COP_NUM(insn)
+#define ITBL_ENCODE_PNUM(pnum) MIPS_ENCODE_COP_NUM(pnum)
+
+#define ITBL_OPCODE_STRUCT mips_opcode
+#define ITBL_OPCODES mips_opcodes
+#define ITBL_NUM_OPCODES NUMOPCODES
+#define ITBL_NUM_MACROS M_NUM_MACROS