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author | ian <ian@FreeBSD.org> | 2016-01-24 19:34:05 +0000 |
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committer | ian <ian@FreeBSD.org> | 2016-01-24 19:34:05 +0000 |
commit | d712f850e62ac7192f336961e719ce41ed1ea4b9 (patch) | |
tree | 175cf68a0ad511e246764c76b82c94ac2c1f55e5 /etc/nscd.conf | |
parent | 6e826779c72ba605eb445362d8558a6233a9a7c8 (diff) | |
download | FreeBSD-src-d712f850e62ac7192f336961e719ce41ed1ea4b9.zip FreeBSD-src-d712f850e62ac7192f336961e719ce41ed1ea4b9.tar.gz |
MFC r291149, r291367:
Update the imx5/imx6 cpu_reset() implementation based on a new understanding
of the SRS (software reset) bit in the watchdog control register. Despite
what the manual seems to imply, this bit DOES trigger an immediate reset, as
opposed to simply flagging the type of reset as software-triggered.
Rename sysctl node hw.imx6 to hw.imx. Move its definition to imx_machdep.c
so that code shared between imx5 and imx6 can work with OIDs under that node.
Add last_reset_status (integer) and last_reset_reason (string) OIDs that
provide info about the last chip reset (power-on, software reset, watchdog
timeout).
Diffstat (limited to 'etc/nscd.conf')
0 files changed, 0 insertions, 0 deletions