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authordim <dim@FreeBSD.org>2011-06-12 18:01:31 +0000
committerdim <dim@FreeBSD.org>2011-06-12 18:01:31 +0000
commitd4c7939beafe09c033866ebd290e274af0cc826d (patch)
treea9b264321873e7d25e69b8671c9f705ebc6d30ee /contrib/llvm/utils/TableGen/CodeGenRegisters.h
parentb164882ef981a8ed5c085469231831e221fa1323 (diff)
parentece02cd5829cea836e9365b0845a8ef042d17b0a (diff)
downloadFreeBSD-src-d4c7939beafe09c033866ebd290e274af0cc826d.zip
FreeBSD-src-d4c7939beafe09c033866ebd290e274af0cc826d.tar.gz
Upgrade our copy of llvm/clang to r132879, from upstream's trunk.
Diffstat (limited to 'contrib/llvm/utils/TableGen/CodeGenRegisters.h')
-rw-r--r--contrib/llvm/utils/TableGen/CodeGenRegisters.h72
1 files changed, 67 insertions, 5 deletions
diff --git a/contrib/llvm/utils/TableGen/CodeGenRegisters.h b/contrib/llvm/utils/TableGen/CodeGenRegisters.h
index 39b92c5..09341f0 100644
--- a/contrib/llvm/utils/TableGen/CodeGenRegisters.h
+++ b/contrib/llvm/utils/TableGen/CodeGenRegisters.h
@@ -15,23 +15,43 @@
#ifndef CODEGEN_REGISTERS_H
#define CODEGEN_REGISTERS_H
+#include "Record.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/ADT/DenseMap.h"
+#include <cstdlib>
+#include <map>
#include <string>
-#include <vector>
#include <set>
-#include <cstdlib>
+#include <vector>
namespace llvm {
- class Record;
+ class CodeGenRegBank;
/// CodeGenRegister - Represents a register definition.
struct CodeGenRegister {
Record *TheDef;
- const std::string &getName() const;
unsigned EnumValue;
unsigned CostPerUse;
- CodeGenRegister(Record *R);
+
+ // Map SubRegIndex -> Register.
+ typedef std::map<Record*, CodeGenRegister*, LessRecord> SubRegMap;
+
+ CodeGenRegister(Record *R, unsigned Enum);
+
+ const std::string &getName() const;
+
+ // Get a map of sub-registers computed lazily.
+ // This includes unique entries for all sub-sub-registers.
+ const SubRegMap &getSubRegs(CodeGenRegBank&);
+
+ const SubRegMap &getSubRegs() const {
+ assert(SubRegsComplete && "Must precompute sub-registers");
+ return SubRegs;
+ }
+
+ private:
+ bool SubRegsComplete;
+ SubRegMap SubRegs;
};
@@ -43,6 +63,7 @@ namespace llvm {
unsigned SpillSize;
unsigned SpillAlignment;
int CopyCost;
+ bool Allocatable;
// Map SubRegIndex -> RegisterClass
DenseMap<Record*,Record*> SubRegClasses;
std::string MethodProtos, MethodBodies;
@@ -97,6 +118,47 @@ namespace llvm {
CodeGenRegisterClass(Record *R);
};
+
+ // CodeGenRegBank - Represent a target's registers and the relations between
+ // them.
+ class CodeGenRegBank {
+ RecordKeeper &Records;
+ std::vector<Record*> SubRegIndices;
+ unsigned NumNamedIndices;
+ std::vector<CodeGenRegister> Registers;
+ DenseMap<Record*, CodeGenRegister*> Def2Reg;
+
+ // Composite SubRegIndex instances.
+ // Map (SubRegIndex, SubRegIndex) -> SubRegIndex.
+ typedef DenseMap<std::pair<Record*, Record*>, Record*> CompositeMap;
+ CompositeMap Composite;
+
+ // Populate the Composite map from sub-register relationships.
+ void computeComposites();
+
+ public:
+ CodeGenRegBank(RecordKeeper&);
+
+ // Sub-register indices. The first NumNamedIndices are defined by the user
+ // in the .td files. The rest are synthesized such that all sub-registers
+ // have a unique name.
+ const std::vector<Record*> &getSubRegIndices() { return SubRegIndices; }
+ unsigned getNumNamedIndices() { return NumNamedIndices; }
+
+ // Map a SubRegIndex Record to its enum value.
+ unsigned getSubRegIndexNo(Record *idx);
+
+ // Find or create a sub-register index representing the A+B composition.
+ Record *getCompositeSubRegIndex(Record *A, Record *B, bool create = false);
+
+ const std::vector<CodeGenRegister> &getRegisters() { return Registers; }
+
+ // Find a register from its Record def.
+ CodeGenRegister *getReg(Record*);
+
+ // Computed derived records such as missing sub-register indices.
+ void computeDerivedInfo();
+ };
}
#endif
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