MFC r263312:

Pull in r196939 from upstream llvm trunk (by Reid Kleckner):

  Reland "Fix miscompile of MS inline assembly with stack realignment"

  This re-lands commit r196876, which was reverted in r196879.

  The tests have been fixed to pass on platforms with a stack alignment
  larger than 4.

  Update to clang side tests will land shortly.

Pull in r196986 from upstream llvm trunk (by Reid Kleckner):

  Revert the backend fatal error from r196939

  The combination of inline asm, stack realignment, and dynamic allocas
  turns out to be too common to reject out of hand.

  ASan inserts empy inline asm fragments and uses aligned allocas.
  Compiling any trivial function containing a dynamic alloca with ASan is
  enough to trigger the check.

  XFAIL the test cases that would be miscompiled and add one that uses the
  relevant functionality.

Pull in r202930 from upstream llvm trunk (by Hans Wennborg):

  Check for dynamic allocas and inline asm that clobbers sp before building
  selection dag (PR19012)

  In X86SelectionDagInfo::EmitTargetCodeForMemcpy we check with MachineFrameInfo
  to make sure that ESI isn't used as a base pointer register before we choose to
  emit rep movs (which clobbers esi).

  The problem is that MachineFrameInfo wouldn't know about dynamic allocas or
  inline asm that clobbers the stack pointer until SelectionDAGBuilder has
  encountered them.

  This patch fixes the problem by checking for such things when building the
  FunctionLoweringInfo.

  Differential Revision: http://llvm-reviews.chandlerc.com/D2954

Together, these commits fix the problem encountered in the devel/emacs
port on the i386 architecture, where a combination of stack realignment,
alloca() and memcpy() could incidentally clobber the %esi register,
leading to segfaults in the temacs build-time utility.

See also: http://llvm.org/PR18171 and http://llvm.org/PR19012

Reported by:	ashish
PR:		ports/183064

MFC r263313:

Pull in r203311 from upstream llvm trunk (by Arnold Schwaighofer):

  ISel: Make VSELECT selection terminate in cases where the condition type has to
  be split and the result type widened.

  When the condition of a vselect has to be split it makes no sense widening the
  vselect and thereby widening the condition. We end up in an endless loop of
  widening (vselect result type) and splitting (condition mask type) doing this.
  Instead, split both the condition and the vselect and widen the result.

  I ran this over the test suite with i686 and mattr=+sse and saw no regressions.

  Fixes PR18036.

With this fix the original problem case from the graphics/rawtherapee
port (posted in http://llvm.org/PR18036 ) now compiles within ~97MB RSS.

Reported by:	mandree

MFC r263320:

Add separate patch files for all the customizations we have currently
applied to our copy of llvm/clang.  These can be applied in alphabetical
order to a pristine llvm/clang 3.4 release source tree, to result in the
same version used in FreeBSD.

This is intended to clearly document all the changes until now, which
mostly consist of cherry pickings from the respective upstream trunks,
plus a number of hand-written FreeBSD-specific ones.  Hopefully those
can eventually be cleaned up and sent upstream too.

1 files changed, 512 insertions, 0 deletions

diff --git a/contrib/llvm/patches/patch-r262261-llvm-r200960-sparc.diff b/contrib/llvm/patches/patch-r262261-llvm-r200960-sparc.diff
new file mode 100644
index 0000000..c430f88
--- /dev/null
+++ b/contrib/llvm/patches/patch-r262261-llvm-r200960-sparc.diff
@@ -0,0 +1,512 @@
+Pull in r200960 from upstream llvm trunk (by Venkatraman Govindaraju):
+
+  [Sparc] Use SparcMCExpr::VariantKind itself as MachineOperand's target flags.
+
+Introduced here: http://svn.freebsd.org/changeset/base/262261
+
+Index: lib/Target/Sparc/SparcISelLowering.cpp
+===================================================================
+--- lib/Target/Sparc/SparcISelLowering.cpp
++++ lib/Target/Sparc/SparcISelLowering.cpp
+@@ -13,11 +13,11 @@
+ //===----------------------------------------------------------------------===//
+ 
+ #include "SparcISelLowering.h"
++#include "MCTargetDesc/SparcMCExpr.h"
+ #include "SparcMachineFunctionInfo.h"
+ #include "SparcRegisterInfo.h"
+ #include "SparcTargetMachine.h"
+ #include "SparcTargetObjectFile.h"
+-#include "MCTargetDesc/SparcBaseInfo.h"
+ #include "llvm/CodeGen/CallingConvLower.h"
+ #include "llvm/CodeGen/MachineFrameInfo.h"
+ #include "llvm/CodeGen/MachineFunction.h"
+@@ -1796,7 +1796,8 @@ SDValue SparcTargetLowering::makeAddress(SDValue O
+   // Handle PIC mode first.
+   if (getTargetMachine().getRelocationModel() == Reloc::PIC_) {
+     // This is the pic32 code model, the GOT is known to be smaller than 4GB.
+-    SDValue HiLo = makeHiLoPair(Op, SPII::MO_HI, SPII::MO_LO, DAG);
++    SDValue HiLo = makeHiLoPair(Op, SparcMCExpr::VK_Sparc_HI,
++                                SparcMCExpr::VK_Sparc_LO, DAG);
+     SDValue GlobalBase = DAG.getNode(SPISD::GLOBAL_BASE_REG, DL, VT);
+     SDValue AbsAddr = DAG.getNode(ISD::ADD, DL, VT, GlobalBase, HiLo);
+     // GLOBAL_BASE_REG codegen'ed with call. Inform MFI that this
+@@ -1813,20 +1814,24 @@ SDValue SparcTargetLowering::makeAddress(SDValue O
+     llvm_unreachable("Unsupported absolute code model");
+   case CodeModel::Small:
+     // abs32.
+-    return makeHiLoPair(Op, SPII::MO_HI, SPII::MO_LO, DAG);
++    return makeHiLoPair(Op, SparcMCExpr::VK_Sparc_HI,
++                        SparcMCExpr::VK_Sparc_LO, DAG);
+   case CodeModel::Medium: {
+     // abs44.
+-    SDValue H44 = makeHiLoPair(Op, SPII::MO_H44, SPII::MO_M44, DAG);
++    SDValue H44 = makeHiLoPair(Op, SparcMCExpr::VK_Sparc_H44,
++                               SparcMCExpr::VK_Sparc_M44, DAG);
+     H44 = DAG.getNode(ISD::SHL, DL, VT, H44, DAG.getConstant(12, MVT::i32));
+-    SDValue L44 = withTargetFlags(Op, SPII::MO_L44, DAG);
++    SDValue L44 = withTargetFlags(Op, SparcMCExpr::VK_Sparc_L44, DAG);
+     L44 = DAG.getNode(SPISD::Lo, DL, VT, L44);
+     return DAG.getNode(ISD::ADD, DL, VT, H44, L44);
+   }
+   case CodeModel::Large: {
+     // abs64.
+-    SDValue Hi = makeHiLoPair(Op, SPII::MO_HH, SPII::MO_HM, DAG);
++    SDValue Hi = makeHiLoPair(Op, SparcMCExpr::VK_Sparc_HH,
++                              SparcMCExpr::VK_Sparc_HM, DAG);
+     Hi = DAG.getNode(ISD::SHL, DL, VT, Hi, DAG.getConstant(32, MVT::i32));
+-    SDValue Lo = makeHiLoPair(Op, SPII::MO_HI, SPII::MO_LO, DAG);
++    SDValue Lo = makeHiLoPair(Op, SparcMCExpr::VK_Sparc_HI,
++                              SparcMCExpr::VK_Sparc_LO, DAG);
+     return DAG.getNode(ISD::ADD, DL, VT, Hi, Lo);
+   }
+   }
+@@ -1858,14 +1863,18 @@ SDValue SparcTargetLowering::LowerGlobalTLSAddress
+   TLSModel::Model model = getTargetMachine().getTLSModel(GV);
+ 
+   if (model == TLSModel::GeneralDynamic || model == TLSModel::LocalDynamic) {
+-    unsigned HiTF = ((model == TLSModel::GeneralDynamic)? SPII::MO_TLS_GD_HI22
+-                     : SPII::MO_TLS_LDM_HI22);
+-    unsigned LoTF = ((model == TLSModel::GeneralDynamic)? SPII::MO_TLS_GD_LO10
+-                     : SPII::MO_TLS_LDM_LO10);
+-    unsigned addTF = ((model == TLSModel::GeneralDynamic)? SPII::MO_TLS_GD_ADD
+-                      : SPII::MO_TLS_LDM_ADD);
+-    unsigned callTF = ((model == TLSModel::GeneralDynamic)? SPII::MO_TLS_GD_CALL
+-                       : SPII::MO_TLS_LDM_CALL);
++    unsigned HiTF = ((model == TLSModel::GeneralDynamic)
++                     ? SparcMCExpr::VK_Sparc_TLS_GD_HI22
++                     : SparcMCExpr::VK_Sparc_TLS_LDM_HI22);
++    unsigned LoTF = ((model == TLSModel::GeneralDynamic)
++                     ? SparcMCExpr::VK_Sparc_TLS_GD_LO10
++                     : SparcMCExpr::VK_Sparc_TLS_LDM_LO10);
++    unsigned addTF = ((model == TLSModel::GeneralDynamic)
++                      ? SparcMCExpr::VK_Sparc_TLS_GD_ADD
++                      : SparcMCExpr::VK_Sparc_TLS_LDM_ADD);
++    unsigned callTF = ((model == TLSModel::GeneralDynamic)
++                       ? SparcMCExpr::VK_Sparc_TLS_GD_CALL
++                       : SparcMCExpr::VK_Sparc_TLS_LDM_CALL);
+ 
+     SDValue HiLo = makeHiLoPair(Op, HiTF, LoTF, DAG);
+     SDValue Base = DAG.getNode(SPISD::GLOBAL_BASE_REG, DL, PtrVT);
+@@ -1903,17 +1912,17 @@ SDValue SparcTargetLowering::LowerGlobalTLSAddress
+       return Ret;
+ 
+     SDValue Hi = DAG.getNode(SPISD::Hi, DL, PtrVT,
+-                             withTargetFlags(Op, SPII::MO_TLS_LDO_HIX22, DAG));
++                 withTargetFlags(Op, SparcMCExpr::VK_Sparc_TLS_LDO_HIX22, DAG));
+     SDValue Lo = DAG.getNode(SPISD::Lo, DL, PtrVT,
+-                             withTargetFlags(Op, SPII::MO_TLS_LDO_LOX10, DAG));
++                 withTargetFlags(Op, SparcMCExpr::VK_Sparc_TLS_LDO_LOX10, DAG));
+     HiLo =  DAG.getNode(ISD::XOR, DL, PtrVT, Hi, Lo);
+     return DAG.getNode(SPISD::TLS_ADD, DL, PtrVT, Ret, HiLo,
+-                       withTargetFlags(Op, SPII::MO_TLS_LDO_ADD, DAG));
++                   withTargetFlags(Op, SparcMCExpr::VK_Sparc_TLS_LDO_ADD, DAG));
+   }
+ 
+   if (model == TLSModel::InitialExec) {
+-    unsigned ldTF     = ((PtrVT == MVT::i64)? SPII::MO_TLS_IE_LDX
+-                         : SPII::MO_TLS_IE_LD);
++    unsigned ldTF     = ((PtrVT == MVT::i64)? SparcMCExpr::VK_Sparc_TLS_IE_LDX
++                         : SparcMCExpr::VK_Sparc_TLS_IE_LD);
+ 
+     SDValue Base = DAG.getNode(SPISD::GLOBAL_BASE_REG, DL, PtrVT);
+ 
+@@ -1923,7 +1932,8 @@ SDValue SparcTargetLowering::LowerGlobalTLSAddress
+     MFI->setHasCalls(true);
+ 
+     SDValue TGA = makeHiLoPair(Op,
+-                               SPII::MO_TLS_IE_HI22, SPII::MO_TLS_IE_LO10, DAG);
++                               SparcMCExpr::VK_Sparc_TLS_IE_HI22,
++                               SparcMCExpr::VK_Sparc_TLS_IE_LO10, DAG);
+     SDValue Ptr = DAG.getNode(ISD::ADD, DL, PtrVT, Base, TGA);
+     SDValue Offset = DAG.getNode(SPISD::TLS_LD,
+                                  DL, PtrVT, Ptr,
+@@ -1930,14 +1940,15 @@ SDValue SparcTargetLowering::LowerGlobalTLSAddress
+                                  withTargetFlags(Op, ldTF, DAG));
+     return DAG.getNode(SPISD::TLS_ADD, DL, PtrVT,
+                        DAG.getRegister(SP::G7, PtrVT), Offset,
+-                       withTargetFlags(Op, SPII::MO_TLS_IE_ADD, DAG));
++                       withTargetFlags(Op,
++                                       SparcMCExpr::VK_Sparc_TLS_IE_ADD, DAG));
+   }
+ 
+   assert(model == TLSModel::LocalExec);
+   SDValue Hi = DAG.getNode(SPISD::Hi, DL, PtrVT,
+-                           withTargetFlags(Op, SPII::MO_TLS_LE_HIX22, DAG));
++                  withTargetFlags(Op, SparcMCExpr::VK_Sparc_TLS_LE_HIX22, DAG));
+   SDValue Lo = DAG.getNode(SPISD::Lo, DL, PtrVT,
+-                           withTargetFlags(Op, SPII::MO_TLS_LE_LOX10, DAG));
++                  withTargetFlags(Op, SparcMCExpr::VK_Sparc_TLS_LE_LOX10, DAG));
+   SDValue Offset =  DAG.getNode(ISD::XOR, DL, PtrVT, Hi, Lo);
+ 
+   return DAG.getNode(ISD::ADD, DL, PtrVT,
+Index: lib/Target/Sparc/SparcCodeEmitter.cpp
+===================================================================
+--- lib/Target/Sparc/SparcCodeEmitter.cpp
++++ lib/Target/Sparc/SparcCodeEmitter.cpp
+@@ -14,7 +14,7 @@
+ 
+ #define DEBUG_TYPE "jit"
+ #include "Sparc.h"
+-#include "MCTargetDesc/SparcBaseInfo.h"
++#include "MCTargetDesc/SparcMCExpr.h"
+ #include "SparcRelocations.h"
+ #include "SparcTargetMachine.h"
+ #include "llvm/ADT/Statistic.h"
+@@ -204,14 +204,14 @@ unsigned SparcCodeEmitter::getRelocation(const Mac
+   unsigned TF = MO.getTargetFlags();
+   switch (TF) {
+   default:
+-  case SPII::MO_NO_FLAG: break;
+-  case SPII::MO_LO: return SP::reloc_sparc_lo;
+-  case SPII::MO_HI: return SP::reloc_sparc_hi;
+-  case SPII::MO_H44: return SP::reloc_sparc_h44;
+-  case SPII::MO_M44: return SP::reloc_sparc_m44;
+-  case SPII::MO_L44: return SP::reloc_sparc_l44;
+-  case SPII::MO_HH:  return SP::reloc_sparc_hh;
+-  case SPII::MO_HM:  return SP::reloc_sparc_hm;
++  case SparcMCExpr::VK_Sparc_None:  break;
++  case SparcMCExpr::VK_Sparc_LO:    return SP::reloc_sparc_lo;
++  case SparcMCExpr::VK_Sparc_HI:    return SP::reloc_sparc_hi;
++  case SparcMCExpr::VK_Sparc_H44:   return SP::reloc_sparc_h44;
++  case SparcMCExpr::VK_Sparc_M44:   return SP::reloc_sparc_m44;
++  case SparcMCExpr::VK_Sparc_L44:   return SP::reloc_sparc_l44;
++  case SparcMCExpr::VK_Sparc_HH:    return SP::reloc_sparc_hh;
++  case SparcMCExpr::VK_Sparc_HM:    return SP::reloc_sparc_hm;
+   }
+ 
+   unsigned Opc = MI.getOpcode();
+Index: lib/Target/Sparc/SparcMCInstLower.cpp
+===================================================================
+--- lib/Target/Sparc/SparcMCInstLower.cpp
++++ lib/Target/Sparc/SparcMCInstLower.cpp
+@@ -13,7 +13,6 @@
+ //===----------------------------------------------------------------------===//
+ 
+ #include "Sparc.h"
+-#include "MCTargetDesc/SparcBaseInfo.h"
+ #include "MCTargetDesc/SparcMCExpr.h"
+ #include "llvm/CodeGen/AsmPrinter.h"
+ #include "llvm/CodeGen/MachineFunction.h"
+@@ -33,41 +32,10 @@ static MCOperand LowerSymbolOperand(const MachineI
+                                     const MachineOperand &MO,
+                                     AsmPrinter &AP) {
+ 
+-  SparcMCExpr::VariantKind Kind;
++  SparcMCExpr::VariantKind Kind =
++    (SparcMCExpr::VariantKind)MO.getTargetFlags();
+   const MCSymbol *Symbol = 0;
+ 
+-  unsigned TF = MO.getTargetFlags();
+-
+-  switch(TF) {
+-  default:      llvm_unreachable("Unknown target flags on operand");
+-  case SPII::MO_NO_FLAG:      Kind = SparcMCExpr::VK_Sparc_None; break;
+-  case SPII::MO_LO:           Kind = SparcMCExpr::VK_Sparc_LO; break;
+-  case SPII::MO_HI:           Kind = SparcMCExpr::VK_Sparc_HI; break;
+-  case SPII::MO_H44:          Kind = SparcMCExpr::VK_Sparc_H44; break;
+-  case SPII::MO_M44:          Kind = SparcMCExpr::VK_Sparc_M44; break;
+-  case SPII::MO_L44:          Kind = SparcMCExpr::VK_Sparc_L44; break;
+-  case SPII::MO_HH:           Kind = SparcMCExpr::VK_Sparc_HH; break;
+-  case SPII::MO_HM:           Kind = SparcMCExpr::VK_Sparc_HM; break;
+-  case SPII::MO_TLS_GD_HI22:  Kind = SparcMCExpr::VK_Sparc_TLS_GD_HI22; break;
+-  case SPII::MO_TLS_GD_LO10:  Kind = SparcMCExpr::VK_Sparc_TLS_GD_LO10; break;
+-  case SPII::MO_TLS_GD_ADD:   Kind = SparcMCExpr::VK_Sparc_TLS_GD_ADD; break;
+-  case SPII::MO_TLS_GD_CALL:  Kind = SparcMCExpr::VK_Sparc_TLS_GD_CALL; break;
+-  case SPII::MO_TLS_LDM_HI22: Kind = SparcMCExpr::VK_Sparc_TLS_LDM_HI22; break;
+-  case SPII::MO_TLS_LDM_LO10: Kind = SparcMCExpr::VK_Sparc_TLS_LDM_LO10; break;
+-  case SPII::MO_TLS_LDM_ADD:  Kind = SparcMCExpr::VK_Sparc_TLS_LDM_ADD; break;
+-  case SPII::MO_TLS_LDM_CALL: Kind = SparcMCExpr::VK_Sparc_TLS_LDM_CALL; break;
+-  case SPII::MO_TLS_LDO_HIX22:Kind = SparcMCExpr::VK_Sparc_TLS_LDO_HIX22; break;
+-  case SPII::MO_TLS_LDO_LOX10:Kind = SparcMCExpr::VK_Sparc_TLS_LDO_LOX10; break;
+-  case SPII::MO_TLS_LDO_ADD:  Kind = SparcMCExpr::VK_Sparc_TLS_LDO_ADD; break;
+-  case SPII::MO_TLS_IE_HI22:  Kind = SparcMCExpr::VK_Sparc_TLS_IE_HI22; break;
+-  case SPII::MO_TLS_IE_LO10:  Kind = SparcMCExpr::VK_Sparc_TLS_IE_LO10; break;
+-  case SPII::MO_TLS_IE_LD:    Kind = SparcMCExpr::VK_Sparc_TLS_IE_LD; break;
+-  case SPII::MO_TLS_IE_LDX:   Kind = SparcMCExpr::VK_Sparc_TLS_IE_LDX; break;
+-  case SPII::MO_TLS_IE_ADD:   Kind = SparcMCExpr::VK_Sparc_TLS_IE_ADD; break;
+-  case SPII::MO_TLS_LE_HIX22: Kind = SparcMCExpr::VK_Sparc_TLS_LE_HIX22; break;
+-  case SPII::MO_TLS_LE_LOX10: Kind = SparcMCExpr::VK_Sparc_TLS_LE_LOX10; break;
+-  }
+-
+   switch(MO.getType()) {
+   default: llvm_unreachable("Unknown type in LowerSymbolOperand");
+   case MachineOperand::MO_MachineBasicBlock:
+Index: lib/Target/Sparc/SparcAsmPrinter.cpp
+===================================================================
+--- lib/Target/Sparc/SparcAsmPrinter.cpp
++++ lib/Target/Sparc/SparcAsmPrinter.cpp
+@@ -18,7 +18,6 @@
+ #include "SparcTargetMachine.h"
+ #include "SparcTargetStreamer.h"
+ #include "InstPrinter/SparcInstPrinter.h"
+-#include "MCTargetDesc/SparcBaseInfo.h"
+ #include "MCTargetDesc/SparcMCExpr.h"
+ #include "llvm/ADT/SmallString.h"
+ #include "llvm/CodeGen/AsmPrinter.h"
+@@ -287,83 +286,60 @@ void SparcAsmPrinter::EmitFunctionBodyStart() {
+ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
+                                    raw_ostream &O) {
+   const MachineOperand &MO = MI->getOperand (opNum);
+-  unsigned TF = MO.getTargetFlags();
++  SparcMCExpr::VariantKind TF = (SparcMCExpr::VariantKind) MO.getTargetFlags();
++
+ #ifndef NDEBUG
+   // Verify the target flags.
+   if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) {
+     if (MI->getOpcode() == SP::CALL)
+-      assert(TF == SPII::MO_NO_FLAG &&
++      assert(TF == SparcMCExpr::VK_Sparc_None &&
+              "Cannot handle target flags on call address");
+     else if (MI->getOpcode() == SP::SETHIi || MI->getOpcode() == SP::SETHIXi)
+-      assert((TF == SPII::MO_HI || TF == SPII::MO_H44 || TF == SPII::MO_HH
+-              || TF == SPII::MO_TLS_GD_HI22
+-              || TF == SPII::MO_TLS_LDM_HI22
+-              || TF == SPII::MO_TLS_LDO_HIX22
+-              || TF == SPII::MO_TLS_IE_HI22
+-              || TF == SPII::MO_TLS_LE_HIX22) &&
++      assert((TF == SparcMCExpr::VK_Sparc_HI
++              || TF == SparcMCExpr::VK_Sparc_H44
++              || TF == SparcMCExpr::VK_Sparc_HH
++              || TF == SparcMCExpr::VK_Sparc_TLS_GD_HI22
++              || TF == SparcMCExpr::VK_Sparc_TLS_LDM_HI22
++              || TF == SparcMCExpr::VK_Sparc_TLS_LDO_HIX22
++              || TF == SparcMCExpr::VK_Sparc_TLS_IE_HI22
++              || TF == SparcMCExpr::VK_Sparc_TLS_LE_HIX22) &&
+              "Invalid target flags for address operand on sethi");
+     else if (MI->getOpcode() == SP::TLS_CALL)
+-      assert((TF == SPII::MO_NO_FLAG
+-              || TF == SPII::MO_TLS_GD_CALL
+-              || TF == SPII::MO_TLS_LDM_CALL) &&
++      assert((TF == SparcMCExpr::VK_Sparc_None
++              || TF == SparcMCExpr::VK_Sparc_TLS_GD_CALL
++              || TF == SparcMCExpr::VK_Sparc_TLS_LDM_CALL) &&
+              "Cannot handle target flags on tls call address");
+     else if (MI->getOpcode() == SP::TLS_ADDrr)
+-      assert((TF == SPII::MO_TLS_GD_ADD || TF == SPII::MO_TLS_LDM_ADD
+-              || TF == SPII::MO_TLS_LDO_ADD || TF == SPII::MO_TLS_IE_ADD) &&
++      assert((TF == SparcMCExpr::VK_Sparc_TLS_GD_ADD
++              || TF == SparcMCExpr::VK_Sparc_TLS_LDM_ADD
++              || TF == SparcMCExpr::VK_Sparc_TLS_LDO_ADD
++              || TF == SparcMCExpr::VK_Sparc_TLS_IE_ADD) &&
+              "Cannot handle target flags on add for TLS");
+     else if (MI->getOpcode() == SP::TLS_LDrr)
+-      assert(TF == SPII::MO_TLS_IE_LD &&
++      assert(TF == SparcMCExpr::VK_Sparc_TLS_IE_LD &&
+              "Cannot handle target flags on ld for TLS");
+     else if (MI->getOpcode() == SP::TLS_LDXrr)
+-      assert(TF == SPII::MO_TLS_IE_LDX &&
++      assert(TF == SparcMCExpr::VK_Sparc_TLS_IE_LDX &&
+              "Cannot handle target flags on ldx for TLS");
+     else if (MI->getOpcode() == SP::XORri || MI->getOpcode() == SP::XORXri)
+-      assert((TF == SPII::MO_TLS_LDO_LOX10 || TF == SPII::MO_TLS_LE_LOX10) &&
++      assert((TF == SparcMCExpr::VK_Sparc_TLS_LDO_LOX10
++              || TF == SparcMCExpr::VK_Sparc_TLS_LE_LOX10) &&
+              "Cannot handle target flags on xor for TLS");
+     else
+-      assert((TF == SPII::MO_LO || TF == SPII::MO_M44 || TF == SPII::MO_L44
+-              || TF == SPII::MO_HM
+-              || TF == SPII::MO_TLS_GD_LO10
+-              || TF == SPII::MO_TLS_LDM_LO10
+-              || TF == SPII::MO_TLS_IE_LO10 ) &&
++      assert((TF == SparcMCExpr::VK_Sparc_LO
++              || TF == SparcMCExpr::VK_Sparc_M44
++              || TF == SparcMCExpr::VK_Sparc_L44
++              || TF == SparcMCExpr::VK_Sparc_HM
++              || TF == SparcMCExpr::VK_Sparc_TLS_GD_LO10
++              || TF == SparcMCExpr::VK_Sparc_TLS_LDM_LO10
++              || TF == SparcMCExpr::VK_Sparc_TLS_IE_LO10 ) &&
+              "Invalid target flags for small address operand");
+   }
+ #endif
+ 
+-  bool CloseParen = true;
+-  switch (TF) {
+-  default:
+-      llvm_unreachable("Unknown target flags on operand");
+-  case SPII::MO_NO_FLAG:
+-    CloseParen = false;
+-    break;
+-  case SPII::MO_LO:  O << "%lo(";  break;
+-  case SPII::MO_HI:  O << "%hi(";  break;
+-  case SPII::MO_H44: O << "%h44("; break;
+-  case SPII::MO_M44: O << "%m44("; break;
+-  case SPII::MO_L44: O << "%l44("; break;
+-  case SPII::MO_HH:  O << "%hh(";  break;
+-  case SPII::MO_HM:  O << "%hm(";  break;
+-  case SPII::MO_TLS_GD_HI22:   O << "%tgd_hi22(";   break;
+-  case SPII::MO_TLS_GD_LO10:   O << "%tgd_lo10(";   break;
+-  case SPII::MO_TLS_GD_ADD:    O << "%tgd_add(";    break;
+-  case SPII::MO_TLS_GD_CALL:   O << "%tgd_call(";   break;
+-  case SPII::MO_TLS_LDM_HI22:  O << "%tldm_hi22(";  break;
+-  case SPII::MO_TLS_LDM_LO10:  O << "%tldm_lo10(";  break;
+-  case SPII::MO_TLS_LDM_ADD:   O << "%tldm_add(";   break;
+-  case SPII::MO_TLS_LDM_CALL:  O << "%tldm_call(";  break;
+-  case SPII::MO_TLS_LDO_HIX22: O << "%tldo_hix22("; break;
+-  case SPII::MO_TLS_LDO_LOX10: O << "%tldo_lox10("; break;
+-  case SPII::MO_TLS_LDO_ADD:   O << "%tldo_add(";   break;
+-  case SPII::MO_TLS_IE_HI22:   O << "%tie_hi22(";   break;
+-  case SPII::MO_TLS_IE_LO10:   O << "%tie_lo10(";   break;
+-  case SPII::MO_TLS_IE_LD:     O << "%tie_ld(";     break;
+-  case SPII::MO_TLS_IE_LDX:    O << "%tie_ldx(";    break;
+-  case SPII::MO_TLS_IE_ADD:    O << "%tie_add(";    break;
+-  case SPII::MO_TLS_LE_HIX22:  O << "%tle_hix22(";  break;
+-  case SPII::MO_TLS_LE_LOX10:  O << "%tle_lox10(";   break;
+-  }
+ 
++  bool CloseParen = SparcMCExpr::printVariantKind(O, TF);
++
+   switch (MO.getType()) {
+   case MachineOperand::MO_Register:
+     O << "%" << StringRef(getRegisterName(MO.getReg())).lower();
+Index: lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp
+===================================================================
+--- lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp
++++ lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp
+@@ -15,7 +15,6 @@
+ #include "SparcInstPrinter.h"
+ 
+ #include "Sparc.h"
+-#include "MCTargetDesc/SparcBaseInfo.h"
+ #include "llvm/MC/MCExpr.h"
+ #include "llvm/MC/MCInst.h"
+ #include "llvm/MC/MCSymbol.h"
+Index: lib/Target/Sparc/MCTargetDesc/SparcBaseInfo.h
+===================================================================
+--- lib/Target/Sparc/MCTargetDesc/SparcBaseInfo.h
++++ lib/Target/Sparc/MCTargetDesc/SparcBaseInfo.h
+@@ -1,82 +0,0 @@
+-//===-- SparcBaseInfo.h - Top level definitions for Sparc ---- --*- C++ -*-===//
+-//
+-//                     The LLVM Compiler Infrastructure
+-//
+-// This file is distributed under the University of Illinois Open Source
+-// License. See LICENSE.TXT for details.
+-//
+-//===----------------------------------------------------------------------===//
+-//
+-// This file contains small standalone helper functions and enum definitions
+-// for the Sparc target useful for the compiler back-end and the MC libraries.
+-// As such, it deliberately does not include references to LLVM core code gen
+-// types, passes, etc..
+-//
+-//===----------------------------------------------------------------------===//
+-
+-#ifndef SPARCBASEINFO_H
+-#define SPARCBASEINFO_H
+-
+-namespace llvm {
+-
+-/// SPII - This namespace holds target specific flags for instruction info.
+-namespace SPII {
+-
+-/// Target Operand Flags. Sparc specific TargetFlags for MachineOperands and
+-/// SDNodes.
+-enum TOF {
+-  MO_NO_FLAG,
+-
+-  // Extract the low 10 bits of an address.
+-  // Assembler: %lo(addr)
+-  MO_LO,
+-
+-  // Extract bits 31-10 of an address. Only for sethi.
+-  // Assembler: %hi(addr) or %lm(addr)
+-  MO_HI,
+-
+-  // Extract bits 43-22 of an adress. Only for sethi.
+-  // Assembler: %h44(addr)
+-  MO_H44,
+-
+-  // Extract bits 21-12 of an address.
+-  // Assembler: %m44(addr)
+-  MO_M44,
+-
+-  // Extract bits 11-0 of an address.
+-  // Assembler: %l44(addr)
+-  MO_L44,
+-
+-  // Extract bits 63-42 of an address. Only for sethi.
+-  // Assembler: %hh(addr)
+-  MO_HH,
+-
+-  // Extract bits 41-32 of an address.
+-  // Assembler: %hm(addr)
+-  MO_HM,
+-
+-  // TargetFlags for Thread Local Storage.
+-  MO_TLS_GD_HI22,
+-  MO_TLS_GD_LO10,
+-  MO_TLS_GD_ADD,
+-  MO_TLS_GD_CALL,
+-  MO_TLS_LDM_HI22,
+-  MO_TLS_LDM_LO10,
+-  MO_TLS_LDM_ADD,
+-  MO_TLS_LDM_CALL,
+-  MO_TLS_LDO_HIX22,
+-  MO_TLS_LDO_LOX10,
+-  MO_TLS_LDO_ADD,
+-  MO_TLS_IE_HI22,
+-  MO_TLS_IE_LO10,
+-  MO_TLS_IE_LD,
+-  MO_TLS_IE_LDX,
+-  MO_TLS_IE_ADD,
+-  MO_TLS_LE_HIX22,
+-  MO_TLS_LE_LOX10
+-};
+-
+-} // end namespace SPII
+-} // end namespace llvm
+-
+-#endif
+Index: lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
+===================================================================
+--- lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
++++ lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
+@@ -29,8 +29,21 @@ SparcMCExpr::Create(VariantKind Kind, const MCExpr
+ }
+ 
+ 
++
+ void SparcMCExpr::PrintImpl(raw_ostream &OS) const
+ {
++
++  bool closeParen = printVariantKind(OS, Kind);
++
++  const MCExpr *Expr = getSubExpr();
++  Expr->print(OS);
++
++  if (closeParen)
++    OS << ')';
++}
++
++bool SparcMCExpr::printVariantKind(raw_ostream &OS, VariantKind Kind)
++{
+   bool closeParen = true;
+   switch (Kind) {
+   case VK_Sparc_None:     closeParen = false; break;
+@@ -61,11 +74,7 @@ void SparcMCExpr::PrintImpl(raw_ostream &OS) const
+   case VK_Sparc_TLS_LE_HIX22:  OS << "%tle_hix22(";  break;
+   case VK_Sparc_TLS_LE_LOX10:  OS << "%tle_lox10(";  break;
+   }
+-
+-  const MCExpr *Expr = getSubExpr();
+-  Expr->print(OS);
+-  if (closeParen)
+-    OS << ')';
++  return closeParen;
+ }
+ 
+ SparcMCExpr::VariantKind SparcMCExpr::parseVariantKind(StringRef name)
+Index: lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
+===================================================================
+--- lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
++++ lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
+@@ -93,7 +93,7 @@ class SparcMCExpr : public MCTargetExpr {
+   static bool classof(const SparcMCExpr *) { return true; }
+ 
+   static VariantKind parseVariantKind(StringRef name);
+-
++  static bool printVariantKind(raw_ostream &OS, VariantKind Kind);
+ };
+ 
+ } // end namespace llvm.