MFC r267981:

Pull in r211627 from upstream llvm trunk (by Bill Schmidt):

  [PPC64] Fix PR20071 (fctiduz generated for targets lacking that
  instruction)

  PR20071 identifies a problem in PowerPC's fast-isel implementation
  for floating-point conversion to integer.  The fctiduz instruction
  was added in Power ISA 2.06 (i.e., Power7 and later).  However, this
  instruction is being generated regardless of which 64-bit PowerPC
  target is selected.

  The intent is for fast-isel to punt to DAG selection when this
  instruction is not available.  This patch implements that change.
  For testing purposes, the existing fast-isel-conversion.ll test adds
  a RUN line for -mcpu=970 and tests for the expected code generation.
  Additionally, the existing test fast-isel-conversion-p5.ll was found
  to be incorrectly expecting the unavailable instruction to be
  generated.  I've removed these test variants since we have adequate
  coverage in fast-isel-conversion.ll.

This is needed to compile clang with debug+asserts on older powerpc64
and ppc970 targets.

Requested by:	jhibbits

MFC r267982:

Add the llvm patch for r267981.

MFC r268003:

Fix breakage after r267981.

Pointy hat to:	dim

1 files changed, 4 insertions, 0 deletions

diff --git a/contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp b/contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp
index 4e3b0b8..970c804 100644
--- a/contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp
+++ b/contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp
@@ -1026,6 +1026,10 @@ bool PPCFastISel::SelectFPToI(const Instruction *I, bool IsSigned) {
   if (DstVT != MVT::i32 && DstVT != MVT::i64)
     return false;
 
+  // If we don't have FCTIDUZ and we need it, punt to SelectionDAG.
+  if (DstVT == MVT::i64 && !IsSigned && !PPCSubTarget.hasFPCVT())
+    return false;
+
   Value *Src = I->getOperand(0);
   Type *SrcTy = Src->getType();
   if (!isTypeLegal(SrcTy, SrcVT))