diff options
| author | dim <dim@FreeBSD.org> | 2015-12-30 13:13:10 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2015-12-30 13:13:10 +0000 |
| commit | 9b5bf5c4f53d65d6a48722d7410ed7cb15f5ba3a (patch) | |
| tree | b466a4817f79516eb1df8eae92bccf62ecc84003 /contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp | |
| parent | f09a28d1de99fda4f5517fb12670fc36552f4927 (diff) | |
| parent | e194cd6d03d91631334d9d5e55b506036f423cc8 (diff) | |
| download | FreeBSD-src-9b5bf5c4f53d65d6a48722d7410ed7cb15f5ba3a.zip FreeBSD-src-9b5bf5c4f53d65d6a48722d7410ed7cb15f5ba3a.tar.gz | |
Update llvm to trunk r256633.
Diffstat (limited to 'contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp')
| -rw-r--r-- | contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp b/contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp index 6905c4f..d9675b5 100644 --- a/contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp +++ b/contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp @@ -250,7 +250,7 @@ Register HexagonGenPredicate::getPredRegFor(const Register &Reg) { unsigned NewPR = MRI->createVirtualRegister(PredRC); // For convertible instructions, do not modify them, so that they can - // be coverted later. Generate a copy from Reg to NewPR. + // be converted later. Generate a copy from Reg to NewPR. if (isConvertibleToPredForm(DefI)) { MachineBasicBlock::iterator DefIt = DefI; BuildMI(B, std::next(DefIt), DL, TII->get(TargetOpcode::COPY), NewPR) |
