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| author | dim <dim@FreeBSD.org> | 2016-01-06 20:19:13 +0000 |
|---|---|---|
| committer | dim <dim@FreeBSD.org> | 2016-01-06 20:19:13 +0000 |
| commit | e06c171d67ab436f270b15f7e364a8d8f77c01f2 (patch) | |
| tree | b7c03c042b220d85a294b0e2e89936b631d3e6ad /contrib/llvm/lib/CodeGen/TargetSchedule.cpp | |
| parent | db873d7452584205dd063528dc8addbf28aa396b (diff) | |
| parent | ff2ba393a56d9d99dcb76ceada542233db28af9a (diff) | |
| download | FreeBSD-src-e06c171d67ab436f270b15f7e364a8d8f77c01f2.zip FreeBSD-src-e06c171d67ab436f270b15f7e364a8d8f77c01f2.tar.gz | |
Update llvm to trunk r256945.
Diffstat (limited to 'contrib/llvm/lib/CodeGen/TargetSchedule.cpp')
| -rw-r--r-- | contrib/llvm/lib/CodeGen/TargetSchedule.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/contrib/llvm/lib/CodeGen/TargetSchedule.cpp b/contrib/llvm/lib/CodeGen/TargetSchedule.cpp index fc65639..1c4558c 100644 --- a/contrib/llvm/lib/CodeGen/TargetSchedule.cpp +++ b/contrib/llvm/lib/CodeGen/TargetSchedule.cpp @@ -212,7 +212,7 @@ unsigned TargetSchedModel::computeOperandLatency( && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef() && SchedModel.isComplete()) { errs() << "DefIdx " << DefIdx << " exceeds machine model writes for " - << *DefMI; + << *DefMI << " (Try with MCSchedModel.CompleteModel set to false)"; llvm_unreachable("incomplete machine model"); } #endif |
