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authordim <dim@FreeBSD.org>2013-07-04 20:10:33 +0000
committerdim <dim@FreeBSD.org>2013-07-04 20:10:33 +0000
commiteeea14c75af862477741d779b12b307abdd49fbc (patch)
treecdf640833bf6e9bcf1f9a90f24f0d45fe865049d /contrib/llvm/include
parentf46ddafd5dc1fa559765500316c9fb8a3b8e69c4 (diff)
downloadFreeBSD-src-eeea14c75af862477741d779b12b307abdd49fbc.zip
FreeBSD-src-eeea14c75af862477741d779b12b307abdd49fbc.tar.gz
Pull in r185594 from llvm trunk:
Add MachineBasicBlock::addLiveIn(). This function adds a live-in physical register to an MBB and ensures that it is copied to a virtual register immediately. Pull in r185615 from llvm trunk: Live-in copies go *after* EH_LABELs. This will soon be tested by exception handling working at all. Pull in r185617 from llvm trunk: Simplify landing pad lowering. Stop using the ISD::EXCEPTIONADDR and ISD::EHSELECTION when lowering landing pad arguments. These nodes were previously legalized into CopyFromReg nodes, but that never worked properly because the CopyFromReg node weren't guaranteed to be scheduled at the top of the basic block. This meant the exception pointer and selector registers could be clobbered before being copied to a virtual register. This patch copies the two physical registers to virtual registers at the beginning of the basic block, and lowers the landingpad instruction directly to two CopyFromReg nodes reading the *virtual* registers. This is safe because virtual registers don't get clobbered. A future patch will remove the ISD::EXCEPTIONADDR and ISD::EHSELECTION nodes. Together, these changes fix llvm PR 16038 ('qt4 webcore file results in "Bad machine code: Using an undefined physical register"'), and should make it possible again to compile the www/qt4-webkit port again on the i386 arch, without using a CPUTYPE=i686 or higher setting.
Diffstat (limited to 'contrib/llvm/include')
-rw-r--r--contrib/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h5
-rw-r--r--contrib/llvm/include/llvm/CodeGen/MachineBasicBlock.h5
2 files changed, 10 insertions, 0 deletions
diff --git a/contrib/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h b/contrib/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
index ea6cb27..e6f30a2 100644
--- a/contrib/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
+++ b/contrib/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
@@ -115,6 +115,11 @@ public:
/// there's no other convenient place for it to live right now.
std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
+ /// If the current MBB is a landing pad, the exception pointer and exception
+ /// selector registers are copied into these virtual registers by
+ /// SelectionDAGISel::PrepareEHLandingPad().
+ unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg;
+
explicit FunctionLoweringInfo(const TargetLowering &TLI);
/// set - Initialize this FunctionLoweringInfo with the given Function
diff --git a/contrib/llvm/include/llvm/CodeGen/MachineBasicBlock.h b/contrib/llvm/include/llvm/CodeGen/MachineBasicBlock.h
index 0f2f874..d6f5883 100644
--- a/contrib/llvm/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/contrib/llvm/include/llvm/CodeGen/MachineBasicBlock.h
@@ -296,6 +296,11 @@ public:
/// is an error to add the same register to the same set more than once.
void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); }
+ /// Add PhysReg as live in to this block, and ensure that there is a copy of
+ /// PhysReg to a virtual register of class RC. Return the virtual register
+ /// that is a copy of the live in PhysReg.
+ unsigned addLiveIn(unsigned PhysReg, const TargetRegisterClass *RC);
+
/// removeLiveIn - Remove the specified register from the live in set.
///
void removeLiveIn(unsigned Reg);
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