diff options
author | obrien <obrien@FreeBSD.org> | 2002-02-01 18:16:02 +0000 |
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committer | obrien <obrien@FreeBSD.org> | 2002-02-01 18:16:02 +0000 |
commit | c9ab9ae440a8066b2c2b85b157b1fdadcf09916a (patch) | |
tree | 086d9d6c8fbd4fc8fe4495059332f66bc0f8d12b /contrib/gcc/emit-rtl.c | |
parent | 2ecfd8bd04b63f335c1ec6295740a4bfd97a4fa6 (diff) | |
download | FreeBSD-src-c9ab9ae440a8066b2c2b85b157b1fdadcf09916a.zip FreeBSD-src-c9ab9ae440a8066b2c2b85b157b1fdadcf09916a.tar.gz |
Enlist the FreeBSD-CURRENT users as testers of what is to become Gcc 3.1.0.
These bits are taken from the FSF anoncvs repo on 1-Feb-2002 08:20 PST.
Diffstat (limited to 'contrib/gcc/emit-rtl.c')
-rw-r--r-- | contrib/gcc/emit-rtl.c | 3122 |
1 files changed, 2113 insertions, 1009 deletions
diff --git a/contrib/gcc/emit-rtl.c b/contrib/gcc/emit-rtl.c index 7910472..4ea852b 100644 --- a/contrib/gcc/emit-rtl.c +++ b/contrib/gcc/emit-rtl.c @@ -1,23 +1,23 @@ /* Emit RTL for the GNU C-Compiler expander. - Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001 Free Software Foundation, Inc. + Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, + 1999, 2000, 2001, 2002 Free Software Foundation, Inc. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ /* Middle-to-low level generation of rtx code and insns. @@ -40,17 +40,22 @@ Boston, MA 02111-1307, USA. */ #include "toplev.h" #include "rtl.h" #include "tree.h" +#include "tm_p.h" #include "flags.h" -#include "except.h" #include "function.h" #include "expr.h" #include "regs.h" #include "hard-reg-set.h" +#include "hashtab.h" #include "insn-config.h" #include "recog.h" #include "real.h" #include "obstack.h" #include "bitmap.h" +#include "basic-block.h" +#include "ggc.h" +#include "debug.h" +#include "langhooks.h" /* Commonly used modes. */ @@ -59,20 +64,12 @@ enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */ enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */ enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */ -/* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function. - After rtl generation, it is 1 plus the largest register number used. */ - -int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; /* This is *not* reset after each function. It gives each CODE_LABEL in the entire compilation a unique label number. */ static int label_num = 1; -/* Lowest label number in current function. */ - -static int first_label_num; - /* Highest label number in current function. Zero means use the value of label_num instead. This is nonzero only when belatedly compiling an inline function. */ @@ -93,28 +90,7 @@ static int no_line_numbers; All of these except perhaps the floating-point CONST_DOUBLEs are unique; no other rtx-object will be equal to any of these. */ -/* Avoid warnings by initializing the `fld' field. Since its a union, - bypass problems with KNR compilers by only doing so when __GNUC__. */ -#ifdef __GNUC__ -#define FLDI , {{0}} -#else -#define FLDI -#endif - -struct _global_rtl global_rtl = -{ - {PC, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* pc_rtx */ - {CC0, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* cc0_rtx */ - {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* stack_pointer_rtx */ - {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* frame_pointer_rtx */ - {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* hard_frame_pointer_rtx */ - {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* arg_pointer_rtx */ - {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_incoming_args_rtx */ - {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_vars_rtx */ - {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_dynamic_rtx */ - {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_outgoing_args_rtx */ - {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_cfa_rtx */ -}; +rtx global_rtl[GR_MAX]; /* We record floating-point CONST_DOUBLEs in each floating-point mode for the values of 0, 1, and 2. For the integer entries and VOIDmode, we @@ -140,7 +116,7 @@ REAL_VALUE_TYPE dconstm1; When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little tricky: until register elimination has taken place hard_frame_pointer_rtx - should be used if it is being set, and frame_pointer_rtx otherwise. After + should be used if it is being set, and frame_pointer_rtx otherwise. After register elimination hard_frame_pointer_rtx should always be used. On machines where the two registers are same (most) then these are the same. @@ -162,131 +138,239 @@ rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */ to save space during the compilation and simplify comparisons of integers. */ -struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; +rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; -/* The ends of the doubly-linked chain of rtl for the current function. - Both are reset to null at the start of rtl generation for the function. - - start_sequence saves both of these on `sequence_stack' along with - `sequence_rtl_expr' and then starts a new, nested sequence of insns. */ +/* A hash table storing CONST_INTs whose absolute value is greater + than MAX_SAVED_CONST_INT. */ -static rtx first_insn = NULL; -static rtx last_insn = NULL; +static htab_t const_int_htab; -/* RTL_EXPR within which the current sequence will be placed. Use to - prevent reuse of any temporaries within the sequence until after the - RTL_EXPR is emitted. */ +/* A hash table storing memory attribute structures. */ +static htab_t mem_attrs_htab; -tree sequence_rtl_expr = NULL; +/* start_sequence and gen_sequence can make a lot of rtx expressions which are + shortly thrown away. We use two mechanisms to prevent this waste: -/* INSN_UID for next insn emitted. - Reset to 1 for each function compiled. */ + For sizes up to 5 elements, we keep a SEQUENCE and its associated + rtvec for use by gen_sequence. One entry for each size is + sufficient because most cases are calls to gen_sequence followed by + immediately emitting the SEQUENCE. Reuse is safe since emitting a + sequence is destructive on the insn in it anyway and hence can't be + redone. -static int cur_insn_uid = 1; + We do not bother to save this cached data over nested function calls. + Instead, we just reinitialize them. */ -/* Line number and source file of the last line-number NOTE emitted. - This is used to avoid generating duplicates. */ +#define SEQUENCE_RESULT_SIZE 5 -static int last_linenum = 0; -static char *last_filename = 0; +static rtx sequence_result[SEQUENCE_RESULT_SIZE]; -/* A vector indexed by pseudo reg number. The allocated length - of this vector is regno_pointer_flag_length. Since this - vector is needed during the expansion phase when the total - number of registers in the function is not yet known, - it is copied and made bigger when necessary. */ +/* During RTL generation, we also keep a list of free INSN rtl codes. */ +static rtx free_insn; -char *regno_pointer_flag; -int regno_pointer_flag_length; +#define first_insn (cfun->emit->x_first_insn) +#define last_insn (cfun->emit->x_last_insn) +#define cur_insn_uid (cfun->emit->x_cur_insn_uid) +#define last_linenum (cfun->emit->x_last_linenum) +#define last_filename (cfun->emit->x_last_filename) +#define first_label_num (cfun->emit->x_first_label_num) + +static rtx make_jump_insn_raw PARAMS ((rtx)); +static rtx make_call_insn_raw PARAMS ((rtx)); +static rtx find_line_note PARAMS ((rtx)); +static void mark_sequence_stack PARAMS ((struct sequence_stack *)); +static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx, + int)); +static void unshare_all_rtl_1 PARAMS ((rtx)); +static void unshare_all_decls PARAMS ((tree)); +static void reset_used_decls PARAMS ((tree)); +static void mark_label_nuses PARAMS ((rtx)); +static hashval_t const_int_htab_hash PARAMS ((const void *)); +static int const_int_htab_eq PARAMS ((const void *, + const void *)); +static hashval_t mem_attrs_htab_hash PARAMS ((const void *)); +static int mem_attrs_htab_eq PARAMS ((const void *, + const void *)); +static void mem_attrs_mark PARAMS ((const void *)); +static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx, + rtx, unsigned int, + enum machine_mode)); +static tree component_ref_for_mem_expr PARAMS ((tree)); + +/* Probability of the conditional branch currently proceeded by try_split. + Set to -1 otherwise. */ +int split_branch_probability = -1; + +/* Returns a hash code for X (which is a really a CONST_INT). */ -/* Indexed by pseudo register number, if nonzero gives the known alignment - for that pseudo (if regno_pointer_flag is set). - Allocated in parallel with regno_pointer_flag. */ -char *regno_pointer_align; +static hashval_t +const_int_htab_hash (x) + const void *x; +{ + return (hashval_t) INTVAL ((const struct rtx_def *) x); +} -/* Indexed by pseudo register number, gives the rtx for that pseudo. - Allocated in parallel with regno_pointer_flag. */ +/* Returns non-zero if the value represented by X (which is really a + CONST_INT) is the same as that given by Y (which is really a + HOST_WIDE_INT *). */ -rtx *regno_reg_rtx; +static int +const_int_htab_eq (x, y) + const void *x; + const void *y; +{ + return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y)); +} -/* Stack of pending (incomplete) sequences saved by `start_sequence'. - Each element describes one pending sequence. - The main insn-chain is saved in the last element of the chain, - unless the chain is empty. */ +/* Returns a hash code for X (which is a really a mem_attrs *). */ -struct sequence_stack *sequence_stack; +static hashval_t +mem_attrs_htab_hash (x) + const void *x; +{ + mem_attrs *p = (mem_attrs *) x; -/* start_sequence and gen_sequence can make a lot of rtx expressions which are - shortly thrown away. We use two mechanisms to prevent this waste: + return (p->alias ^ (p->align * 1000) + ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000) + ^ ((p->size ? INTVAL (p->size) : 0) * 2500000) + ^ (size_t) p->expr); +} - First, we keep a list of the expressions used to represent the sequence - stack in sequence_element_free_list. +/* Returns non-zero if the value represented by X (which is really a + mem_attrs *) is the same as that given by Y (which is also really a + mem_attrs *). */ - Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated - rtvec for use by gen_sequence. One entry for each size is sufficient - because most cases are calls to gen_sequence followed by immediately - emitting the SEQUENCE. Reuse is safe since emitting a sequence is - destructive on the insn in it anyway and hence can't be redone. +static int +mem_attrs_htab_eq (x, y) + const void *x; + const void *y; +{ + mem_attrs *p = (mem_attrs *) x; + mem_attrs *q = (mem_attrs *) y; - We do not bother to save this cached data over nested function calls. - Instead, we just reinitialize them. */ + return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset + && p->size == q->size && p->align == q->align); +} -#define SEQUENCE_RESULT_SIZE 5 +/* This routine is called when we determine that we need a mem_attrs entry. + It marks the associated decl and RTL as being used, if present. */ -static struct sequence_stack *sequence_element_free_list; -static rtx sequence_result[SEQUENCE_RESULT_SIZE]; +static void +mem_attrs_mark (x) + const void *x; +{ + mem_attrs *p = (mem_attrs *) x; -/* During RTL generation, we also keep a list of free INSN rtl codes. */ -static rtx free_insn; + if (p->expr) + ggc_mark_tree (p->expr); -extern int rtx_equal_function_value_matters; + if (p->offset) + ggc_mark_rtx (p->offset); -/* Filename and line number of last line-number note, - whether we actually emitted it or not. */ -extern char *emit_filename; -extern int emit_lineno; + if (p->size) + ggc_mark_rtx (p->size); +} + +/* Allocate a new mem_attrs structure and insert it into the hash table if + one identical to it is not already in the table. We are doing this for + MEM of mode MODE. */ + +static mem_attrs * +get_mem_attrs (alias, expr, offset, size, align, mode) + HOST_WIDE_INT alias; + tree expr; + rtx offset; + rtx size; + unsigned int align; + enum machine_mode mode; +{ + mem_attrs attrs; + void **slot; + + /* If everything is the default, we can just return zero. */ + if (alias == 0 && expr == 0 && offset == 0 + && (size == 0 + || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size))) + && (align == BITS_PER_UNIT + || (STRICT_ALIGNMENT + && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode)))) + return 0; + + attrs.alias = alias; + attrs.expr = expr; + attrs.offset = offset; + attrs.size = size; + attrs.align = align; + + slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT); + if (*slot == 0) + { + *slot = ggc_alloc (sizeof (mem_attrs)); + memcpy (*slot, &attrs, sizeof (mem_attrs)); + } + + return *slot; +} + +/* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and + don't attempt to share with the various global pieces of rtl (such as + frame_pointer_rtx). */ -static rtx make_jump_insn_raw PROTO((rtx)); -static rtx make_call_insn_raw PROTO((rtx)); -static rtx find_line_note PROTO((rtx)); -static void unshare_all_rtl_1 PROTO((rtx)); -static void unshare_all_decls PROTO((tree)); -static void reset_used_decls PROTO((tree)); - rtx -gen_rtx_CONST_INT (mode, arg) +gen_raw_REG (mode, regno) enum machine_mode mode; + int regno; +{ + rtx x = gen_rtx_raw_REG (mode, regno); + ORIGINAL_REGNO (x) = regno; + return x; +} + +/* There are some RTL codes that require special attention; the generation + functions do the raw handling. If you add to this list, modify + special_rtx in gengenrtl.c as well. */ + +rtx +gen_rtx_CONST_INT (mode, arg) + enum machine_mode mode ATTRIBUTE_UNUSED; HOST_WIDE_INT arg; { + void **slot; + if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) - return &const_int_rtx[arg + MAX_SAVED_CONST_INT]; + return const_int_rtx[arg + MAX_SAVED_CONST_INT]; #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1 if (const_true_rtx && arg == STORE_FLAG_VALUE) return const_true_rtx; #endif - return gen_rtx_raw_CONST_INT (mode, arg); + /* Look up the CONST_INT in the hash table. */ + slot = htab_find_slot_with_hash (const_int_htab, &arg, + (hashval_t) arg, INSERT); + if (*slot == 0) + *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg); + + return (rtx) *slot; } -/* CONST_DOUBLEs needs special handling because its length is known +/* CONST_DOUBLEs needs special handling because their length is known only at run-time. */ + rtx -gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2) +gen_rtx_CONST_DOUBLE (mode, arg0, arg1) enum machine_mode mode; - rtx arg0; - HOST_WIDE_INT arg1, arg2; + HOST_WIDE_INT arg0, arg1; { rtx r = rtx_alloc (CONST_DOUBLE); int i; PUT_MODE (r, mode); - XEXP (r, 0) = arg0; - XEXP (r, 1) = NULL_RTX; + X0EXP (r, 0) = NULL_RTX; + XWINT (r, 1) = arg0; XWINT (r, 2) = arg1; - XWINT (r, 3) = arg2; - for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i) + for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 2; --i) XWINT (r, i) = 0; return r; @@ -327,11 +411,14 @@ gen_rtx_REG (mode, regno) if (regno == RETURN_ADDRESS_POINTER_REGNUM) return return_address_pointer_rtx; #endif + if (regno == PIC_OFFSET_TABLE_REGNUM + && fixed_regs[PIC_OFFSET_TABLE_REGNUM]) + return pic_offset_table_rtx; if (regno == STACK_POINTER_REGNUM) return stack_pointer_rtx; } - return gen_rtx_raw_REG (mode, regno); + return gen_raw_REG (mode, regno); } rtx @@ -343,11 +430,50 @@ gen_rtx_MEM (mode, addr) /* This field is not cleared by the mere allocation of the rtx, so we clear it here. */ - MEM_ALIAS_SET (rt) = 0; + MEM_ATTRS (rt) = 0; return rt; } +rtx +gen_rtx_SUBREG (mode, reg, offset) + enum machine_mode mode; + rtx reg; + int offset; +{ + /* This is the most common failure type. + Catch it early so we can see who does it. */ + if ((offset % GET_MODE_SIZE (mode)) != 0) + abort (); + + /* This check isn't usable right now because combine will + throw arbitrary crap like a CALL into a SUBREG in + gen_lowpart_for_combine so we must just eat it. */ +#if 0 + /* Check for this too. */ + if (offset >= GET_MODE_SIZE (GET_MODE (reg))) + abort (); +#endif + return gen_rtx_fmt_ei (SUBREG, mode, reg, offset); +} + +/* Generate a SUBREG representing the least-significant part of REG if MODE + is smaller than mode of REG, otherwise paradoxical SUBREG. */ + +rtx +gen_lowpart_SUBREG (mode, reg) + enum machine_mode mode; + rtx reg; +{ + enum machine_mode inmode; + + inmode = GET_MODE (reg); + if (inmode == VOIDmode) + inmode = mode; + return gen_rtx_SUBREG (mode, reg, + subreg_lowpart_offset (mode, inmode)); +} + /* rtx gen_rtx (code, mode, [element1, ..., elementn]) ** ** This routine generates an RTX of the size specified by @@ -365,7 +491,7 @@ gen_rtx_MEM (mode, addr) ** ** ...would be generated by the following C code: ** -** gen_rtx (PLUS, QImode, +** gen_rtx (PLUS, QImode, ** gen_rtx (MEM, QImode, ** gen_rtx (REG, SImode, 1)), ** gen_rtx (MEM, QImode, @@ -376,23 +502,15 @@ gen_rtx_MEM (mode, addr) /*VARARGS2*/ rtx -gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...)) +gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...)) { -#ifndef ANSI_PROTOTYPES - enum rtx_code code; - enum machine_mode mode; -#endif - va_list p; - register int i; /* Array indices... */ - register char *fmt; /* Current rtx's format... */ - register rtx rt_val; /* RTX to return to caller... */ - - VA_START (p, mode); + int i; /* Array indices... */ + const char *fmt; /* Current rtx's format... */ + rtx rt_val; /* RTX to return to caller... */ -#ifndef ANSI_PROTOTYPES - code = va_arg (p, enum rtx_code); - mode = va_arg (p, enum machine_mode); -#endif + VA_OPEN (p, mode); + VA_FIXEDARG (p, enum rtx_code, code); + VA_FIXEDARG (p, enum machine_mode, mode); switch (code) { @@ -402,10 +520,10 @@ gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...)) case CONST_DOUBLE: { - rtx arg0 = va_arg (p, rtx); + HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT); HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT); - HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT); - rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2); + + rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1); } break; @@ -465,7 +583,7 @@ gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...)) break; } - va_end (p); + VA_CLOSE (p); return rt_val; } @@ -477,20 +595,13 @@ gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...)) /*VARARGS1*/ rtvec -gen_rtvec VPROTO((int n, ...)) +gen_rtvec VPARAMS ((int n, ...)) { -#ifndef ANSI_PROTOTYPES - int n; -#endif - int i; - va_list p; + int i, save_n; rtx *vector; - VA_START (p, n); - -#ifndef ANSI_PROTOTYPES - n = va_arg (p, int); -#endif + VA_OPEN (p, n); + VA_FIXEDARG (p, int, n); if (n == 0) return NULL_RTVEC; /* Don't allocate an empty rtvec... */ @@ -499,9 +610,12 @@ gen_rtvec VPROTO((int n, ...)) for (i = 0; i < n; i++) vector[i] = va_arg (p, rtx); - va_end (p); - return gen_rtvec_v (n, vector); + /* The definition of VA_* in K&R C causes `n' to go out of scope. */ + save_n = n; + VA_CLOSE (p); + + return gen_rtvec_v (save_n, vector); } rtvec @@ -509,27 +623,8 @@ gen_rtvec_v (n, argp) int n; rtx *argp; { - register int i; - register rtvec rt_val; - - if (n == 0) - return NULL_RTVEC; /* Don't allocate an empty rtvec... */ - - rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ - - for (i = 0; i < n; i++) - rt_val->elem[i].rtx = *argp++; - - return rt_val; -} - -rtvec -gen_rtvec_vv (n, argp) - int n; - rtunion *argp; -{ - register int i; - register rtvec rt_val; + int i; + rtvec rt_val; if (n == 0) return NULL_RTVEC; /* Don't allocate an empty rtvec... */ @@ -537,7 +632,7 @@ gen_rtvec_vv (n, argp) rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ for (i = 0; i < n; i++) - rt_val->elem[i].rtx = (argp++)->rtx; + rt_val->elem[i] = *argp++; return rt_val; } @@ -549,15 +644,17 @@ rtx gen_reg_rtx (mode) enum machine_mode mode; { - register rtx val; + struct function *f = cfun; + rtx val; /* Don't let anything called after initial flow analysis create new registers. */ if (no_new_pseudos) abort (); - if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT - || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT) + if (generating_concat_p + && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT + || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)) { /* For complex modes, don't make a single pseudo. Instead, make a CONCAT of two pseudos. @@ -577,34 +674,34 @@ gen_reg_rtx (mode) return gen_rtx_CONCAT (mode, realpart, imagpart); } - /* Make sure regno_pointer_flag and regno_reg_rtx are large + /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large enough to have an element for this pseudo reg number. */ - if (reg_rtx_no == regno_pointer_flag_length) + if (reg_rtx_no == f->emit->regno_pointer_align_length) { + int old_size = f->emit->regno_pointer_align_length; + char *new; rtx *new1; - char *new = - (char *) savealloc (regno_pointer_flag_length * 2); - bcopy (regno_pointer_flag, new, regno_pointer_flag_length); - bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length); - regno_pointer_flag = new; - - new = (char *) savealloc (regno_pointer_flag_length * 2); - bcopy (regno_pointer_align, new, regno_pointer_flag_length); - bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length); - regno_pointer_align = new; - - new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx)); - bcopy ((char *) regno_reg_rtx, (char *) new1, - regno_pointer_flag_length * sizeof (rtx)); - bzero ((char *) &new1[regno_pointer_flag_length], - regno_pointer_flag_length * sizeof (rtx)); + tree *new2; + + new = xrealloc (f->emit->regno_pointer_align, old_size * 2); + memset (new + old_size, 0, old_size); + f->emit->regno_pointer_align = (unsigned char *) new; + + new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx, + old_size * 2 * sizeof (rtx)); + memset (new1 + old_size, 0, old_size * sizeof (rtx)); regno_reg_rtx = new1; - regno_pointer_flag_length *= 2; + new2 = (tree *) xrealloc (f->emit->regno_decl, + old_size * 2 * sizeof (tree)); + memset (new2 + old_size, 0, old_size * sizeof (tree)); + f->emit->regno_decl = new2; + + f->emit->regno_pointer_align_length = old_size * 2; } - val = gen_rtx_raw_REG (mode, reg_rtx_no); + val = gen_raw_REG (mode, reg_rtx_no); regno_reg_rtx[reg_rtx_no++] = val; return val; } @@ -634,9 +731,9 @@ mark_reg_pointer (reg, align) rtx reg; int align; { - if (! REGNO_POINTER_FLAG (REGNO (reg))) + if (! REG_POINTER (reg)) { - REGNO_POINTER_FLAG (REGNO (reg)) = 1; + REG_POINTER (reg) = 1; if (align) REGNO_POINTER_ALIGN (REGNO (reg)) = align; @@ -672,9 +769,41 @@ get_first_label_num () return first_label_num; } +/* Return the final regno of X, which is a SUBREG of a hard + register. */ +int +subreg_hard_regno (x, check_mode) + rtx x; + int check_mode; +{ + enum machine_mode mode = GET_MODE (x); + unsigned int byte_offset, base_regno, final_regno; + rtx reg = SUBREG_REG (x); + + /* This is where we attempt to catch illegal subregs + created by the compiler. */ + if (GET_CODE (x) != SUBREG + || GET_CODE (reg) != REG) + abort (); + base_regno = REGNO (reg); + if (base_regno >= FIRST_PSEUDO_REGISTER) + abort (); + if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg))) + abort (); + + /* Catch non-congruent offsets too. */ + byte_offset = SUBREG_BYTE (x); + if ((byte_offset % GET_MODE_SIZE (mode)) != 0) + abort (); + + final_regno = subreg_regno (x); + + return final_regno; +} + /* Return a value representing some low-order bits of X, where the number of low-order bits is given by MODE. Note that no conversion is done - between floating-point and fixed-point values, rather, the bit + between floating-point and fixed-point values, rather, the bit representation is returned. This function handles the cases in common between gen_lowpart, below, @@ -686,24 +815,22 @@ get_first_label_num () rtx gen_lowpart_common (mode, x) enum machine_mode mode; - register rtx x; + rtx x; { - int word = 0; + int msize = GET_MODE_SIZE (mode); + int xsize = GET_MODE_SIZE (GET_MODE (x)); + int offset = 0; if (GET_MODE (x) == mode) return x; /* MODE must occupy no more words than the mode of X. */ if (GET_MODE (x) != VOIDmode - && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD - > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1)) - / UNITS_PER_WORD))) + && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD + > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) return 0; - if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) - word = ((GET_MODE_SIZE (GET_MODE (x)) - - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) - / UNITS_PER_WORD); + offset = subreg_lowpart_offset (mode, GET_MODE (x)); if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) && (GET_MODE_CLASS (mode) == MODE_INT @@ -724,58 +851,9 @@ gen_lowpart_common (mode, x) else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0)); } - else if (GET_CODE (x) == SUBREG - && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD - || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x)))) - return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0 - ? SUBREG_REG (x) - : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word)); - else if (GET_CODE (x) == REG) - { - /* Let the backend decide how many registers to skip. This is needed - in particular for Sparc64 where fp regs are smaller than a word. */ - /* ??? Note that subregs are now ambiguous, in that those against - pseudos are sized by the Word Size, while those against hard - regs are sized by the underlying register size. Better would be - to always interpret the subreg offset parameter as bytes or bits. */ - - if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER) - word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)) - - HARD_REGNO_NREGS (REGNO (x), mode)); - - /* If the register is not valid for MODE, return 0. If we don't - do this, there is no way to fix up the resulting REG later. - But we do do this if the current REG is not valid for its - mode. This latter is a kludge, but is required due to the - way that parameters are passed on some machines, most - notably Sparc. */ - if (REGNO (x) < FIRST_PSEUDO_REGISTER - && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode) - && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x))) - return 0; - else if (REGNO (x) < FIRST_PSEUDO_REGISTER - /* integrate.c can't handle parts of a return value register. */ - && (! REG_FUNCTION_VALUE_P (x) - || ! rtx_equal_function_value_matters) -#ifdef CLASS_CANNOT_CHANGE_SIZE - && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x)) - && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT - && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT - && (TEST_HARD_REG_BIT - (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], - REGNO (x)))) -#endif - /* We want to keep the stack, frame, and arg pointers - special. */ - && x != frame_pointer_rtx -#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM - && x != arg_pointer_rtx -#endif - && x != stack_pointer_rtx) - return gen_rtx_REG (mode, REGNO (x) + word); - else - return gen_rtx_SUBREG (mode, x, word); - } + else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG + || GET_CODE (x) == CONCAT) + return simplify_gen_subreg (mode, x, GET_MODE (x), offset); /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits from the low-order part of the constant. */ else if ((GET_MODE_CLASS (mode) == MODE_INT @@ -785,11 +863,7 @@ gen_lowpart_common (mode, x) { /* If MODE is twice the host word size, X is already the desired representation. Otherwise, if MODE is wider than a word, we can't - do this. If MODE is exactly a word, return just one CONST_INT. - If MODE is smaller than a word, clear the bits that don't belong - in our mode, unless they and our sign bit are all one. So we get - either a reasonable negative value or a reasonable unsigned value - for this mode. */ + do this. If MODE is exactly a word, return just one CONST_INT. */ if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT) return x; @@ -801,22 +875,22 @@ gen_lowpart_common (mode, x) else { /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */ - int width = GET_MODE_BITSIZE (mode); HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) : CONST_DOUBLE_LOW (x)); /* Sign extend to HOST_WIDE_INT. */ - val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width); + val = trunc_int_for_mode (val, mode); return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x : GEN_INT (val)); } } +#ifndef REAL_ARITHMETIC /* If X is an integral constant but we want it in floating-point, it must be the case that we have a union of an integer and a floating-point value. If the machine-parameters allow it, simulate that union here - and return the result. The two-word and single-word cases are + and return the result. The two-word and single-word cases are different. */ else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT @@ -826,23 +900,12 @@ gen_lowpart_common (mode, x) && GET_MODE_SIZE (mode) == UNITS_PER_WORD && GET_CODE (x) == CONST_INT && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT) -#ifdef REAL_ARITHMETIC - { - REAL_VALUE_TYPE r; - HOST_WIDE_INT i; - - i = INTVAL (x); - r = REAL_VALUE_FROM_TARGET_SINGLE (i); - return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); - } -#else { union {HOST_WIDE_INT i; float d; } u; u.i = INTVAL (x); return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); } -#endif else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) || flag_pretend_float) @@ -852,28 +915,6 @@ gen_lowpart_common (mode, x) && GET_MODE (x) == VOIDmode && (sizeof (double) * HOST_BITS_PER_CHAR == 2 * HOST_BITS_PER_WIDE_INT)) -#ifdef REAL_ARITHMETIC - { - REAL_VALUE_TYPE r; - HOST_WIDE_INT i[2]; - HOST_WIDE_INT low, high; - - if (GET_CODE (x) == CONST_INT) - low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); - else - low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); - - /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the - target machine. */ - if (WORDS_BIG_ENDIAN) - i[0] = high, i[1] = low; - else - i[0] = low, i[1] = high; - - r = REAL_VALUE_FROM_TARGET_DOUBLE (i); - return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); - } -#else { union {HOST_WIDE_INT i[2]; double d; } u; HOST_WIDE_INT low, high; @@ -882,47 +923,13 @@ gen_lowpart_common (mode, x) low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); else low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); - #ifdef HOST_WORDS_BIG_ENDIAN u.i[0] = high, u.i[1] = low; #else u.i[0] = low, u.i[1] = high; #endif - return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); } -#endif - - /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the - same as sizeof (double) or when sizeof (float) is larger than the - size of a word on the target machine. */ -#ifdef REAL_ARITHMETIC - else if (mode == SFmode && GET_CODE (x) == CONST_INT) - { - REAL_VALUE_TYPE r; - HOST_WIDE_INT i; - - i = INTVAL (x); - r = REAL_VALUE_FROM_TARGET_SINGLE (i); - return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); - } - else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT - && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) - || flag_pretend_float) - && GET_MODE_CLASS (mode) == MODE_FLOAT - && GET_MODE_SIZE (mode) == UNITS_PER_WORD - && GET_CODE (x) == CONST_INT - && (sizeof (double) * HOST_BITS_PER_CHAR - == HOST_BITS_PER_WIDE_INT)) - { - REAL_VALUE_TYPE r; - HOST_WIDE_INT i; - - i = INTVAL (x); - r = REAL_VALUE_FROM_TARGET_DOUBLE (&i); - return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); - } -#endif /* Similarly, if this is converting a floating-point value into a single-word integer. Only do this is the host and target parameters are @@ -936,7 +943,7 @@ gen_lowpart_common (mode, x) && GET_CODE (x) == CONST_DOUBLE && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT && GET_MODE_BITSIZE (mode) == BITS_PER_WORD) - return operand_subword (x, word, 0, GET_MODE (x)); + return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x)); /* Similarly, if this is converting a floating-point value into a two-word integer, we can do this one word at a time and make an @@ -952,15 +959,123 @@ gen_lowpart_common (mode, x) && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD) { - rtx lowpart - = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x)); - rtx highpart - = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x)); - + rtx lowpart, highpart; + + lowpart = constant_subword (x, + (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN, + GET_MODE (x)); + highpart = constant_subword (x, + (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN), + GET_MODE (x)); if (lowpart && GET_CODE (lowpart) == CONST_INT && highpart && GET_CODE (highpart) == CONST_INT) return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode); } +#else /* ifndef REAL_ARITHMETIC */ + + /* When we have a FP emulator, we can handle all conversions between + FP and integer operands. This simplifies reload because it + doesn't have to deal with constructs like (subreg:DI + (const_double:SF ...)) or (subreg:DF (const_int ...)). */ + /* Single-precision floats are always 32-bits and double-precision + floats are always 64-bits. */ + + else if (GET_MODE_CLASS (mode) == MODE_FLOAT + && GET_MODE_BITSIZE (mode) == 32 + && GET_CODE (x) == CONST_INT) + { + REAL_VALUE_TYPE r; + HOST_WIDE_INT i; + + i = INTVAL (x); + r = REAL_VALUE_FROM_TARGET_SINGLE (i); + return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); + } + else if (GET_MODE_CLASS (mode) == MODE_FLOAT + && GET_MODE_BITSIZE (mode) == 64 + && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) + && GET_MODE (x) == VOIDmode) + { + REAL_VALUE_TYPE r; + HOST_WIDE_INT i[2]; + HOST_WIDE_INT low, high; + + if (GET_CODE (x) == CONST_INT) + { + low = INTVAL (x); + high = low >> (HOST_BITS_PER_WIDE_INT - 1); + } + else + { + low = CONST_DOUBLE_LOW (x); + high = CONST_DOUBLE_HIGH (x); + } + +#if HOST_BITS_PER_WIDE_INT == 32 + /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the + target machine. */ + if (WORDS_BIG_ENDIAN) + i[0] = high, i[1] = low; + else + i[0] = low, i[1] = high; +#else + i[0] = low; +#endif + + r = REAL_VALUE_FROM_TARGET_DOUBLE (i); + return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); + } + else if ((GET_MODE_CLASS (mode) == MODE_INT + || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) + && GET_CODE (x) == CONST_DOUBLE + && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) + { + REAL_VALUE_TYPE r; + long i[4]; /* Only the low 32 bits of each 'long' are used. */ + int endian = WORDS_BIG_ENDIAN ? 1 : 0; + + /* Convert 'r' into an array of four 32-bit words in target word + order. */ + REAL_VALUE_FROM_CONST_DOUBLE (r, x); + switch (GET_MODE_BITSIZE (GET_MODE (x))) + { + case 32: + REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]); + i[1] = 0; + i[2] = 0; + i[3 - 3 * endian] = 0; + break; + case 64: + REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian); + i[2 - 2 * endian] = 0; + i[3 - 2 * endian] = 0; + break; + case 96: + REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian); + i[3 - 3 * endian] = 0; + break; + case 128: + REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i); + break; + default: + abort (); + } + /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE + and return it. */ +#if HOST_BITS_PER_WIDE_INT == 32 + return immed_double_const (i[3 * endian], i[1 + endian], mode); +#else + if (HOST_BITS_PER_WIDE_INT != 64) + abort (); + + return immed_double_const ((((unsigned long) i[3 * endian]) + | ((HOST_WIDE_INT) i[1 + endian] << 32)), + (((unsigned long) i[2 - endian]) + | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)), + mode); +#endif + } +#endif /* ifndef REAL_ARITHMETIC */ /* Otherwise, we can't do this. */ return 0; @@ -972,15 +1087,14 @@ gen_lowpart_common (mode, x) rtx gen_realpart (mode, x) enum machine_mode mode; - register rtx x; + rtx x; { - if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode) - return XEXP (x, 0); - else if (WORDS_BIG_ENDIAN - && GET_MODE_BITSIZE (mode) < BITS_PER_WORD - && REG_P (x) - && REGNO (x) < FIRST_PSEUDO_REGISTER) - fatal ("Unable to access real part of complex value in a hard register on this target"); + if (WORDS_BIG_ENDIAN + && GET_MODE_BITSIZE (mode) < BITS_PER_WORD + && REG_P (x) + && REGNO (x) < FIRST_PSEUDO_REGISTER) + internal_error + ("can't access real part of complex value in hard register"); else if (WORDS_BIG_ENDIAN) return gen_highpart (mode, x); else @@ -993,17 +1107,16 @@ gen_realpart (mode, x) rtx gen_imagpart (mode, x) enum machine_mode mode; - register rtx x; + rtx x; { - if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode) - return XEXP (x, 1); - else if (WORDS_BIG_ENDIAN) + if (WORDS_BIG_ENDIAN) return gen_lowpart (mode, x); - else if (!WORDS_BIG_ENDIAN + else if (! WORDS_BIG_ENDIAN && GET_MODE_BITSIZE (mode) < BITS_PER_WORD && REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) - fatal ("Unable to access imaginary part of complex value in a hard register on this target"); + internal_error + ("can't access imaginary part of complex value in hard register"); else return gen_highpart (mode, x); } @@ -1020,7 +1133,8 @@ subreg_realpart_p (x) if (GET_CODE (x) != SUBREG) abort (); - return SUBREG_WORD (x) * UNITS_PER_WORD < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))); + return ((unsigned int) SUBREG_BYTE (x) + < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)))); } /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, @@ -1033,7 +1147,7 @@ subreg_realpart_p (x) rtx gen_lowpart (mode, x) enum machine_mode mode; - register rtx x; + rtx x; { rtx result = gen_lowpart_common (mode, x); @@ -1050,7 +1164,7 @@ gen_lowpart (mode, x) else if (GET_CODE (x) == MEM) { /* The only additional case we can do is MEM. */ - register int offset = 0; + int offset = 0; if (WORDS_BIG_ENDIAN) offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); @@ -1061,7 +1175,7 @@ gen_lowpart (mode, x) offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); - return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); + return adjust_address (x, mode, offset); } else if (GET_CODE (x) == ADDRESSOF) return gen_lowpart (mode, force_reg (GET_MODE (x), x)); @@ -1069,92 +1183,95 @@ gen_lowpart (mode, x) abort (); } -/* Like `gen_lowpart', but refer to the most significant part. +/* Like `gen_lowpart', but refer to the most significant part. This is used to access the imaginary part of a complex number. */ rtx gen_highpart (mode, x) enum machine_mode mode; - register rtx x; + rtx x; { + unsigned int msize = GET_MODE_SIZE (mode); + rtx result; + /* This case loses if X is a subreg. To catch bugs early, complain if an invalid MODE is used even in other cases. */ - if (GET_MODE_SIZE (mode) > UNITS_PER_WORD - && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x))) + if (msize > UNITS_PER_WORD + && msize != GET_MODE_UNIT_SIZE (GET_MODE (x))) abort (); - if (GET_CODE (x) == CONST_DOUBLE -#if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE)) - && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT -#endif - ) - return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode)); - else if (GET_CODE (x) == CONST_INT) - { - if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD) - return const0_rtx; - return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD)); - } - else if (GET_CODE (x) == MEM) - { - register int offset = 0; - if (! WORDS_BIG_ENDIAN) - offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) - - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); - if (! BYTES_BIG_ENDIAN - && GET_MODE_SIZE (mode) < UNITS_PER_WORD) - offset -= (GET_MODE_SIZE (mode) - - MIN (UNITS_PER_WORD, - GET_MODE_SIZE (GET_MODE (x)))); + result = simplify_gen_subreg (mode, x, GET_MODE (x), + subreg_highpart_offset (mode, GET_MODE (x))); - return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); - } - else if (GET_CODE (x) == SUBREG) + /* simplify_gen_subreg is not guaranteed to return a valid operand for + the target if we have a MEM. gen_highpart must return a valid operand, + emitting code if necessary to do so. */ + if (result != NULL_RTX && GET_CODE (result) == MEM) + result = validize_mem (result); + + if (!result) + abort (); + return result; +} + +/* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can + be VOIDmode constant. */ +rtx +gen_highpart_mode (outermode, innermode, exp) + enum machine_mode outermode, innermode; + rtx exp; +{ + if (GET_MODE (exp) != VOIDmode) { - /* The only time this should occur is when we are looking at a - multi-word item with a SUBREG whose mode is the same as that of the - item. It isn't clear what we would do if it wasn't. */ - if (SUBREG_WORD (x) != 0) + if (GET_MODE (exp) != innermode) abort (); - return gen_highpart (mode, SUBREG_REG (x)); + return gen_highpart (outermode, exp); } - else if (GET_CODE (x) == REG) - { - int word; + return simplify_gen_subreg (outermode, exp, innermode, + subreg_highpart_offset (outermode, innermode)); +} +/* Return offset in bytes to get OUTERMODE low part + of the value in mode INNERMODE stored in memory in target format. */ - /* Let the backend decide how many registers to skip. This is needed - in particular for sparc64 where fp regs are smaller than a word. */ - /* ??? Note that subregs are now ambiguous, in that those against - pseudos are sized by the word size, while those against hard - regs are sized by the underlying register size. Better would be - to always interpret the subreg offset parameter as bytes or bits. */ +unsigned int +subreg_lowpart_offset (outermode, innermode) + enum machine_mode outermode, innermode; +{ + unsigned int offset = 0; + int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode)); + if (difference > 0) + { if (WORDS_BIG_ENDIAN) - word = 0; - else if (REGNO (x) < FIRST_PSEUDO_REGISTER) - word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)) - - HARD_REGNO_NREGS (REGNO (x), mode)); - else - word = ((GET_MODE_SIZE (GET_MODE (x)) - - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) - / UNITS_PER_WORD); - - if (REGNO (x) < FIRST_PSEUDO_REGISTER - /* integrate.c can't handle parts of a return value register. */ - && (! REG_FUNCTION_VALUE_P (x) - || ! rtx_equal_function_value_matters) - /* We want to keep the stack, frame, and arg pointers special. */ - && x != frame_pointer_rtx -#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM - && x != arg_pointer_rtx -#endif - && x != stack_pointer_rtx) - return gen_rtx_REG (mode, REGNO (x) + word); - else - return gen_rtx_SUBREG (mode, x, word); + offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; + if (BYTES_BIG_ENDIAN) + offset += difference % UNITS_PER_WORD; } - else - abort (); + + return offset; +} + +/* Return offset in bytes to get OUTERMODE high part + of the value in mode INNERMODE stored in memory in target format. */ +unsigned int +subreg_highpart_offset (outermode, innermode) + enum machine_mode outermode, innermode; +{ + unsigned int offset = 0; + int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode)); + + if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode)) + abort (); + + if (difference > 0) + { + if (! WORDS_BIG_ENDIAN) + offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; + if (! BYTES_BIG_ENDIAN) + offset += difference % UNITS_PER_WORD; + } + + return offset; } /* Return 1 iff X, assumed to be a SUBREG, @@ -1170,155 +1287,32 @@ subreg_lowpart_p (x) else if (GET_MODE (SUBREG_REG (x)) == VOIDmode) return 0; - if (WORDS_BIG_ENDIAN - && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD) - return (SUBREG_WORD (x) - == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) - - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)) - / UNITS_PER_WORD)); - - return SUBREG_WORD (x) == 0; + return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x))) + == SUBREG_BYTE (x)); } -/* Return subword I of operand OP. - The word number, I, is interpreted as the word number starting at the - low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN, - otherwise it is the high-order word. - If we cannot extract the required word, we return zero. Otherwise, an - rtx corresponding to the requested word will be returned. - - VALIDATE_ADDRESS is nonzero if the address should be validated. Before - reload has completed, a valid address will always be returned. After - reload, if a valid address cannot be returned, we return zero. - - If VALIDATE_ADDRESS is zero, we simply form the required address; validating - it is the responsibility of the caller. - - MODE is the mode of OP in case it is a CONST_INT. */ +/* Helper routine for all the constant cases of operand_subword. + Some places invoke this directly. */ rtx -operand_subword (op, i, validate_address, mode) +constant_subword (op, offset, mode) rtx op; - int i; - int validate_address; + int offset; enum machine_mode mode; { - HOST_WIDE_INT val; int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; - int bits_per_word = BITS_PER_WORD; - - if (mode == VOIDmode) - mode = GET_MODE (op); - - if (mode == VOIDmode) - abort (); - - /* If OP is narrower than a word, fail. */ - if (mode != BLKmode - && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)) - return 0; - - /* If we want a word outside OP, return zero. */ - if (mode != BLKmode - && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)) - return const0_rtx; + HOST_WIDE_INT val; /* If OP is already an integer word, return it. */ if (GET_MODE_CLASS (mode) == MODE_INT && GET_MODE_SIZE (mode) == UNITS_PER_WORD) return op; - /* If OP is a REG or SUBREG, we can handle it very simply. */ - if (GET_CODE (op) == REG) - { - /* ??? There is a potential problem with this code. It does not - properly handle extractions of a subword from a hard register - that is larger than word_mode. Presumably the check for - HARD_REGNO_MODE_OK catches these most of these cases. */ - - /* If OP is a hard register, but OP + I is not a hard register, - then extracting a subword is impossible. - - For example, consider if OP is the last hard register and it is - larger than word_mode. If we wanted word N (for N > 0) because a - part of that hard register was known to contain a useful value, - then OP + I would refer to a pseudo, not the hard register we - actually wanted. */ - if (REGNO (op) < FIRST_PSEUDO_REGISTER - && REGNO (op) + i >= FIRST_PSEUDO_REGISTER) - return 0; - - /* If the register is not valid for MODE, return 0. Note we - have to check both OP and OP + I since they may refer to - different parts of the register file. - - Consider if OP refers to the last 96bit FP register and we want - subword 3 because that subword is known to contain a value we - needed. */ - if (REGNO (op) < FIRST_PSEUDO_REGISTER - && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode) - || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))) - return 0; - else if (REGNO (op) >= FIRST_PSEUDO_REGISTER - || (REG_FUNCTION_VALUE_P (op) - && rtx_equal_function_value_matters) - /* We want to keep the stack, frame, and arg pointers - special. */ - || op == frame_pointer_rtx -#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM - || op == arg_pointer_rtx -#endif - || op == stack_pointer_rtx) - return gen_rtx_SUBREG (word_mode, op, i); - else - return gen_rtx_REG (word_mode, REGNO (op) + i); - } - else if (GET_CODE (op) == SUBREG) - return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op)); - else if (GET_CODE (op) == CONCAT) - { - int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD; - if (i < partwords) - return operand_subword (XEXP (op, 0), i, validate_address, mode); - return operand_subword (XEXP (op, 1), i - partwords, - validate_address, mode); - } - - /* Form a new MEM at the requested address. */ - if (GET_CODE (op) == MEM) - { - rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD); - rtx new; - - if (validate_address) - { - if (reload_completed) - { - if (! strict_memory_address_p (word_mode, addr)) - return 0; - } - else - addr = memory_address (word_mode, addr); - } - - new = gen_rtx_MEM (word_mode, addr); - - MEM_COPY_ATTRIBUTES (new, op); - RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op); - - return new; - } - - /* The only remaining cases are when OP is a constant. If the host and - target floating formats are the same, handling two-word floating - constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE} - are defined as returning one or two 32 bit values, respectively, - and not values of BITS_PER_WORD bits. */ #ifdef REAL_ARITHMETIC -/* The output is some bits, the width of the target machine's word. - A wider-word host can surely hold them in a CONST_INT. A narrower-word - host can't. */ + /* The output is some bits, the width of the target machine's word. + A wider-word host can surely hold them in a CONST_INT. A narrower-word + host can't. */ if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD && GET_MODE_CLASS (mode) == MODE_FLOAT && GET_MODE_BITSIZE (mode) == 64 @@ -1335,18 +1329,18 @@ operand_subword (op, i, validate_address, mode) ??? This is a potential portability problem and should be fixed at some point. - We must excercise caution with the sign bit. By definition there + We must exercise caution with the sign bit. By definition there are 32 significant bits in K; there may be more in a HOST_WIDE_INT. Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT. So we explicitly mask and sign-extend as necessary. */ if (BITS_PER_WORD == 32) { - val = k[i]; + val = k[offset]; val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; return GEN_INT (val); } #if HOST_BITS_PER_WIDE_INT >= 64 - else if (BITS_PER_WORD >= 64 && i == 0) + else if (BITS_PER_WORD >= 64 && offset == 0) { val = k[! WORDS_BIG_ENDIAN]; val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32; @@ -1356,10 +1350,10 @@ operand_subword (op, i, validate_address, mode) #endif else if (BITS_PER_WORD == 16) { - val = k[i >> 1]; - if ((i & 1) == !WORDS_BIG_ENDIAN) + val = k[offset >> 1]; + if ((offset & 1) == ! WORDS_BIG_ENDIAN) val >>= 16; - val &= 0xffff; + val = ((val & 0xffff) ^ 0x8000) - 0x8000; return GEN_INT (val); } else @@ -1369,22 +1363,31 @@ operand_subword (op, i, validate_address, mode) && GET_MODE_CLASS (mode) == MODE_FLOAT && GET_MODE_BITSIZE (mode) > 64 && GET_CODE (op) == CONST_DOUBLE) - { - long k[4]; - REAL_VALUE_TYPE rv; + { + long k[4]; + REAL_VALUE_TYPE rv; - REAL_VALUE_FROM_CONST_DOUBLE (rv, op); - REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k); + REAL_VALUE_FROM_CONST_DOUBLE (rv, op); + REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k); - if (BITS_PER_WORD == 32) - { - val = k[i]; - val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; - return GEN_INT (val); - } - else - abort (); - } + if (BITS_PER_WORD == 32) + { + val = k[offset]; + val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; + return GEN_INT (val); + } +#if HOST_BITS_PER_WIDE_INT >= 64 + else if (BITS_PER_WORD >= 64 && offset <= 1) + { + val = k[offset * 2 + ! WORDS_BIG_ENDIAN]; + val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32; + val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff; + return GEN_INT (val); + } +#endif + else + abort (); + } #else /* no REAL_ARITHMETIC */ if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) @@ -1398,10 +1401,10 @@ operand_subword (op, i, validate_address, mode) compilers don't like a conditional inside macro args, so we have two copies of the return. */ #ifdef HOST_WORDS_BIG_ENDIAN - return GEN_INT (i == WORDS_BIG_ENDIAN + return GEN_INT (offset == WORDS_BIG_ENDIAN ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); #else - return GEN_INT (i != WORDS_BIG_ENDIAN + return GEN_INT (offset != WORDS_BIG_ENDIAN ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); #endif } @@ -1427,9 +1430,9 @@ operand_subword (op, i, validate_address, mode) if (BITS_PER_WORD == 16) { - if ((i & 1) == !WORDS_BIG_ENDIAN) + if ((offset & 1) == ! WORDS_BIG_ENDIAN) val >>= 16; - val &= 0xffff; + val = ((val & 0xffff) ^ 0x8000) - 0x8000; } return GEN_INT (val); @@ -1468,10 +1471,10 @@ operand_subword (op, i, validate_address, mode) return GEN_INT (u.i); } #endif /* no REAL_ARITHMETIC */ - + /* The only remaining cases that we can handle are integers. Convert to proper endianness now since these cases need it. - At this point, i == 0 means the low-order word. + At this point, offset == 0 means the low-order word. We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT in general. However, if OP is (const_int 0), we can just return @@ -1486,58 +1489,106 @@ operand_subword (op, i, validate_address, mode) return 0; if (WORDS_BIG_ENDIAN) - i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i; + offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset; /* Find out which word on the host machine this value is in and get it from the constant. */ - val = (i / size_ratio == 0 + val = (offset / size_ratio == 0 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) : (GET_CODE (op) == CONST_INT ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); /* Get the value we want into the low bits of val. */ if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) - val = ((val >> ((i % size_ratio) * BITS_PER_WORD))); + val = ((val >> ((offset % size_ratio) * BITS_PER_WORD))); - /* Clear the bits that don't belong in our mode, unless they and our sign - bit are all one. So we get either a reasonable negative value or a - reasonable unsigned value for this mode. */ - if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT - && ((val & ((HOST_WIDE_INT) (-1) << (bits_per_word - 1))) - != ((HOST_WIDE_INT) (-1) << (bits_per_word - 1)))) - val &= ((HOST_WIDE_INT) 1 << bits_per_word) - 1; + val = trunc_int_for_mode (val, word_mode); - /* If this would be an entire word for the target, but is not for - the host, then sign-extend on the host so that the number will look - the same way on the host that it would on the target. + return GEN_INT (val); +} - For example, when building a 64 bit alpha hosted 32 bit sparc - targeted compiler, then we want the 32 bit unsigned value -1 to be - represented as a 64 bit value -1, and not as 0x00000000ffffffff. - The later confuses the sparc backend. */ +/* Return subword OFFSET of operand OP. + The word number, OFFSET, is interpreted as the word number starting + at the low-order address. OFFSET 0 is the low-order word if not + WORDS_BIG_ENDIAN, otherwise it is the high-order word. - if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT - && (val & ((HOST_WIDE_INT) 1 << (bits_per_word - 1)))) - val |= ((HOST_WIDE_INT) (-1) << bits_per_word); + If we cannot extract the required word, we return zero. Otherwise, + an rtx corresponding to the requested word will be returned. - return GEN_INT (val); + VALIDATE_ADDRESS is nonzero if the address should be validated. Before + reload has completed, a valid address will always be returned. After + reload, if a valid address cannot be returned, we return zero. + + If VALIDATE_ADDRESS is zero, we simply form the required address; validating + it is the responsibility of the caller. + + MODE is the mode of OP in case it is a CONST_INT. + + ??? This is still rather broken for some cases. The problem for the + moment is that all callers of this thing provide no 'goal mode' to + tell us to work with. This exists because all callers were written + in a word based SUBREG world. + Now use of this function can be deprecated by simplify_subreg in most + cases. + */ + +rtx +operand_subword (op, offset, validate_address, mode) + rtx op; + unsigned int offset; + int validate_address; + enum machine_mode mode; +{ + if (mode == VOIDmode) + mode = GET_MODE (op); + + if (mode == VOIDmode) + abort (); + + /* If OP is narrower than a word, fail. */ + if (mode != BLKmode + && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)) + return 0; + + /* If we want a word outside OP, return zero. */ + if (mode != BLKmode + && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)) + return const0_rtx; + + /* Form a new MEM at the requested address. */ + if (GET_CODE (op) == MEM) + { + rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD); + + if (! validate_address) + return new; + + else if (reload_completed) + { + if (! strict_memory_address_p (word_mode, XEXP (new, 0))) + return 0; + } + else + return replace_equiv_address (new, XEXP (new, 0)); + } + + /* Rest can be handled by simplify_subreg. */ + return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD)); } /* Similar to `operand_subword', but never return 0. If we can't extract the required subword, put OP into a register and try again. If that fails, - abort. We always validate the address in this case. It is not valid - to call this function after reload; it is mostly meant for RTL - generation. + abort. We always validate the address in this case. MODE is the mode of OP, in case it is CONST_INT. */ rtx -operand_subword_force (op, i, mode) +operand_subword_force (op, offset, mode) rtx op; - int i; + unsigned int offset; enum machine_mode mode; { - rtx result = operand_subword (op, i, 1, mode); + rtx result = operand_subword (op, offset, 1, mode); if (result) return result; @@ -1552,7 +1603,7 @@ operand_subword_force (op, i, mode) op = force_reg (mode, op); } - result = operand_subword (op, i, 1, mode); + result = operand_subword (op, offset, 1, mode); if (result == 0) abort (); @@ -1583,7 +1634,8 @@ reverse_comparison (insn) } else { - rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp); + rtx new = gen_rtx_COMPARE (VOIDmode, + CONST0_RTX (GET_MODE (comp)), comp); if (GET_CODE (body) == SET) SET_SRC (body) = new; else @@ -1591,16 +1643,265 @@ reverse_comparison (insn) } } -/* Return a memory reference like MEMREF, but with its mode changed - to MODE and its address changed to ADDR. - (VOIDmode means don't change the mode. - NULL for ADDR means don't change the address.) */ +/* Within a MEM_EXPR, we care about either (1) a component ref of a decl, + or (2) a component ref of something variable. Represent the later with + a NULL expression. */ -rtx -change_address (memref, mode, addr) +static tree +component_ref_for_mem_expr (ref) + tree ref; +{ + tree inner = TREE_OPERAND (ref, 0); + + if (TREE_CODE (inner) == COMPONENT_REF) + inner = component_ref_for_mem_expr (inner); + else + { + tree placeholder_ptr = 0; + + /* Now remove any conversions: they don't change what the underlying + object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */ + while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR + || TREE_CODE (inner) == NON_LVALUE_EXPR + || TREE_CODE (inner) == VIEW_CONVERT_EXPR + || TREE_CODE (inner) == SAVE_EXPR + || TREE_CODE (inner) == PLACEHOLDER_EXPR) + if (TREE_CODE (inner) == PLACEHOLDER_EXPR) + inner = find_placeholder (inner, &placeholder_ptr); + else + inner = TREE_OPERAND (inner, 0); + + if (! DECL_P (inner)) + inner = NULL_TREE; + } + + if (inner == TREE_OPERAND (ref, 0)) + return ref; + else + return build (COMPONENT_REF, TREE_TYPE (ref), inner, + TREE_OPERAND (ref, 1)); +} + +/* Given REF, a MEM, and T, either the type of X or the expression + corresponding to REF, set the memory attributes. OBJECTP is nonzero + if we are making a new object of this type. */ + +void +set_mem_attributes (ref, t, objectp) + rtx ref; + tree t; + int objectp; +{ + HOST_WIDE_INT alias = MEM_ALIAS_SET (ref); + tree expr = MEM_EXPR (ref); + rtx offset = MEM_OFFSET (ref); + rtx size = MEM_SIZE (ref); + unsigned int align = MEM_ALIGN (ref); + tree type; + + /* It can happen that type_for_mode was given a mode for which there + is no language-level type. In which case it returns NULL, which + we can see here. */ + if (t == NULL_TREE) + return; + + type = TYPE_P (t) ? t : TREE_TYPE (t); + + /* If we have already set DECL_RTL = ref, get_alias_set will get the + wrong answer, as it assumes that DECL_RTL already has the right alias + info. Callers should not set DECL_RTL until after the call to + set_mem_attributes. */ + if (DECL_P (t) && ref == DECL_RTL_IF_SET (t)) + abort (); + + /* Get the alias set from the expression or type (perhaps using a + front-end routine) and use it. */ + alias = get_alias_set (t); + + MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type); + MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type); + RTX_UNCHANGING_P (ref) + |= ((lang_hooks.honor_readonly + && (TYPE_READONLY (type) || TREE_READONLY (t))) + || (! TYPE_P (t) && TREE_CONSTANT (t))); + + /* If we are making an object of this type, or if this is a DECL, we know + that it is a scalar if the type is not an aggregate. */ + if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type)) + MEM_SCALAR_P (ref) = 1; + + /* We can set the alignment from the type if we are making an object, + this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */ + if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type)) + align = MAX (align, TYPE_ALIGN (type)); + + /* If the size is known, we can set that. */ + if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1)) + size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1)); + + /* If T is not a type, we may be able to deduce some more information about + the expression. */ + if (! TYPE_P (t)) + { + maybe_set_unchanging (ref, t); + if (TREE_THIS_VOLATILE (t)) + MEM_VOLATILE_P (ref) = 1; + + /* Now remove any conversions: they don't change what the underlying + object is. Likewise for SAVE_EXPR. */ + while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR + || TREE_CODE (t) == NON_LVALUE_EXPR + || TREE_CODE (t) == VIEW_CONVERT_EXPR + || TREE_CODE (t) == SAVE_EXPR) + t = TREE_OPERAND (t, 0); + + /* If this expression can't be addressed (e.g., it contains a reference + to a non-addressable field), show we don't change its alias set. */ + if (! can_address_p (t)) + MEM_KEEP_ALIAS_SET_P (ref) = 1; + + /* If this is a decl, set the attributes of the MEM from it. */ + if (DECL_P (t)) + { + expr = t; + offset = const0_rtx; + size = (DECL_SIZE_UNIT (t) + && host_integerp (DECL_SIZE_UNIT (t), 1) + ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0); + align = DECL_ALIGN (t); + } + + /* If this is a constant, we know the alignment. */ + else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c') + { + align = TYPE_ALIGN (type); +#ifdef CONSTANT_ALIGNMENT + align = CONSTANT_ALIGNMENT (t, align); +#endif + } + + /* If this is a field reference and not a bit-field, record it. */ + /* ??? There is some information that can be gleened from bit-fields, + such as the word offset in the structure that might be modified. + But skip it for now. */ + else if (TREE_CODE (t) == COMPONENT_REF + && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1))) + { + expr = component_ref_for_mem_expr (t); + offset = const0_rtx; + /* ??? Any reason the field size would be different than + the size we got from the type? */ + } + + /* If this is an array reference, look for an outer field reference. */ + else if (TREE_CODE (t) == ARRAY_REF) + { + tree off_tree = size_zero_node; + + do + { + off_tree + = fold (build (PLUS_EXPR, sizetype, + fold (build (MULT_EXPR, sizetype, + TREE_OPERAND (t, 1), + TYPE_SIZE_UNIT (TREE_TYPE (t)))), + off_tree)); + t = TREE_OPERAND (t, 0); + } + while (TREE_CODE (t) == ARRAY_REF); + + if (TREE_CODE (t) == COMPONENT_REF) + { + expr = component_ref_for_mem_expr (t); + if (host_integerp (off_tree, 1)) + offset = GEN_INT (tree_low_cst (off_tree, 1)); + /* ??? Any reason the field size would be different than + the size we got from the type? */ + } + } + } + + /* Now set the attributes we computed above. */ + MEM_ATTRS (ref) + = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref)); + + /* If this is already known to be a scalar or aggregate, we are done. */ + if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref)) + return; + + /* If it is a reference into an aggregate, this is part of an aggregate. + Otherwise we don't know. */ + else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF + || TREE_CODE (t) == ARRAY_RANGE_REF + || TREE_CODE (t) == BIT_FIELD_REF) + MEM_IN_STRUCT_P (ref) = 1; +} + +/* Set the alias set of MEM to SET. */ + +void +set_mem_alias_set (mem, set) + rtx mem; + HOST_WIDE_INT set; +{ +#ifdef ENABLE_CHECKING + /* If the new and old alias sets don't conflict, something is wrong. */ + if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem))) + abort (); +#endif + + MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem), + MEM_SIZE (mem), MEM_ALIGN (mem), + GET_MODE (mem)); +} + +/* Set the alignment of MEM to ALIGN bits. */ + +void +set_mem_align (mem, align) + rtx mem; + unsigned int align; +{ + MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem), + MEM_OFFSET (mem), MEM_SIZE (mem), align, + GET_MODE (mem)); +} + +/* Set the expr for MEM to EXPR. */ + +void +set_mem_expr (mem, expr) + rtx mem; + tree expr; +{ + MEM_ATTRS (mem) + = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem), + MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem)); +} + +/* Set the offset of MEM to OFFSET. */ + +void +set_mem_offset (mem, offset) + rtx mem, offset; +{ + MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem), + offset, MEM_SIZE (mem), MEM_ALIGN (mem), + GET_MODE (mem)); +} + +/* Return a memory reference like MEMREF, but with its mode changed to MODE + and its address changed to ADDR. (VOIDmode means don't change the mode. + NULL for ADDR means don't change the address.) VALIDATE is nonzero if the + returned memory location is required to be valid. The memory + attributes are not changed. */ + +static rtx +change_address_1 (memref, mode, addr, validate) rtx memref; enum machine_mode mode; rtx addr; + int validate; { rtx new; @@ -1611,79 +1912,276 @@ change_address (memref, mode, addr) if (addr == 0) addr = XEXP (memref, 0); - /* If reload is in progress or has completed, ADDR must be valid. - Otherwise, we can call memory_address to make it valid. */ - if (reload_completed || reload_in_progress) + if (validate) { - if (! memory_address_p (mode, addr)) - abort (); + if (reload_in_progress || reload_completed) + { + if (! memory_address_p (mode, addr)) + abort (); + } + else + addr = memory_address (mode, addr); } - else - addr = memory_address (mode, addr); - + if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref)) return memref; new = gen_rtx_MEM (mode, addr); - RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref); MEM_COPY_ATTRIBUTES (new, memref); return new; } + +/* Like change_address_1 with VALIDATE nonzero, but we are not saying in what + way we are changing MEMREF, so we only preserve the alias set. */ + +rtx +change_address (memref, mode, addr) + rtx memref; + enum machine_mode mode; + rtx addr; +{ + rtx new = change_address_1 (memref, mode, addr, 1); + enum machine_mode mmode = GET_MODE (new); + + MEM_ATTRS (new) + = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, + mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)), + (mmode == BLKmode ? BITS_PER_UNIT + : GET_MODE_ALIGNMENT (mmode)), + mmode); + + return new; +} + +/* Return a memory reference like MEMREF, but with its mode changed + to MODE and its address offset by OFFSET bytes. If VALIDATE is + nonzero, the memory address is forced to be valid. + If ADJUST is zero, OFFSET is only used to update MEM_ATTRS + and caller is responsible for adjusting MEMREF base register. */ + +rtx +adjust_address_1 (memref, mode, offset, validate, adjust) + rtx memref; + enum machine_mode mode; + HOST_WIDE_INT offset; + int validate, adjust; +{ + rtx addr = XEXP (memref, 0); + rtx new; + rtx memoffset = MEM_OFFSET (memref); + rtx size = 0; + unsigned int memalign = MEM_ALIGN (memref); + + /* ??? Prefer to create garbage instead of creating shared rtl. + This may happen even if offset is non-zero -- consider + (plus (plus reg reg) const_int) -- so do this always. */ + addr = copy_rtx (addr); + + if (adjust) + { + /* If MEMREF is a LO_SUM and the offset is within the alignment of the + object, we can merge it into the LO_SUM. */ + if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM + && offset >= 0 + && (unsigned HOST_WIDE_INT) offset + < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT) + addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0), + plus_constant (XEXP (addr, 1), offset)); + else + addr = plus_constant (addr, offset); + } + + new = change_address_1 (memref, mode, addr, validate); + + /* Compute the new values of the memory attributes due to this adjustment. + We add the offsets and update the alignment. */ + if (memoffset) + memoffset = GEN_INT (offset + INTVAL (memoffset)); + + /* Compute the new alignment by taking the MIN of the alignment and the + lowest-order set bit in OFFSET, but don't change the alignment if OFFSET + if zero. */ + if (offset != 0) + memalign = MIN (memalign, + (unsigned int) (offset & -offset) * BITS_PER_UNIT); + + /* We can compute the size in a number of ways. */ + if (GET_MODE (new) != BLKmode) + size = GEN_INT (GET_MODE_SIZE (GET_MODE (new))); + else if (MEM_SIZE (memref)) + size = plus_constant (MEM_SIZE (memref), -offset); + + MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), + memoffset, size, memalign, GET_MODE (new)); + + /* At some point, we should validate that this offset is within the object, + if all the appropriate values are known. */ + return new; +} + +/* Return a memory reference like MEMREF, but with its mode changed + to MODE and its address changed to ADDR, which is assumed to be + MEMREF offseted by OFFSET bytes. If VALIDATE is + nonzero, the memory address is forced to be valid. */ + +rtx +adjust_automodify_address_1 (memref, mode, addr, offset, validate) + rtx memref; + enum machine_mode mode; + rtx addr; + HOST_WIDE_INT offset; + int validate; +{ + memref = change_address_1 (memref, VOIDmode, addr, validate); + return adjust_address_1 (memref, mode, offset, validate, 0); +} + +/* Return a memory reference like MEMREF, but whose address is changed by + adding OFFSET, an RTX, to it. POW2 is the highest power of two factor + known to be in OFFSET (possibly 1). */ + +rtx +offset_address (memref, offset, pow2) + rtx memref; + rtx offset; + HOST_WIDE_INT pow2; +{ + rtx new = change_address_1 (memref, VOIDmode, + gen_rtx_PLUS (Pmode, XEXP (memref, 0), + force_reg (Pmode, offset)), 1); + + /* Update the alignment to reflect the offset. Reset the offset, which + we don't know. */ + MEM_ATTRS (new) + = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0, + MIN (MEM_ALIGN (memref), + (unsigned int) pow2 * BITS_PER_UNIT), + GET_MODE (new)); + return new; +} + +/* Return a memory reference like MEMREF, but with its address changed to + ADDR. The caller is asserting that the actual piece of memory pointed + to is the same, just the form of the address is being changed, such as + by putting something into a register. */ + +rtx +replace_equiv_address (memref, addr) + rtx memref; + rtx addr; +{ + /* change_address_1 copies the memory attribute structure without change + and that's exactly what we want here. */ + update_temp_slot_address (XEXP (memref, 0), addr); + return change_address_1 (memref, VOIDmode, addr, 1); +} + +/* Likewise, but the reference is not required to be valid. */ + +rtx +replace_equiv_address_nv (memref, addr) + rtx memref; + rtx addr; +{ + return change_address_1 (memref, VOIDmode, addr, 0); +} + +/* Return a memory reference like MEMREF, but with its mode widened to + MODE and offset by OFFSET. This would be used by targets that e.g. + cannot issue QImode memory operations and have to use SImode memory + operations plus masking logic. */ + +rtx +widen_memory_access (memref, mode, offset) + rtx memref; + enum machine_mode mode; + HOST_WIDE_INT offset; +{ + rtx new = adjust_address_1 (memref, mode, offset, 1, 1); + tree expr = MEM_EXPR (new); + rtx memoffset = MEM_OFFSET (new); + unsigned int size = GET_MODE_SIZE (mode); + + /* If we don't know what offset we were at within the expression, then + we can't know if we've overstepped the bounds. */ + if (! memoffset && offset != 0) + expr = NULL_TREE; + + while (expr) + { + if (TREE_CODE (expr) == COMPONENT_REF) + { + tree field = TREE_OPERAND (expr, 1); + + if (! DECL_SIZE_UNIT (field)) + { + expr = NULL_TREE; + break; + } + + /* Is the field at least as large as the access? If so, ok, + otherwise strip back to the containing structure. */ + if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST + && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0 + && INTVAL (memoffset) >= 0) + break; + + if (! host_integerp (DECL_FIELD_OFFSET (field), 1)) + { + expr = NULL_TREE; + break; + } + + expr = TREE_OPERAND (expr, 0); + memoffset = (GEN_INT (INTVAL (memoffset) + + tree_low_cst (DECL_FIELD_OFFSET (field), 1) + + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1) + / BITS_PER_UNIT))); + } + /* Similarly for the decl. */ + else if (DECL_P (expr) + && DECL_SIZE_UNIT (expr) + && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0 + && (! memoffset || INTVAL (memoffset) >= 0)) + break; + else + { + /* The widened memory access overflows the expression, which means + that it could alias another expression. Zap it. */ + expr = NULL_TREE; + break; + } + } + + if (! expr) + memoffset = NULL_RTX; + + /* The widened memory may alias other stuff, so zap the alias set. */ + /* ??? Maybe use get_alias_set on any remaining expression. */ + + MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size), + MEM_ALIGN (new), mode); + + return new; +} /* Return a newly created CODE_LABEL rtx with a unique label number. */ rtx gen_label_rtx () { - register rtx label; + rtx label; label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, - NULL_RTX, label_num++, NULL_PTR); + NULL_RTX, label_num++, NULL, NULL); LABEL_NUSES (label) = 0; + LABEL_ALTERNATE_NAME (label) = NULL; return label; } /* For procedure integration. */ -/* Return a newly created INLINE_HEADER rtx. Should allocate this - from a permanent obstack when the opportunity arises. */ - -rtx -gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno, - last_labelno, max_parm_regnum, max_regnum, args_size, - pops_args, stack_slots, forced_labels, function_flags, - outgoing_args_size, original_arg_vector, - original_decl_initial, regno_rtx, regno_flag, - regno_align, parm_reg_stack_loc) - rtx first_insn, first_parm_insn; - int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size; - int pops_args; - rtx stack_slots; - rtx forced_labels; - int function_flags; - int outgoing_args_size; - rtvec original_arg_vector; - rtx original_decl_initial; - rtvec regno_rtx; - char *regno_flag; - char *regno_align; - rtvec parm_reg_stack_loc; -{ - rtx header = gen_rtx_INLINE_HEADER (VOIDmode, - cur_insn_uid++, NULL_RTX, - first_insn, first_parm_insn, - first_labelno, last_labelno, - max_parm_regnum, max_regnum, args_size, - pops_args, stack_slots, forced_labels, - function_flags, outgoing_args_size, - original_arg_vector, - original_decl_initial, - regno_rtx, regno_flag, regno_align, - parm_reg_stack_loc); - return header; -} - /* Install new pointers to the first and last insns in the chain. Also, set cur_insn_uid to one higher than the last in use. Used for an inline-procedure after copying the insn chain. */ @@ -1715,63 +2213,45 @@ set_new_first_and_last_label_num (first, last) first_label_num = first; last_label_num = last; } - -/* Save all variables describing the current status into the structure *P. - This is used before starting a nested function. */ + +/* Set the last label number found in the current function. + This is used when belatedly compiling an inline function. */ void -save_emit_status (p) - struct function *p; -{ - p->reg_rtx_no = reg_rtx_no; - p->first_label_num = first_label_num; - p->first_insn = first_insn; - p->last_insn = last_insn; - p->sequence_rtl_expr = sequence_rtl_expr; - p->sequence_stack = sequence_stack; - p->cur_insn_uid = cur_insn_uid; - p->last_linenum = last_linenum; - p->last_filename = last_filename; - p->regno_pointer_flag = regno_pointer_flag; - p->regno_pointer_align = regno_pointer_align; - p->regno_pointer_flag_length = regno_pointer_flag_length; - p->regno_reg_rtx = regno_reg_rtx; +set_new_last_label_num (last) + int last; +{ + base_label_num = label_num; + last_label_num = last; } - + /* Restore all variables describing the current status from the structure *P. This is used after a nested function. */ void restore_emit_status (p) - struct function *p; + struct function *p ATTRIBUTE_UNUSED; { - int i; - - reg_rtx_no = p->reg_rtx_no; - first_label_num = p->first_label_num; last_label_num = 0; - first_insn = p->first_insn; - last_insn = p->last_insn; - sequence_rtl_expr = p->sequence_rtl_expr; - sequence_stack = p->sequence_stack; - cur_insn_uid = p->cur_insn_uid; - last_linenum = p->last_linenum; - last_filename = p->last_filename; - regno_pointer_flag = p->regno_pointer_flag; - regno_pointer_align = p->regno_pointer_align; - regno_pointer_flag_length = p->regno_pointer_flag_length; - regno_reg_rtx = p->regno_reg_rtx; - - /* Clear our cache of rtx expressions for start_sequence and - gen_sequence. */ - sequence_element_free_list = 0; - for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) - sequence_result[i] = 0; + clear_emit_caches (); +} - free_insn = 0; +/* Clear out all parts of the state in F that can safely be discarded + after the function has been compiled, to let garbage collection + reclaim the memory. */ + +void +free_emit_status (f) + struct function *f; +{ + free (f->emit->x_regno_reg_rtx); + free (f->emit->regno_pointer_align); + free (f->emit->regno_decl); + free (f->emit); + f->emit = NULL; } -/* Go through all the RTL insn bodies and copy any invalid shared +/* Go through all the RTL insn bodies and copy any invalid shared structure. This routine should only be called once. */ void @@ -1781,19 +2261,16 @@ unshare_all_rtl (fndecl, insn) { tree decl; - /* Make sure that virtual stack slots are not shared. */ - reset_used_decls (DECL_INITIAL (current_function_decl)); - /* Make sure that virtual parameters are not shared. */ for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl)) - DECL_RTL (decl) = copy_rtx_if_shared (DECL_RTL (decl)); + SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl))); /* Make sure that virtual stack slots are not shared. */ unshare_all_decls (DECL_INITIAL (fndecl)); /* Unshare just about everything else. */ unshare_all_rtl_1 (insn); - + /* Make sure the addresses of stack slots found outside the insn chain (such as, in DECL_RTL of a variable) are not shared with the insn chain. @@ -1804,7 +2281,7 @@ unshare_all_rtl (fndecl, insn) stack_slot_list = copy_rtx_if_shared (stack_slot_list); } -/* Go through all the RTL insn bodies and copy any invalid shared +/* Go through all the RTL insn bodies and copy any invalid shared structure, again. This is a fairly expensive thing to do so it should be done sparingly. */ @@ -1813,14 +2290,26 @@ unshare_all_rtl_again (insn) rtx insn; { rtx p; + tree decl; + for (p = insn; p; p = NEXT_INSN (p)) - if (GET_RTX_CLASS (GET_CODE (p)) == 'i') + if (INSN_P (p)) { reset_used_flags (PATTERN (p)); reset_used_flags (REG_NOTES (p)); reset_used_flags (LOG_LINKS (p)); } - unshare_all_rtl_1 (insn); + + /* Make sure that virtual stack slots are not shared. */ + reset_used_decls (DECL_INITIAL (cfun->decl)); + + /* Make sure that virtual parameters are not shared. */ + for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl)) + reset_used_flags (DECL_RTL (decl)); + + reset_used_flags (stack_slot_list); + + unshare_all_rtl (cfun->decl, insn); } /* Go through all the RTL insn bodies and copy any invalid shared structure. @@ -1831,7 +2320,7 @@ unshare_all_rtl_1 (insn) rtx insn; { for (; insn; insn = NEXT_INSN (insn)) - if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') + if (INSN_P (insn)) { PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); @@ -1849,7 +2338,8 @@ unshare_all_decls (blk) /* Copy shared decls. */ for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t)) - DECL_RTL (t) = copy_rtx_if_shared (DECL_RTL (t)); + if (DECL_RTL_SET_P (t)) + SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t))); /* Now process sub-blocks. */ for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t)) @@ -1857,7 +2347,7 @@ unshare_all_decls (blk) } /* Go through all virtual stack slots of a function and mark them as - not shared. */ + not shared. */ static void reset_used_decls (blk) tree blk; @@ -1866,7 +2356,8 @@ reset_used_decls (blk) /* Mark decls. */ for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t)) - reset_used_flags (DECL_RTL (t)); + if (DECL_RTL_SET_P (t)) + reset_used_flags (DECL_RTL (t)); /* Now process sub-blocks. */ for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t)) @@ -1880,10 +2371,10 @@ rtx copy_rtx_if_shared (orig) rtx orig; { - register rtx x = orig; - register int i; - register enum rtx_code code; - register char *format_ptr; + rtx x = orig; + int i; + enum rtx_code code; + const char *format_ptr; int copied = 0; if (x == 0) @@ -1927,7 +2418,7 @@ copy_rtx_if_shared (orig) case MEM: /* A MEM is allowed to be shared if its address is constant. - We used to allow sharing of MEMs which referenced + We used to allow sharing of MEMs which referenced virtual_stack_vars_rtx or virtual_incoming_args_rtx, but that can lose. instantiate_virtual_regs will not unshare the MEMs, and combine may change the structure of the address @@ -1947,10 +2438,10 @@ copy_rtx_if_shared (orig) if (x->used) { - register rtx copy; + rtx copy; copy = rtx_alloc (code); - bcopy ((char *) x, (char *) copy, + memcpy (copy, x, (sizeof (*copy) - sizeof (copy->fld) + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); x = copy; @@ -1976,11 +2467,11 @@ copy_rtx_if_shared (orig) case 'E': if (XVEC (x, i) != NULL) { - register int j; + int j; int len = XVECLEN (x, i); if (copied && len > 0) - XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem); + XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem); for (j = 0; j < len; j++) XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j)); } @@ -1997,9 +2488,9 @@ void reset_used_flags (x) rtx x; { - register int i, j; - register enum rtx_code code; - register char *format_ptr; + int i, j; + enum rtx_code code; + const char *format_ptr; if (x == 0) return; @@ -2029,7 +2520,7 @@ reset_used_flags (x) case BARRIER: /* The chain of insns is not being copied. */ return; - + default: break; } @@ -2128,7 +2619,7 @@ get_last_insn_anywhere () struct sequence_stack *stack; if (last_insn) return last_insn; - for (stack = sequence_stack; stack; stack = stack->next) + for (stack = seq_stack; stack; stack = stack->next) if (stack->last != 0) return stack->last; return 0; @@ -2141,6 +2632,34 @@ get_max_uid () { return cur_insn_uid; } + +/* Renumber instructions so that no instruction UIDs are wasted. */ + +void +renumber_insns (stream) + FILE *stream; +{ + rtx insn; + + /* If we're not supposed to renumber instructions, don't. */ + if (!flag_renumber_insns) + return; + + /* If there aren't that many instructions, then it's not really + worth renumbering them. */ + if (flag_renumber_insns == 1 && get_max_uid () < 25000) + return; + + cur_insn_uid = 1; + + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + { + if (stream) + fprintf (stream, "Renumbering insn %d to %d\n", + INSN_UID (insn), cur_insn_uid); + INSN_UID (insn) = cur_insn_uid++; + } +} /* Return the next insn. If it is a SEQUENCE, return the first insn of the sequence. */ @@ -2254,6 +2773,17 @@ prev_real_insn (insn) does not look inside SEQUENCEs. Until reload has completed, this is the same as next_real_insn. */ +int +active_insn_p (insn) + rtx insn; +{ + return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN + || (GET_CODE (insn) == INSN + && (! reload_completed + || (GET_CODE (PATTERN (insn)) != USE + && GET_CODE (PATTERN (insn)) != CLOBBER)))); +} + rtx next_active_insn (insn) rtx insn; @@ -2261,12 +2791,7 @@ next_active_insn (insn) while (insn) { insn = NEXT_INSN (insn); - if (insn == 0 - || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN - || (GET_CODE (insn) == INSN - && (! reload_completed - || (GET_CODE (PATTERN (insn)) != USE - && GET_CODE (PATTERN (insn)) != CLOBBER)))) + if (insn == 0 || active_insn_p (insn)) break; } @@ -2284,12 +2809,7 @@ prev_active_insn (insn) while (insn) { insn = PREV_INSN (insn); - if (insn == 0 - || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN - || (GET_CODE (insn) == INSN - && (! reload_completed - || (GET_CODE (PATTERN (insn)) != USE - && GET_CODE (PATTERN (insn)) != CLOBBER)))) + if (insn == 0 || active_insn_p (insn)) break; } @@ -2341,7 +2861,8 @@ link_cc0_insns (insn) if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) user = XVECEXP (PATTERN (user), 0, 0); - REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user)); + REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, + REG_NOTES (user)); REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn)); } @@ -2367,8 +2888,7 @@ next_cc0_user (insn) if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) insn = XVECEXP (PATTERN (insn), 0, 0); - if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i' - && reg_mentioned_p (cc0_rtx, PATTERN (insn))) + if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn))) return insn; return 0; @@ -2393,6 +2913,32 @@ prev_cc0_setter (insn) return insn; } #endif + +/* Increment the label uses for all labels present in rtx. */ + +static void +mark_label_nuses(x) + rtx x; +{ + enum rtx_code code; + int i, j; + const char *fmt; + + code = GET_CODE (x); + if (code == LABEL_REF) + LABEL_NUSES (XEXP (x, 0))++; + + fmt = GET_RTX_FORMAT (code); + for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) + { + if (fmt[i] == 'e') + mark_label_nuses (XEXP (x, i)); + else if (fmt[i] == 'E') + for (j = XVECLEN (x, i) - 1; j >= 0; j--) + mark_label_nuses (XVECEXP (x, i, j)); + } +} + /* Try splitting insns that can be split for better scheduling. PAT is the pattern which might split. @@ -2410,9 +2956,19 @@ try_split (pat, trial, last) { rtx before = PREV_INSN (trial); rtx after = NEXT_INSN (trial); - rtx seq = split_insns (pat, trial); int has_barrier = 0; rtx tem; + rtx note, seq; + int probability; + + if (any_condjump_p (trial) + && (note = find_reg_note (trial, REG_BR_PROB, 0))) + split_branch_probability = INTVAL (XEXP (note, 0)); + probability = split_branch_probability; + + seq = split_insns (pat, trial); + + split_branch_probability = -1; /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. We may need to handle this specially. */ @@ -2429,32 +2985,108 @@ try_split (pat, trial, last) it, in turn, will be split (SFmode on the 29k is an example). */ if (GET_CODE (seq) == SEQUENCE) { - int i; + int i, njumps = 0; - /* Avoid infinite loop if any insn of the result matches + /* Avoid infinite loop if any insn of the result matches the original pattern. */ for (i = 0; i < XVECLEN (seq, 0); i++) - if (GET_CODE (XVECEXP (seq, 0, i)) == INSN + if (GET_CODE (XVECEXP (seq, 0, i)) == INSN && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat)) - return trial; - - /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in - SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero, - increment the usage count so we don't delete the label. */ - - if (GET_CODE (trial) == JUMP_INSN) + return trial; + + /* Mark labels. */ + for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) + if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) + { + rtx insn = XVECEXP (seq, 0, i); + mark_jump_label (PATTERN (insn), + XVECEXP (seq, 0, i), 0); + njumps++; + if (probability != -1 + && any_condjump_p (insn) + && !find_reg_note (insn, REG_BR_PROB, 0)) + { + /* We can preserve the REG_BR_PROB notes only if exactly + one jump is created, otherwise the machine description + is responsible for this step using + split_branch_probability variable. */ + if (njumps != 1) + abort (); + REG_NOTES (insn) + = gen_rtx_EXPR_LIST (REG_BR_PROB, + GEN_INT (probability), + REG_NOTES (insn)); + } + } + + /* If we are splitting a CALL_INSN, look for the CALL_INSN + in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */ + if (GET_CODE (trial) == CALL_INSN) for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) - if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) - { - JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial); + if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN) + CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i)) + = CALL_INSN_FUNCTION_USAGE (trial); - if (JUMP_LABEL (trial)) - LABEL_NUSES (JUMP_LABEL (trial))++; + /* Copy notes, particularly those related to the CFG. */ + for (note = REG_NOTES (trial); note ; note = XEXP (note, 1)) + { + switch (REG_NOTE_KIND (note)) + { + case REG_EH_REGION: + for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) + { + rtx insn = XVECEXP (seq, 0, i); + if (GET_CODE (insn) == CALL_INSN + || (flag_non_call_exceptions + && may_trap_p (PATTERN (insn)))) + REG_NOTES (insn) + = gen_rtx_EXPR_LIST (REG_EH_REGION, + XEXP (note, 0), + REG_NOTES (insn)); + } + break; + + case REG_NORETURN: + case REG_SETJMP: + case REG_ALWAYS_RETURN: + for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) + { + rtx insn = XVECEXP (seq, 0, i); + if (GET_CODE (insn) == CALL_INSN) + REG_NOTES (insn) + = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note), + XEXP (note, 0), + REG_NOTES (insn)); + } + break; + + case REG_NON_LOCAL_GOTO: + for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) + { + rtx insn = XVECEXP (seq, 0, i); + if (GET_CODE (insn) == JUMP_INSN) + REG_NOTES (insn) + = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note), + XEXP (note, 0), + REG_NOTES (insn)); + } + break; + + default: + break; } + } + + /* If there are LABELS inside the split insns increment the + usage count so we don't delete the label. */ + if (GET_CODE (trial) == INSN) + for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) + if (GET_CODE (XVECEXP (seq, 0, i)) == INSN) + mark_label_nuses (PATTERN (XVECEXP (seq, 0, i))); - tem = emit_insn_after (seq, before); + tem = emit_insn_after (seq, trial); - delete_insn (trial); + delete_related_insns (trial); if (has_barrier) emit_barrier_after (tem); @@ -2463,10 +3095,8 @@ try_split (pat, trial, last) set LAST and continue from the insn after the one returned. We can't use next_active_insn here since AFTER may be a note. Ignore deleted insns, which can be occur if not optimizing. */ - for (tem = NEXT_INSN (before); tem != after; - tem = NEXT_INSN (tem)) - if (! INSN_DELETED_P (tem) - && GET_RTX_CLASS (GET_CODE (tem)) == 'i') + for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem)) + if (! INSN_DELETED_P (tem) && INSN_P (tem)) tem = try_split (PATTERN (tem), tem, 1); } /* Avoid infinite loop if the result matches the original pattern. */ @@ -2481,7 +3111,9 @@ try_split (pat, trial, last) /* Return either the first or the last insn, depending on which was requested. */ - return last ? prev_active_insn (after) : next_active_insn (before); + return last + ? (after ? PREV_INSN (after) : last_insn) + : NEXT_INSN (before); } return trial; @@ -2494,17 +3126,9 @@ rtx make_insn_raw (pattern) rtx pattern; { - register rtx insn; + rtx insn; - /* If in RTL generation phase, see if FREE_INSN can be used. */ - if (free_insn != 0 && rtx_equal_function_value_matters) - { - insn = free_insn; - free_insn = NEXT_INSN (free_insn); - PUT_CODE (insn, INSN); - } - else - insn = rtx_alloc (INSN); + insn = rtx_alloc (INSN); INSN_UID (insn) = cur_insn_uid++; PATTERN (insn) = pattern; @@ -2512,6 +3136,18 @@ make_insn_raw (pattern) LOG_LINKS (insn) = NULL; REG_NOTES (insn) = NULL; +#ifdef ENABLE_RTL_CHECKING + if (insn + && INSN_P (insn) + && (returnjump_p (insn) + || (GET_CODE (insn) == SET + && SET_DEST (insn) == pc_rtx))) + { + warning ("ICE: emit_insn used where emit_jump_insn needed:\n"); + debug_rtx (insn); + } +#endif + return insn; } @@ -2521,7 +3157,7 @@ static rtx make_jump_insn_raw (pattern) rtx pattern; { - register rtx insn; + rtx insn; insn = rtx_alloc (JUMP_INSN); INSN_UID (insn) = cur_insn_uid++; @@ -2541,7 +3177,7 @@ static rtx make_call_insn_raw (pattern) rtx pattern; { - register rtx insn; + rtx insn; insn = rtx_alloc (CALL_INSN); INSN_UID (insn) = cur_insn_uid++; @@ -2560,7 +3196,7 @@ make_call_insn_raw (pattern) void add_insn (insn) - register rtx insn; + rtx insn; { PREV_INSN (insn) = last_insn; NEXT_INSN (insn) = 0; @@ -2584,6 +3220,7 @@ add_insn_after (insn, after) rtx insn, after; { rtx next = NEXT_INSN (after); + basic_block bb; if (optimize && INSN_DELETED_P (after)) abort (); @@ -2601,7 +3238,7 @@ add_insn_after (insn, after) last_insn = insn; else { - struct sequence_stack *stack = sequence_stack; + struct sequence_stack *stack = seq_stack; /* Scan all pending sequences too. */ for (; stack; stack = stack->next) if (after == stack->last) @@ -2614,6 +3251,21 @@ add_insn_after (insn, after) abort (); } + if (basic_block_for_insn + && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements + && (bb = BLOCK_FOR_INSN (after))) + { + set_block_for_insn (insn, bb); + /* Should not happen as first in the BB is always + either NOTE or LABEL. */ + if (bb->end == after + /* Avoid clobbering of structure when creating new BB. */ + && GET_CODE (insn) != BARRIER + && (GET_CODE (insn) != NOTE + || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK)) + bb->end = insn; + } + NEXT_INSN (after) = insn; if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) { @@ -2632,6 +3284,7 @@ add_insn_before (insn, before) rtx insn, before; { rtx prev = PREV_INSN (before); + basic_block bb; if (optimize && INSN_DELETED_P (before)) abort (); @@ -2652,7 +3305,7 @@ add_insn_before (insn, before) first_insn = insn; else { - struct sequence_stack *stack = sequence_stack; + struct sequence_stack *stack = seq_stack; /* Scan all pending sequences too. */ for (; stack; stack = stack->next) if (before == stack->first) @@ -2665,6 +3318,21 @@ add_insn_before (insn, before) abort (); } + if (basic_block_for_insn + && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements + && (bb = BLOCK_FOR_INSN (before))) + { + set_block_for_insn (insn, bb); + /* Should not happen as first in the BB is always + either NOTE or LABEl. */ + if (bb->head == insn + /* Avoid clobbering of structure when creating new BB. */ + && GET_CODE (insn) != BARRIER + && (GET_CODE (insn) != NOTE + || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK)) + abort (); + } + PREV_INSN (before) = insn; if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE) PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn; @@ -2678,6 +3346,8 @@ remove_insn (insn) { rtx next = NEXT_INSN (insn); rtx prev = PREV_INSN (insn); + basic_block bb; + if (prev) { NEXT_INSN (prev) = next; @@ -2691,7 +3361,7 @@ remove_insn (insn) first_insn = next; else { - struct sequence_stack *stack = sequence_stack; + struct sequence_stack *stack = seq_stack; /* Scan all pending sequences too. */ for (; stack; stack = stack->next) if (insn == stack->first) @@ -2714,7 +3384,7 @@ remove_insn (insn) last_insn = prev; else { - struct sequence_stack *stack = sequence_stack; + struct sequence_stack *stack = seq_stack; /* Scan all pending sequences too. */ for (; stack; stack = stack->next) if (insn == stack->last) @@ -2726,6 +3396,21 @@ remove_insn (insn) if (stack == 0) abort (); } + if (basic_block_for_insn + && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements + && (bb = BLOCK_FOR_INSN (insn))) + { + if (bb->head == insn) + { + /* Never ever delete the basic block note without deleting whole basic + block. */ + if (GET_CODE (insn) == NOTE) + abort (); + bb->head = next; + } + if (bb->end == insn) + bb->end = prev; + } } /* Delete all insns made since FROM. @@ -2753,7 +3438,7 @@ delete_insns_since (from) called after delay-slot filling has been done. */ void -reorder_insns (from, to, after) +reorder_insns_nobb (from, to, after) rtx from, to, after; { /* Splice this bunch out of where it is now. */ @@ -2777,6 +3462,38 @@ reorder_insns (from, to, after) last_insn = to; } +/* Same as function above, but take care to update BB boundaries. */ +void +reorder_insns (from, to, after) + rtx from, to, after; +{ + rtx prev = PREV_INSN (from); + basic_block bb, bb2; + + reorder_insns_nobb (from, to, after); + + if (basic_block_for_insn + && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements + && (bb = BLOCK_FOR_INSN (after))) + { + rtx x; + + if (basic_block_for_insn + && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements + && (bb2 = BLOCK_FOR_INSN (from))) + { + if (bb2->end == to) + bb2->end = prev; + } + + if (bb->end == after) + bb->end = to; + + for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x)) + set_block_for_insn (x, bb); + } +} + /* Return the line note insn preceding INSN. */ static rtx @@ -2819,6 +3536,119 @@ reorder_insns_with_line_notes (from, to, after) NOTE_LINE_NUMBER (after_line), to); } + +/* Remove unnecessary notes from the instruction stream. */ + +void +remove_unnecessary_notes () +{ + rtx block_stack = NULL_RTX; + rtx eh_stack = NULL_RTX; + rtx insn; + rtx next; + rtx tmp; + + /* We must not remove the first instruction in the function because + the compiler depends on the first instruction being a note. */ + for (insn = NEXT_INSN (get_insns ()); insn; insn = next) + { + /* Remember what's next. */ + next = NEXT_INSN (insn); + + /* We're only interested in notes. */ + if (GET_CODE (insn) != NOTE) + continue; + + switch (NOTE_LINE_NUMBER (insn)) + { + case NOTE_INSN_DELETED: + case NOTE_INSN_LOOP_END_TOP_COND: + remove_insn (insn); + break; + + case NOTE_INSN_EH_REGION_BEG: + eh_stack = alloc_INSN_LIST (insn, eh_stack); + break; + + case NOTE_INSN_EH_REGION_END: + /* Too many end notes. */ + if (eh_stack == NULL_RTX) + abort (); + /* Mismatched nesting. */ + if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn)) + abort (); + tmp = eh_stack; + eh_stack = XEXP (eh_stack, 1); + free_INSN_LIST_node (tmp); + break; + + case NOTE_INSN_BLOCK_BEG: + /* By now, all notes indicating lexical blocks should have + NOTE_BLOCK filled in. */ + if (NOTE_BLOCK (insn) == NULL_TREE) + abort (); + block_stack = alloc_INSN_LIST (insn, block_stack); + break; + + case NOTE_INSN_BLOCK_END: + /* Too many end notes. */ + if (block_stack == NULL_RTX) + abort (); + /* Mismatched nesting. */ + if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn)) + abort (); + tmp = block_stack; + block_stack = XEXP (block_stack, 1); + free_INSN_LIST_node (tmp); + + /* Scan back to see if there are any non-note instructions + between INSN and the beginning of this block. If not, + then there is no PC range in the generated code that will + actually be in this block, so there's no point in + remembering the existence of the block. */ + for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp)) + { + /* This block contains a real instruction. Note that we + don't include labels; if the only thing in the block + is a label, then there are still no PC values that + lie within the block. */ + if (INSN_P (tmp)) + break; + + /* We're only interested in NOTEs. */ + if (GET_CODE (tmp) != NOTE) + continue; + + if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG) + { + /* We just verified that this BLOCK matches us with + the block_stack check above. Never delete the + BLOCK for the outermost scope of the function; we + can refer to names from that scope even if the + block notes are messed up. */ + if (! is_body_block (NOTE_BLOCK (insn)) + && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn))) + { + remove_insn (tmp); + remove_insn (insn); + } + break; + } + else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END) + /* There's a nested block. We need to leave the + current block in place since otherwise the debugger + wouldn't be able to show symbols from our block in + the nested block. */ + break; + } + } + } + + /* Too many begin notes. */ + if (block_stack || eh_stack) + abort (); +} + /* Emit an insn of given code and pattern at a specified place within the doubly-linked list. */ @@ -2828,21 +3658,19 @@ reorder_insns_with_line_notes (from, to, after) rtx emit_insn_before (pattern, before) - register rtx pattern, before; + rtx pattern, before; { - register rtx insn = before; + rtx insn = before; if (GET_CODE (pattern) == SEQUENCE) { - register int i; + int i; for (i = 0; i < XVECLEN (pattern, 0); i++) { insn = XVECEXP (pattern, 0, i); add_insn_before (insn, before); } - if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) - sequence_result[XVECLEN (pattern, 0)] = pattern; } else { @@ -2858,9 +3686,9 @@ emit_insn_before (pattern, before) rtx emit_jump_insn_before (pattern, before) - register rtx pattern, before; + rtx pattern, before; { - register rtx insn; + rtx insn; if (GET_CODE (pattern) == SEQUENCE) insn = emit_insn_before (pattern, before); @@ -2878,9 +3706,9 @@ emit_jump_insn_before (pattern, before) rtx emit_call_insn_before (pattern, before) - register rtx pattern, before; + rtx pattern, before; { - register rtx insn; + rtx insn; if (GET_CODE (pattern) == SEQUENCE) insn = emit_insn_before (pattern, before); @@ -2899,9 +3727,9 @@ emit_call_insn_before (pattern, before) rtx emit_barrier_before (before) - register rtx before; + rtx before; { - register rtx insn = rtx_alloc (BARRIER); + rtx insn = rtx_alloc (BARRIER); INSN_UID (insn) = cur_insn_uid++; @@ -2933,7 +3761,7 @@ emit_note_before (subtype, before) int subtype; rtx before; { - register rtx note = rtx_alloc (NOTE); + rtx note = rtx_alloc (NOTE); INSN_UID (note) = cur_insn_uid++; NOTE_SOURCE_FILE (note) = 0; NOTE_LINE_NUMBER (note) = subtype; @@ -2947,13 +3775,13 @@ emit_note_before (subtype, before) rtx emit_insn_after (pattern, after) - register rtx pattern, after; + rtx pattern, after; { - register rtx insn = after; + rtx insn = after; if (GET_CODE (pattern) == SEQUENCE) { - register int i; + int i; for (i = 0; i < XVECLEN (pattern, 0); i++) { @@ -2961,8 +3789,6 @@ emit_insn_after (pattern, after) add_insn_after (insn, after); after = insn; } - if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) - sequence_result[XVECLEN (pattern, 0)] = pattern; } else { @@ -3000,9 +3826,9 @@ emit_insn_after_with_line_notes (pattern, after, from) rtx emit_jump_insn_after (pattern, after) - register rtx pattern, after; + rtx pattern, after; { - register rtx insn; + rtx insn; if (GET_CODE (pattern) == SEQUENCE) insn = emit_insn_after (pattern, after); @@ -3020,9 +3846,9 @@ emit_jump_insn_after (pattern, after) rtx emit_barrier_after (after) - register rtx after; + rtx after; { - register rtx insn = rtx_alloc (BARRIER); + rtx insn = rtx_alloc (BARRIER); INSN_UID (insn) = cur_insn_uid++; @@ -3055,7 +3881,7 @@ emit_note_after (subtype, after) int subtype; rtx after; { - register rtx note = rtx_alloc (NOTE); + rtx note = rtx_alloc (NOTE); INSN_UID (note) = cur_insn_uid++; NOTE_SOURCE_FILE (note) = 0; NOTE_LINE_NUMBER (note) = subtype; @@ -3067,11 +3893,11 @@ emit_note_after (subtype, after) rtx emit_line_note_after (file, line, after) - char *file; + const char *file; int line; rtx after; { - register rtx note; + rtx note; if (no_line_numbers && line > 0) { @@ -3102,15 +3928,13 @@ emit_insn (pattern) if (GET_CODE (pattern) == SEQUENCE) { - register int i; + int i; for (i = 0; i < XVECLEN (pattern, 0); i++) { insn = XVECEXP (pattern, 0, i); add_insn (insn); } - if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) - sequence_result[XVECLEN (pattern, 0)] = pattern; } else { @@ -3167,20 +3991,32 @@ emit_insns_before (insn, before) rtx emit_insns_after (first, after) - register rtx first; - register rtx after; + rtx first; + rtx after; { - register rtx last; - register rtx after_after; + rtx last; + rtx after_after; + basic_block bb; if (!after) abort (); if (!first) - return first; + return after; - for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) - continue; + if (basic_block_for_insn + && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements + && (bb = BLOCK_FOR_INSN (after))) + { + for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) + set_block_for_insn (last, bb); + set_block_for_insn (last, bb); + if (bb->end == after) + bb->end = last; + } + else + for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) + continue; after_after = NEXT_INSN (after); @@ -3206,7 +4042,7 @@ emit_jump_insn (pattern) return emit_insn (pattern); else { - register rtx insn = make_jump_insn_raw (pattern); + rtx insn = make_jump_insn_raw (pattern); add_insn (insn); return insn; } @@ -3223,7 +4059,7 @@ emit_call_insn (pattern) return emit_insn (pattern); else { - register rtx insn = make_call_insn_raw (pattern); + rtx insn = make_call_insn_raw (pattern); add_insn (insn); PUT_CODE (insn, CALL_INSN); return insn; @@ -3253,7 +4089,7 @@ emit_label (label) rtx emit_barrier () { - register rtx barrier = rtx_alloc (BARRIER); + rtx barrier = rtx_alloc (BARRIER); INSN_UID (barrier) = cur_insn_uid++; add_insn (barrier); return barrier; @@ -3266,11 +4102,10 @@ emit_barrier () rtx emit_line_note (file, line) - char *file; + const char *file; int line; { - emit_filename = file; - emit_lineno = line; + set_file_and_line_for_stmt (file, line); #if 0 if (no_line_numbers) @@ -3287,10 +4122,10 @@ emit_line_note (file, line) rtx emit_note (file, line) - char *file; + const char *file; int line; { - register rtx note; + rtx note; if (line > 0) { @@ -3319,7 +4154,7 @@ emit_note (file, line) rtx emit_line_note_force (file, line) - char *file; + const char *file; int line; { last_linenum = -1; @@ -3336,9 +4171,9 @@ force_next_line_note () } /* Place a note of KIND on insn INSN with DATUM as the datum. If a - note of this type already exists, remove it first. */ + note of this type already exists, remove it first. */ -void +rtx set_unique_reg_note (insn, kind, datum) rtx insn; enum reg_note kind; @@ -3346,11 +4181,39 @@ set_unique_reg_note (insn, kind, datum) { rtx note = find_reg_note (insn, kind, NULL_RTX); - /* First remove the note if there already is one. */ - if (note) - remove_note (insn, note); + switch (kind) + { + case REG_EQUAL: + case REG_EQUIV: + /* Don't add REG_EQUAL/REG_EQUIV notes if the insn + has multiple sets (some callers assume single_set + means the insn only has one set, when in fact it + means the insn only has one * useful * set). */ + if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn)) + { + if (note) + abort (); + return NULL_RTX; + } + + /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes. + It serves no useful purpose and breaks eliminate_regs. */ + if (GET_CODE (datum) == ASM_OPERANDS) + return NULL_RTX; + break; + + default: + break; + } + + if (note) + { + XEXP (note, 0) = datum; + return note; + } REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn)); + return REG_NOTES (insn); } /* Return an indication of which type of insn should have X as a body. @@ -3377,7 +4240,7 @@ classify_insn (x) } if (GET_CODE (x) == PARALLEL) { - register int j; + int j; for (j = XVECLEN (x, 0) - 1; j >= 0; j--) if (GET_CODE (XVECEXP (x, 0, j)) == CALL) return CALL_INSN; @@ -3406,8 +4269,8 @@ emit (x) return emit_insn (x); else if (code == JUMP_INSN) { - register rtx insn = emit_jump_insn (x); - if (simplejump_p (insn) || GET_CODE (x) == RETURN) + rtx insn = emit_jump_insn (x); + if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN) return emit_barrier (); return insn; } @@ -3423,28 +4286,21 @@ emit (x) pops have previously been deferred; see INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust before calling this function. That will ensure that the deferred pops are not accidentally - emitted in the middel of this sequence. */ + emitted in the middle of this sequence. */ void start_sequence () { struct sequence_stack *tem; - if (sequence_element_free_list) - { - /* Reuse a previously-saved struct sequence_stack. */ - tem = sequence_element_free_list; - sequence_element_free_list = tem->next; - } - else - tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack)); + tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack)); - tem->next = sequence_stack; + tem->next = seq_stack; tem->first = first_insn; tem->last = last_insn; - tem->sequence_rtl_expr = sequence_rtl_expr; + tem->sequence_rtl_expr = seq_rtl_expr; - sequence_stack = tem; + seq_stack = tem; first_insn = 0; last_insn = 0; @@ -3460,7 +4316,7 @@ start_sequence_for_rtl_expr (t) { start_sequence (); - sequence_rtl_expr = t; + seq_rtl_expr = t; } /* Set up the insn chain starting with FIRST as the current sequence, @@ -3481,6 +4337,20 @@ push_to_sequence (first) last_insn = last; } +/* Set up the insn chain from a chain stort in FIRST to LAST. */ + +void +push_to_full_sequence (first, last) + rtx first, last; +{ + start_sequence (); + first_insn = first; + last_insn = last; + /* We really should have the end of the insn chain here. */ + if (last && NEXT_INSN (last)) + abort (); +} + /* Set up the outer-level insn chain as the current sequence, saving the previously current one. */ @@ -3491,12 +4361,12 @@ push_topmost_sequence () start_sequence (); - for (stack = sequence_stack; stack; stack = stack->next) + for (stack = seq_stack; stack; stack = stack->next) top = stack; first_insn = top->first; last_insn = top->last; - sequence_rtl_expr = top->sequence_rtl_expr; + seq_rtl_expr = top->sequence_rtl_expr; } /* After emitting to the outer-level insn chain, update the outer-level @@ -3507,12 +4377,12 @@ pop_topmost_sequence () { struct sequence_stack *stack, *top = NULL; - for (stack = sequence_stack; stack; stack = stack->next) + for (stack = seq_stack; stack; stack = stack->next) top = stack; top->first = first_insn; top->last = last_insn; - /* ??? Why don't we save sequence_rtl_expr here? */ + /* ??? Why don't we save seq_rtl_expr here? */ end_sequence (); } @@ -3520,7 +4390,7 @@ pop_topmost_sequence () /* After emitting to a sequence, restore previous saved state. To get the contents of the sequence just made, you must call - `gen_sequence' *before* calling here. + `gen_sequence' *before* calling here. If the compiler might have deferred popping arguments while generating this sequence, and this sequence will not be immediately @@ -3533,15 +4403,26 @@ pop_topmost_sequence () void end_sequence () { - struct sequence_stack *tem = sequence_stack; + struct sequence_stack *tem = seq_stack; first_insn = tem->first; last_insn = tem->last; - sequence_rtl_expr = tem->sequence_rtl_expr; - sequence_stack = tem->next; + seq_rtl_expr = tem->sequence_rtl_expr; + seq_stack = tem->next; - tem->next = sequence_element_free_list; - sequence_element_free_list = tem; + free (tem); +} + +/* This works like end_sequence, but records the old sequence in FIRST + and LAST. */ + +void +end_full_sequence (first, last) + rtx *first, *last; +{ + *first = first_insn; + *last = last_insn; + end_sequence(); } /* Return 1 if currently emitting into a sequence. */ @@ -3549,7 +4430,7 @@ end_sequence () int in_sequence_p () { - return sequence_stack != 0; + return seq_stack != 0; } /* Generate a SEQUENCE rtx containing the insns already emitted @@ -3571,35 +4452,19 @@ gen_sequence () for (tem = first_insn; tem; tem = NEXT_INSN (tem)) len++; - /* If only one insn, return its pattern rather than a SEQUENCE. + /* If only one insn, return it rather than a SEQUENCE. (Now that we cache SEQUENCE expressions, it isn't worth special-casing - the case of an empty list.) */ + the case of an empty list.) + We only return the pattern of an insn if its code is INSN and it + has no notes. This ensures that no information gets lost. */ if (len == 1 && ! RTX_FRAME_RELATED_P (first_insn) - && (GET_CODE (first_insn) == INSN - || GET_CODE (first_insn) == JUMP_INSN - /* Don't discard the call usage field. */ - || (GET_CODE (first_insn) == CALL_INSN - && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX))) - { - NEXT_INSN (first_insn) = free_insn; - free_insn = first_insn; - return PATTERN (first_insn); - } + && GET_CODE (first_insn) == INSN + /* Don't throw away any reg notes. */ + && REG_NOTES (first_insn) == 0) + return PATTERN (first_insn); - /* Put them in a vector. See if we already have a SEQUENCE of the - appropriate length around. */ - if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0) - sequence_result[len] = 0; - else - { - /* Ensure that this rtl goes in saveable_obstack, since we may - cache it. */ - push_obstacks_nochange (); - rtl_in_saveable_obstack (); - result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len)); - pop_obstacks (); - } + result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len)); for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) XVECEXP (result, 0, i) = tem; @@ -3610,13 +4475,198 @@ gen_sequence () /* Put the various virtual registers into REGNO_REG_RTX. */ void -init_virtual_regs () +init_virtual_regs (es) + struct emit_status *es; +{ + rtx *ptr = es->x_regno_reg_rtx; + ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; + ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; + ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; + ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; + ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx; +} + +void +clear_emit_caches () +{ + int i; + + /* Clear the start_sequence/gen_sequence cache. */ + for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) + sequence_result[i] = 0; + free_insn = 0; +} + +/* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */ +static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS]; +static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS]; +static int copy_insn_n_scratches; + +/* When an insn is being copied by copy_insn_1, this is nonzero if we have + copied an ASM_OPERANDS. + In that case, it is the original input-operand vector. */ +static rtvec orig_asm_operands_vector; + +/* When an insn is being copied by copy_insn_1, this is nonzero if we have + copied an ASM_OPERANDS. + In that case, it is the copied input-operand vector. */ +static rtvec copy_asm_operands_vector; + +/* Likewise for the constraints vector. */ +static rtvec orig_asm_constraints_vector; +static rtvec copy_asm_constraints_vector; + +/* Recursively create a new copy of an rtx for copy_insn. + This function differs from copy_rtx in that it handles SCRATCHes and + ASM_OPERANDs properly. + Normally, this function is not used directly; use copy_insn as front end. + However, you could first copy an insn pattern with copy_insn and then use + this function afterwards to properly copy any REG_NOTEs containing + SCRATCHes. */ + +rtx +copy_insn_1 (orig) + rtx orig; +{ + rtx copy; + int i, j; + RTX_CODE code; + const char *format_ptr; + + code = GET_CODE (orig); + + switch (code) + { + case REG: + case QUEUED: + case CONST_INT: + case CONST_DOUBLE: + case SYMBOL_REF: + case CODE_LABEL: + case PC: + case CC0: + case ADDRESSOF: + return orig; + + case SCRATCH: + for (i = 0; i < copy_insn_n_scratches; i++) + if (copy_insn_scratch_in[i] == orig) + return copy_insn_scratch_out[i]; + break; + + case CONST: + /* CONST can be shared if it contains a SYMBOL_REF. If it contains + a LABEL_REF, it isn't sharable. */ + if (GET_CODE (XEXP (orig, 0)) == PLUS + && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF + && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT) + return orig; + break; + + /* A MEM with a constant address is not sharable. The problem is that + the constant address may need to be reloaded. If the mem is shared, + then reloading one copy of this mem will cause all copies to appear + to have been reloaded. */ + + default: + break; + } + + copy = rtx_alloc (code); + + /* Copy the various flags, and other information. We assume that + all fields need copying, and then clear the fields that should + not be copied. That is the sensible default behavior, and forces + us to explicitly document why we are *not* copying a flag. */ + memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion)); + + /* We do not copy the USED flag, which is used as a mark bit during + walks over the RTL. */ + copy->used = 0; + + /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */ + if (GET_RTX_CLASS (code) == 'i') + { + copy->jump = 0; + copy->call = 0; + copy->frame_related = 0; + } + + format_ptr = GET_RTX_FORMAT (GET_CODE (copy)); + + for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++) + { + copy->fld[i] = orig->fld[i]; + switch (*format_ptr++) + { + case 'e': + if (XEXP (orig, i) != NULL) + XEXP (copy, i) = copy_insn_1 (XEXP (orig, i)); + break; + + case 'E': + case 'V': + if (XVEC (orig, i) == orig_asm_constraints_vector) + XVEC (copy, i) = copy_asm_constraints_vector; + else if (XVEC (orig, i) == orig_asm_operands_vector) + XVEC (copy, i) = copy_asm_operands_vector; + else if (XVEC (orig, i) != NULL) + { + XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i)); + for (j = 0; j < XVECLEN (copy, i); j++) + XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j)); + } + break; + + case 't': + case 'w': + case 'i': + case 's': + case 'S': + case 'u': + case '0': + /* These are left unchanged. */ + break; + + default: + abort (); + } + } + + if (code == SCRATCH) + { + i = copy_insn_n_scratches++; + if (i >= MAX_RECOG_OPERANDS) + abort (); + copy_insn_scratch_in[i] = orig; + copy_insn_scratch_out[i] = copy; + } + else if (code == ASM_OPERANDS) + { + orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig); + copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy); + orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig); + copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy); + } + + return copy; +} + +/* Create a new copy of an rtx. + This function differs from copy_rtx in that it handles SCRATCHes and + ASM_OPERANDs properly. + INSN doesn't really have to be a full INSN; it could be just the + pattern. */ +rtx +copy_insn (insn) + rtx insn; { - regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; - regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; - regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; - regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; - regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx; + copy_insn_n_scratches = 0; + orig_asm_operands_vector = 0; + orig_asm_constraints_vector = 0; + copy_asm_operands_vector = 0; + copy_asm_constraints_vector = 0; + return copy_insn_1 (insn); } /* Initialize data structures and variables in this file @@ -3625,73 +4675,63 @@ init_virtual_regs () void init_emit () { - int i; + struct function *f = cfun; + f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status)); first_insn = NULL; last_insn = NULL; - sequence_rtl_expr = NULL; + seq_rtl_expr = NULL; cur_insn_uid = 1; reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; last_linenum = 0; last_filename = 0; first_label_num = label_num; last_label_num = 0; - sequence_stack = NULL; + seq_stack = NULL; - /* Clear the start_sequence/gen_sequence cache. */ - sequence_element_free_list = 0; - for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) - sequence_result[i] = 0; - free_insn = 0; + clear_emit_caches (); /* Init the tables that describe all the pseudo regs. */ - regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101; + f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101; - regno_pointer_flag - = (char *) savealloc (regno_pointer_flag_length); - bzero (regno_pointer_flag, regno_pointer_flag_length); + f->emit->regno_pointer_align + = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length, + sizeof (unsigned char)); - regno_pointer_align - = (char *) savealloc (regno_pointer_flag_length); - bzero (regno_pointer_align, regno_pointer_flag_length); + regno_reg_rtx + = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx)); - regno_reg_rtx - = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx)); - bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx)); + f->emit->regno_decl + = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree)); /* Put copies of all the virtual register rtx into regno_reg_rtx. */ - init_virtual_regs (); + init_virtual_regs (f->emit); /* Indicate that the virtual registers and stack locations are all pointers. */ - REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1; - REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1; - REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1; - REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1; + REG_POINTER (stack_pointer_rtx) = 1; + REG_POINTER (frame_pointer_rtx) = 1; + REG_POINTER (hard_frame_pointer_rtx) = 1; + REG_POINTER (arg_pointer_rtx) = 1; - REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1; - REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1; - REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1; - REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1; - REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1; + REG_POINTER (virtual_incoming_args_rtx) = 1; + REG_POINTER (virtual_stack_vars_rtx) = 1; + REG_POINTER (virtual_stack_dynamic_rtx) = 1; + REG_POINTER (virtual_outgoing_args_rtx) = 1; + REG_POINTER (virtual_cfa_rtx) = 1; #ifdef STACK_BOUNDARY - REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT; - REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT; - REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) - = STACK_BOUNDARY / BITS_PER_UNIT; - REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT; - - REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) - = STACK_BOUNDARY / BITS_PER_UNIT; - REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) - = STACK_BOUNDARY / BITS_PER_UNIT; - REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) - = STACK_BOUNDARY / BITS_PER_UNIT; - REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) - = STACK_BOUNDARY / BITS_PER_UNIT; - REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD; + REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY; + REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY; + REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY; + REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY; + + REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY; + REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY; + REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY; + REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY; + REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD; #endif #ifdef INIT_EXPANDERS @@ -3699,6 +4739,46 @@ init_emit () #endif } +/* Mark SS for GC. */ + +static void +mark_sequence_stack (ss) + struct sequence_stack *ss; +{ + while (ss) + { + ggc_mark_rtx (ss->first); + ggc_mark_tree (ss->sequence_rtl_expr); + ss = ss->next; + } +} + +/* Mark ES for GC. */ + +void +mark_emit_status (es) + struct emit_status *es; +{ + rtx *r; + tree *t; + int i; + + if (es == 0) + return; + + for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx, + t = es->regno_decl; + i > 0; --i, ++r, ++t) + { + ggc_mark_rtx (*r); + ggc_mark_tree (*t); + } + + mark_sequence_stack (es->sequence_stack); + ggc_mark_tree (es->sequence_rtl_expr); + ggc_mark_rtx (es->x_first_insn); +} + /* Create some permanent unique rtl objects shared between all functions. LINE_NUMBERS is nonzero if line numbers are to be generated. */ @@ -3710,9 +4790,16 @@ init_emit_once (line_numbers) enum machine_mode mode; enum machine_mode double_mode; - no_line_numbers = ! line_numbers; + /* Initialize the CONST_INT and memory attribute hash tables. */ + const_int_htab = htab_create (37, const_int_htab_hash, + const_int_htab_eq, NULL); + ggc_add_deletable_htab (const_int_htab, 0, 0); - sequence_stack = NULL; + mem_attrs_htab = htab_create (37, mem_attrs_htab_hash, + mem_attrs_htab_eq, NULL); + ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark); + + no_line_numbers = ! line_numbers; /* Compute the word and byte modes. */ @@ -3732,10 +4819,6 @@ init_emit_once (line_numbers) word_mode = mode; } -#ifndef DOUBLE_TYPE_SIZE -#define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2) -#endif - for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; mode = GET_MODE_WIDER_MODE (mode)) { @@ -3746,18 +4829,52 @@ init_emit_once (line_numbers) ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0); + /* Assign register numbers to the globally defined register rtx. + This must be done at runtime because the register number field + is in a union and some compilers can't initialize unions. */ + + pc_rtx = gen_rtx (PC, VOIDmode); + cc0_rtx = gen_rtx (CC0, VOIDmode); + stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM); + frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM); + if (hard_frame_pointer_rtx == 0) + hard_frame_pointer_rtx = gen_raw_REG (Pmode, + HARD_FRAME_POINTER_REGNUM); + if (arg_pointer_rtx == 0) + arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM); + virtual_incoming_args_rtx = + gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM); + virtual_stack_vars_rtx = + gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM); + virtual_stack_dynamic_rtx = + gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM); + virtual_outgoing_args_rtx = + gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM); + virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM); + + /* These rtx must be roots if GC is enabled. */ + ggc_add_rtx_root (global_rtl, GR_MAX); + +#ifdef INIT_EXPANDERS + /* This is to initialize {init|mark|free}_machine_status before the first + call to push_function_context_to. This is needed by the Chill front + end which calls push_function_context_to before the first call to + init_function_start. */ + INIT_EXPANDERS; +#endif + /* Create the unique rtx's for certain rtx codes and operand values. */ + /* Don't use gen_rtx here since gen_rtx in this case + tries to use these variables. */ for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) - { - PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT); - PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode); - INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i; - } + const_int_rtx[i + MAX_SAVED_CONST_INT] = + gen_rtx_raw_CONST_INT (VOIDmode, i); + ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1); if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT) - const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT]; + const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT]; else const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE); @@ -3774,11 +4891,18 @@ init_emit_once (line_numbers) rtx tem = rtx_alloc (CONST_DOUBLE); union real_extract u; - bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */ + /* Zero any holes in a structure. */ + memset ((char *) &u, 0, sizeof u); u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2; - bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u); - CONST_DOUBLE_MEM (tem) = cc0_rtx; + /* Avoid trailing garbage in the rtx. */ + if (sizeof (u) < sizeof (HOST_WIDE_INT)) + CONST_DOUBLE_LOW (tem) = 0; + if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT)) + CONST_DOUBLE_HIGH (tem) = 0; + + memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u); + CONST_DOUBLE_CHAIN (tem) = NULL_RTX; PUT_MODE (tem, mode); const_tiny_rtx[i][(int) mode] = tem; @@ -3796,42 +4920,23 @@ init_emit_once (line_numbers) const_tiny_rtx[i][(int) mode] = GEN_INT (i); } - for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode; - mode = GET_MODE_WIDER_MODE (mode)) - const_tiny_rtx[0][(int) mode] = const0_rtx; - + for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i) + if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC) + const_tiny_rtx[0][i] = const0_rtx; - /* Assign register numbers to the globally defined register rtx. - This must be done at runtime because the register number field - is in a union and some compilers can't initialize unions. */ - - REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM; - PUT_MODE (stack_pointer_rtx, Pmode); - REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM; - PUT_MODE (frame_pointer_rtx, Pmode); -#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM - REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM; - PUT_MODE (hard_frame_pointer_rtx, Pmode); -#endif -#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM - REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM; - PUT_MODE (arg_pointer_rtx, Pmode); -#endif + const_tiny_rtx[0][(int) BImode] = const0_rtx; + if (STORE_FLAG_VALUE == 1) + const_tiny_rtx[1][(int) BImode] = const1_rtx; - REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM; - PUT_MODE (virtual_incoming_args_rtx, Pmode); - REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM; - PUT_MODE (virtual_stack_vars_rtx, Pmode); - REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM; - PUT_MODE (virtual_stack_dynamic_rtx, Pmode); - REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM; - PUT_MODE (virtual_outgoing_args_rtx, Pmode); - REGNO (virtual_cfa_rtx) = VIRTUAL_CFA_REGNUM; - PUT_MODE (virtual_cfa_rtx, Pmode); + /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as + `(rtx *) const_tiny_rtx'. The former has bounds that only cover + `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */ + ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx)); + ggc_add_rtx_root (&const_true_rtx, 1); #ifdef RETURN_ADDRESS_POINTER_REGNUM return_address_pointer_rtx - = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM); + = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM); #endif #ifdef STRUCT_VALUE @@ -3856,7 +4961,8 @@ init_emit_once (line_numbers) #ifdef STATIC_CHAIN_INCOMING_REGNUM if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) - static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM); + static_chain_incoming_rtx + = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM); else #endif static_chain_incoming_rtx = static_chain_rtx; @@ -3872,17 +4978,15 @@ init_emit_once (line_numbers) #endif #endif -#ifdef PIC_OFFSET_TABLE_REGNUM - pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM); -#endif + if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) + pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM); -#ifdef INIT_EXPANDERS - /* This is to initialize save_machine_status and restore_machine_status before - the first call to push_function_context_to. This is needed by the Chill - front end which calls push_function_context_to before the first cal to - init_function_start. */ - INIT_EXPANDERS; -#endif + ggc_add_rtx_root (&pic_offset_table_rtx, 1); + ggc_add_rtx_root (&struct_value_rtx, 1); + ggc_add_rtx_root (&struct_value_incoming_rtx, 1); + ggc_add_rtx_root (&static_chain_rtx, 1); + ggc_add_rtx_root (&static_chain_incoming_rtx, 1); + ggc_add_rtx_root (&return_address_pointer_rtx, 1); } /* Query and clear/ restore no_line_numbers. This is used by the |