Upgrade of base gcc and libstdc++ to the last GPLv2-licensed revision

(rev. 127959 of gcc-4_2-branch).

Resolved GCC bugs:
	c++: 17763, 29365, 30535, 30917, 31337, 31941, 32108, 32112, 32346,
	     32898, 32992
	debug: 32610, 32914
	libstdc++: 33084, 33128
	middle-end: 32563
	rtl-optimization: 33148
	tree-optimization: 25413, 32723
	target: 32218

Tested by:	pointyhat (miwi)
Obtained from:	gcc (gcc-4_2-branch up to rev. 127959)
PR:		gnu/153298, gnu/153959, gnu/154385
MFC after:	1 month

3 files changed, 40 insertions, 3 deletions

diff --git a/contrib/gcc/config/mips/predicates.md b/contrib/gcc/config/mips/predicates.md
index 9a6756c..bbc8e3c 100644
--- a/contrib/gcc/config/mips/predicates.md
+++ b/contrib/gcc/config/mips/predicates.md
@@ -116,7 +116,9 @@
       /* If -mlong-calls, force all calls to use register addressing.  Also,
 	 if this function has the long_call attribute, we must use register
 	 addressing.  */
-      return !TARGET_LONG_CALLS && !SYMBOL_REF_LONG_CALL_P (op);
+      return (!TARGET_LONG_CALLS
+	      && !(GET_CODE (op) == SYMBOL_REF
+		   && SYMBOL_REF_LONG_CALL_P (op)));
 
     case SYMBOL_GOT_GLOBAL:
       /* Without explicit relocs, there is no special syntax for
diff --git a/contrib/gcc/config/rs6000/rs6000.c b/contrib/gcc/config/rs6000/rs6000.c
index 2c60fdf..c7efad5 100644
--- a/contrib/gcc/config/rs6000/rs6000.c
+++ b/contrib/gcc/config/rs6000/rs6000.c
@@ -664,6 +664,7 @@ static int rs6000_use_sched_lookahead (void);
 static tree rs6000_builtin_mask_for_load (void);
 
 static void def_builtin (int, const char *, tree, int);
+static bool rs6000_vector_alignment_reachable (tree, bool);
 static void rs6000_init_builtins (void);
 static rtx rs6000_expand_unop_builtin (enum insn_code, tree, rtx);
 static rtx rs6000_expand_binop_builtin (enum insn_code, tree, rtx);
@@ -915,6 +916,9 @@ static const char alt_reg_names[][8] =
 #undef TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD
 #define TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD rs6000_builtin_mask_for_load
 
+#undef TARGET_VECTOR_ALIGNMENT_REACHABLE
+#define TARGET_VECTOR_ALIGNMENT_REACHABLE rs6000_vector_alignment_reachable
+
 #undef TARGET_INIT_BUILTINS
 #define TARGET_INIT_BUILTINS rs6000_init_builtins
 
@@ -1584,6 +1588,37 @@ rs6000_builtin_mask_for_load (void)
     return 0;
 }
 
+
+/* Return true iff, data reference of TYPE can reach vector alignment (16)
+   after applying N number of iterations.  This routine does not determine
+   how may iterations are required to reach desired alignment.  */
+
+static bool
+rs6000_vector_alignment_reachable (tree type ATTRIBUTE_UNUSED, bool is_packed)
+{
+  if (is_packed)
+    return false;
+
+  if (TARGET_32BIT)
+    {
+      if (rs6000_alignment_flags == MASK_ALIGN_NATURAL)
+        return true;
+
+      if (rs6000_alignment_flags ==  MASK_ALIGN_POWER)
+        return true;
+
+      return false;
+    }
+  else
+    {
+      if (TARGET_MACHO)
+        return false;
+
+      /* Assuming that all other types are naturally aligned. CHECKME!  */
+      return true;
+    }
+}
+
 /* Handle generic options of the form -mfoo=yes/no.
    NAME is the option name.
    VALUE is the option value.
diff --git a/contrib/gcc/config/s390/s390.md b/contrib/gcc/config/s390/s390.md
index 2348409..e8eb206 100644
--- a/contrib/gcc/config/s390/s390.md
+++ b/contrib/gcc/config/s390/s390.md
@@ -1500,7 +1500,7 @@
    && !s_operand (operands[1], VOIDmode)"
   [(set (match_dup 0) (match_dup 1))]
 {
-  rtx addr = operand_subword (operands[0], 1, 0, DFmode);
+  rtx addr = operand_subword (operands[0], 1, 0, TFmode);
   s390_load_address (addr, XEXP (operands[1], 0));
   operands[1] = replace_equiv_address (operands[1], addr);
 })
@@ -5624,7 +5624,7 @@
   "s390_match_ccmode(insn, CCTmode) && TARGET_64BIT"
   "@
    xgr\t%0,%2
-   xr\t%0,%2"
+   xg\t%0,%2"
   [(set_attr "op_type"  "RRE,RXY")])
 
 (define_insn "*xordi3_extimm"