diff options
author | kan <kan@FreeBSD.org> | 2005-06-03 04:02:20 +0000 |
---|---|---|
committer | kan <kan@FreeBSD.org> | 2005-06-03 04:02:20 +0000 |
commit | 17d0aa6eb2050531034d5fd72e59df4a5ebdd64e (patch) | |
tree | dc04596dd574786e48bfdb08626f8333c6aa3e3c /contrib/gcc/config | |
parent | ff647fd5f2288c34f81130b9002d20a025a5a388 (diff) | |
download | FreeBSD-src-17d0aa6eb2050531034d5fd72e59df4a5ebdd64e.zip FreeBSD-src-17d0aa6eb2050531034d5fd72e59df4a5ebdd64e.tar.gz |
Merge conflicts for GCC 3.4.4.
Diffstat (limited to 'contrib/gcc/config')
-rw-r--r-- | contrib/gcc/config/freebsd-spec.h | 32 | ||||
-rw-r--r-- | contrib/gcc/config/i386/freebsd.h | 13 | ||||
-rw-r--r-- | contrib/gcc/config/i386/i386.c | 132 | ||||
-rw-r--r-- | contrib/gcc/config/i386/i386.h | 14 |
4 files changed, 123 insertions, 68 deletions
diff --git a/contrib/gcc/config/freebsd-spec.h b/contrib/gcc/config/freebsd-spec.h index 5c27804..e0a5b66 100644 --- a/contrib/gcc/config/freebsd-spec.h +++ b/contrib/gcc/config/freebsd-spec.h @@ -130,15 +130,15 @@ Boston, MA 02111-1307, USA. */ required by the user-land thread model. Before __FreeBSD_version 500016, select the appropriate libc, depending on whether we're doing profiling or need threads support. At __FreeBSD_version - 500016 and later, thread libraries can be linked with libc. To - make matters interesting, we can't actually use __FreeBSD_version - provided by <osreldate.h> directly since it breaks cross-compiling. - As a final twist, make it a hard error if -pthread is provided on - the command line and gcc was configured with --disable-threads - (this will help avoid bug reports from users complaining about - threading when they misconfigured the gcc bootstrap but are later - consulting FreeBSD manual pages that refer to the mythical -pthread - option). */ + 500016 and later, when threads support is requested include both + -lc and the threading lib instead of only -lc_r. To make matters + interesting, we can't actually use __FreeBSD_version provided by + <osreldate.h> directly since it breaks cross-compiling. As a final + twist, make it a hard error if -pthread is provided on the command + line and gcc was configured with --disable-threads (this will help + avoid bug reports from users complaining about threading when they + misconfigured the gcc bootstrap but are later consulting FreeBSD + manual pages that refer to the mythical -pthread option). */ /* Provide a LIB_SPEC appropriate for FreeBSD. Just select the appropriate libc, depending on whether we're doing profiling or need threads support. @@ -154,13 +154,7 @@ is built with the --enable-threads configure-time option.} \ }" #else #include <sys/param.h> -#if __FreeBSD_version >= 500016 -#define FBSD_LIB_SPEC " \ - %{!shared: \ - %{!pg: %{pthread:-lpthread} -lc} \ - %{pg: %{pthread:-lpthread_p} -lc_p} \ - }" -#else +#if __FreeBSD_version < 500016 #define FBSD_LIB_SPEC " \ %{!shared: \ %{!pg: \ @@ -170,6 +164,12 @@ is built with the --enable-threads configure-time option.} \ %{!pthread:-lc_p} \ %{pthread:-lc_r_p}} \ }" +#else +#define FBSD_LIB_SPEC " \ + %{!shared: \ + %{!pg: %{pthread:-lpthread} -lc} \ + %{pg: %{pthread:-lpthread_p} -lc_p} \ + }" #endif #endif diff --git a/contrib/gcc/config/i386/freebsd.h b/contrib/gcc/config/i386/freebsd.h index 12f513e..261f739 100644 --- a/contrib/gcc/config/i386/freebsd.h +++ b/contrib/gcc/config/i386/freebsd.h @@ -22,7 +22,7 @@ along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* $FreeBSD$ */ +-/* $FreeBSD$ */ #undef CC1_SPEC #define CC1_SPEC "%(cc1_cpu) %{profile:-p}" @@ -113,15 +113,8 @@ Boston, MA 02111-1307, USA. */ /* FreeBSD sets the rounding precision of the FPU to 53 bits. Let the compiler get the contents of <float.h> and std::numeric_limits correct. */ -#define SUBTARGET_OVERRIDE_OPTIONS \ - do { \ - if (!TARGET_64BIT) { \ - REAL_MODE_FORMAT (XFmode) \ - = &ieee_extended_intel_96_round_53_format; \ - REAL_MODE_FORMAT (TFmode) \ - = &ieee_extended_intel_96_round_53_format; \ - } \ - } while (0) +#undef TARGET_96_ROUND_53_LONG_DOUBLE +#define TARGET_96_ROUND_53_LONG_DOUBLE (!TARGET_64BIT) /* Tell final.c that we don't need a label passed to mcount. */ #define NO_PROFILE_COUNTERS 1 diff --git a/contrib/gcc/config/i386/i386.c b/contrib/gcc/config/i386/i386.c index 2e6b411..d0040fb 100644 --- a/contrib/gcc/config/i386/i386.c +++ b/contrib/gcc/config/i386/i386.c @@ -526,7 +526,14 @@ const int x86_sse_typeless_stores = m_ATHLON_K8; const int x86_sse_load0_by_pxor = m_PPRO | m_PENT4; const int x86_use_ffreep = m_ATHLON_K8; const int x86_rep_movl_optimal = m_386 | m_PENT | m_PPRO | m_K6; -const int x86_inter_unit_moves = ~(m_ATHLON_K8); + +/* ??? HACK! The following is a lie. SSE can hold e.g. SImode, and + indeed *must* be able to hold SImode so that SSE2 shifts are able + to work right. But this can result in some mighty surprising + register allocation when building kernels. Turning this off should + make us less likely to all-of-the-sudden select an SSE register. */ +const int x86_inter_unit_moves = 0; /* ~(m_ATHLON_K8) */ + const int x86_ext_80387_constants = m_K6 | m_ATHLON | m_PENT4 | m_PPRO; /* In case the average insn count for single function invocation is @@ -2540,6 +2547,34 @@ function_arg_advance (CUMULATIVE_ARGS *cum, /* current arg information */ return; } +/* A subroutine of function_arg. We want to pass a parameter whose nominal + type is MODE in REGNO. We try to minimize ABI variation, so MODE may not + actually be valid for REGNO with the current ISA. In this case, ALT_MODE + is used instead. It must be the same size as MODE, and must be known to + be valid for REGNO. Finally, ORIG_MODE is the original mode of the + parameter, as seen by the type system. This may be different from MODE + when we're mucking with things minimizing ABI variations. + + Returns a REG or a PARALLEL as appropriate. */ + +static rtx +gen_reg_or_parallel (enum machine_mode mode, enum machine_mode alt_mode, + enum machine_mode orig_mode, unsigned int regno) +{ + rtx tmp; + + if (HARD_REGNO_MODE_OK (regno, mode)) + tmp = gen_rtx_REG (mode, regno); + else + { + tmp = gen_rtx_REG (alt_mode, regno); + tmp = gen_rtx_EXPR_LIST (VOIDmode, tmp, const0_rtx); + tmp = gen_rtx_PARALLEL (orig_mode, gen_rtvec (1, tmp)); + } + + return tmp; +} + /* Define where to put the arguments to a function. Value is zero to push the argument on the stack, or a hard register in which to store the argument. @@ -2554,12 +2589,11 @@ function_arg_advance (CUMULATIVE_ARGS *cum, /* current arg information */ (otherwise it is an extra parameter matching an ellipsis). */ rtx -function_arg (CUMULATIVE_ARGS *cum, /* current arg information */ - enum machine_mode mode, /* current arg mode */ - tree type, /* type of the argument or 0 if lib support */ - int named) /* != 0 for normal args, == 0 for ... args */ +function_arg (CUMULATIVE_ARGS *cum, enum machine_mode orig_mode, + tree type, int named) { - rtx ret = NULL_RTX; + enum machine_mode mode = orig_mode; + rtx ret = NULL_RTX; int bytes = (mode == BLKmode) ? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode); int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; @@ -2632,7 +2666,8 @@ function_arg (CUMULATIVE_ARGS *cum, /* current arg information */ "changes the ABI"); } if (cum->sse_nregs) - ret = gen_rtx_REG (mode, cum->sse_regno + FIRST_SSE_REG); + ret = gen_reg_or_parallel (mode, TImode, orig_mode, + cum->sse_regno + FIRST_SSE_REG); } break; case V8QImode: @@ -2648,7 +2683,8 @@ function_arg (CUMULATIVE_ARGS *cum, /* current arg information */ "changes the ABI"); } if (cum->mmx_nregs) - ret = gen_rtx_REG (mode, cum->mmx_regno + FIRST_MMX_REG); + ret = gen_reg_or_parallel (mode, DImode, orig_mode, + cum->mmx_regno + FIRST_MMX_REG); } break; } @@ -4323,6 +4359,12 @@ aligned_operand (rtx op, enum machine_mode mode) /* Didn't find one -- this must be an aligned address. */ return 1; } + +int +compare_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) +{ + return GET_CODE (op) == COMPARE; +} /* Initialize the table of extra 80387 mathematical constants. */ @@ -5779,45 +5821,40 @@ ix86_find_base_term (rtx x) bool legitimate_constant_p (rtx x) { - rtx inner; - switch (GET_CODE (x)) { - case SYMBOL_REF: - /* TLS symbols are not constant. */ - if (tls_symbolic_operand (x, Pmode)) - return false; - break; - case CONST: - inner = XEXP (x, 0); - - /* Offsets of TLS symbols are never valid. - Discourage CSE from creating them. */ - if (GET_CODE (inner) == PLUS - && tls_symbolic_operand (XEXP (inner, 0), Pmode)) - return false; + x = XEXP (x, 0); - if (GET_CODE (inner) == PLUS - || GET_CODE (inner) == MINUS) + if (GET_CODE (x) == PLUS) { - if (GET_CODE (XEXP (inner, 1)) != CONST_INT) + if (GET_CODE (XEXP (x, 1)) != CONST_INT) return false; - inner = XEXP (inner, 0); + x = XEXP (x, 0); } /* Only some unspecs are valid as "constants". */ - if (GET_CODE (inner) == UNSPEC) - switch (XINT (inner, 1)) + if (GET_CODE (x) == UNSPEC) + switch (XINT (x, 1)) { case UNSPEC_TPOFF: case UNSPEC_NTPOFF: - return local_exec_symbolic_operand (XVECEXP (inner, 0, 0), Pmode); + return local_exec_symbolic_operand (XVECEXP (x, 0, 0), Pmode); case UNSPEC_DTPOFF: - return local_dynamic_symbolic_operand (XVECEXP (inner, 0, 0), Pmode); + return local_dynamic_symbolic_operand (XVECEXP (x, 0, 0), Pmode); default: return false; } + + /* We must have drilled down to a symbol. */ + if (!symbolic_operand (x, Pmode)) + return false; + /* FALLTHRU */ + + case SYMBOL_REF: + /* TLS symbols are never valid. */ + if (tls_symbolic_operand (x, Pmode)) + return false; break; default: @@ -10613,10 +10650,11 @@ ix86_split_to_parts (rtx operand, rtx *parts, enum machine_mode mode) else if (GET_CODE (operand) == CONST_DOUBLE) { REAL_VALUE_TYPE r; - long l[3]; + long l[4]; REAL_VALUE_FROM_CONST_DOUBLE (r, operand); real_to_target (l, &r, mode); + /* Do not use shift by 32 to avoid warning on 32bit systems. */ if (HOST_BITS_PER_WIDE_INT >= 64) parts[0] @@ -10626,6 +10664,7 @@ ix86_split_to_parts (rtx operand, rtx *parts, enum machine_mode mode) DImode); else parts[0] = immed_double_const (l[0], l[1], DImode); + if (upper_mode == SImode) parts[1] = gen_int_mode (l[2], SImode); else if (HOST_BITS_PER_WIDE_INT >= 64) @@ -14901,10 +14940,29 @@ ix86_hard_regno_mode_ok (int regno, enum machine_mode mode) if (FP_REGNO_P (regno)) return VALID_FP_MODE_P (mode); if (SSE_REGNO_P (regno)) - return (TARGET_SSE ? VALID_SSE_REG_MODE (mode) : 0); + { + /* HACK! We didn't change all of the constraints for SSE1 for the + scalar modes on the branch. Fortunately, they're not required + for ABI compatibility. */ + if (!TARGET_SSE2 && !VECTOR_MODE_P (mode)) + return VALID_SSE_REG_MODE (mode); + + /* We implement the move patterns for all vector modes into and + out of SSE registers, even when no operation instructions + are available. */ + return (VALID_SSE_REG_MODE (mode) + || VALID_SSE2_REG_MODE (mode) + || VALID_MMX_REG_MODE (mode) + || VALID_MMX_REG_MODE_3DNOW (mode)); + } if (MMX_REGNO_P (regno)) - return (TARGET_MMX - ? VALID_MMX_REG_MODE (mode) || VALID_MMX_REG_MODE_3DNOW (mode) : 0); + { + /* We implement the move patterns for 3DNOW modes even in MMX mode, + so if the register is available at all, then we can move data of + the given mode into or out of it. */ + return (VALID_MMX_REG_MODE (mode) + || VALID_MMX_REG_MODE_3DNOW (mode)); + } /* We handle both integer and floats in the general purpose registers. In future we should be able to handle vector modes as well. */ if (!VALID_INT_MODE_P (mode) && !VALID_FP_MODE_P (mode)) @@ -15240,7 +15298,9 @@ ix86_rtx_costs (rtx x, int code, int outer_code, int *total) return false; case FLOAT_EXTEND: - if (!TARGET_SSE_MATH || !VALID_SSE_REG_MODE (mode)) + if (!TARGET_SSE_MATH + || mode == XFmode + || (mode == DFmode && !TARGET_SSE2)) *total = 0; return false; diff --git a/contrib/gcc/config/i386/i386.h b/contrib/gcc/config/i386/i386.h index 92132d1..694cc53 100644 --- a/contrib/gcc/config/i386/i386.h +++ b/contrib/gcc/config/i386/i386.h @@ -454,6 +454,10 @@ extern int x86_prefetch_sse; redefines this to 1. */ #define TARGET_MACHO 0 +/* Subtargets may reset this to 1 in order to enable 96-bit long double + with the rounding mode forced to 53 bits. */ +#define TARGET_96_ROUND_53_LONG_DOUBLE 0 + /* This macro is similar to `TARGET_SWITCHES' but defines names of command options that have values. Its definition is an initializer with a subgrouping for each command option. @@ -1068,14 +1072,11 @@ do { \ #define VALID_SSE2_REG_MODE(MODE) \ ((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \ - || (MODE) == V2DImode) + || (MODE) == V2DImode || (MODE) == DFmode) #define VALID_SSE_REG_MODE(MODE) \ ((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \ - || (MODE) == SFmode || (MODE) == TFmode \ - /* Always accept SSE2 modes so that xmmintrin.h compiles. */ \ - || VALID_SSE2_REG_MODE (MODE) \ - || (TARGET_SSE2 && ((MODE) == DFmode || VALID_MMX_REG_MODE (MODE)))) + || (MODE) == SFmode || (MODE) == TFmode) #define VALID_MMX_REG_MODE_3DNOW(MODE) \ ((MODE) == V2SFmode || (MODE) == SFmode) @@ -2999,7 +3000,8 @@ do { \ {"zero_extended_scalar_load_operand", {MEM}}, \ {"vector_move_operand", {CONST_VECTOR, SUBREG, REG, MEM}}, \ {"no_seg_address_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \ - LABEL_REF, SUBREG, REG, MEM, PLUS, MULT}}, + LABEL_REF, SUBREG, REG, MEM, PLUS, MULT}}, \ + {"compare_operator", {COMPARE}}, /* A list of predicates that do special things with modes, and so should not elicit warnings for VOIDmode match_operand. */ |