Add experimental support for amdfam10/barcelona from the GCC 4.3 branch.

Initial support for the AMD barcelona chipsets has been available in the
gcc43 branch under GPLv2 but was not included when the Core 2 support
was brought to the system gcc.

AMD and some linux distributions (OpenSUSE) did a backport of the amdfam10
support and made them available. Unfortunately this is still experimental
and while it can improve performance, enabling the CPUTYPE may break some
C++ ports (like clang).

Special care was taken to make sure that the patches predate the GPLv3
switch upstream.

Tested by:	Vladimir Kushnir
Reviewed by:	mm
Approved by:	jhb (mentor)
MFC after:	2 weeks

1 files changed, 9 insertions, 2 deletions

diff --git a/contrib/gcc/config/i386/driver-i386.c b/contrib/gcc/config/i386/driver-i386.c
index cb9c6c3..6658263 100644
--- a/contrib/gcc/config/i386/driver-i386.c
+++ b/contrib/gcc/config/i386/driver-i386.c
@@ -1,5 +1,5 @@
 /* Subroutines for the gcc driver.
-   Copyright (C) 2006 Free Software Foundation, Inc.
+   Copyright (C) 2006, 2007 Free Software Foundation, Inc.
 
 This file is part of GCC.
 
@@ -40,6 +40,7 @@ const char *host_detect_local_cpu (int argc, const char **argv);
 
 #define bit_SSE3 (1 << 0)
 #define bit_SSSE3 (1 << 9)
+#define bit_SSE4a (1 << 6)
 #define bit_CMPXCHG16B (1 << 13)
 
 #define bit_3DNOW (1 << 31)
@@ -68,7 +69,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
   unsigned int ext_level;
   unsigned char has_mmx = 0, has_3dnow = 0, has_3dnowp = 0, has_sse = 0;
   unsigned char has_sse2 = 0, has_sse3 = 0, has_ssse3 = 0, has_cmov = 0;
-  unsigned char has_longmode = 0, has_cmpxchg8b = 0;
+  unsigned char has_longmode = 0, has_cmpxchg8b = 0, has_sse4a = 0;
   unsigned char is_amd = 0;
   unsigned int family = 0;
   bool arch;
@@ -120,6 +121,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
       has_3dnow = !!(edx & bit_3DNOW);
       has_3dnowp = !!(edx & bit_3DNOWP);
       has_longmode = !!(edx & bit_LM);
+      has_sse4a = !!(ecx & bit_SSE4a);
     }
 
   is_amd = vendor == *(unsigned int*)"Auth";
@@ -132,6 +134,8 @@ const char *host_detect_local_cpu (int argc, const char **argv)
 	processor = PROCESSOR_ATHLON;
       if (has_sse2 || has_longmode)
 	processor = PROCESSOR_K8;
+      if (has_sse4a)
+	processor = PROCESSOR_AMDFAM10;
     }
   else
     {
@@ -266,6 +270,9 @@ const char *host_detect_local_cpu (int argc, const char **argv)
     case PROCESSOR_NOCONA:
       cpu = "nocona";
       break;
+    case PROCESSOR_AMDFAM10:
+      cpu = "amdfam10";
+      break;
     case PROCESSOR_GENERIC32:
     case PROCESSOR_GENERIC64:
       cpu = "generic";