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| author | kan <kan@FreeBSD.org> | 2004-07-28 03:11:36 +0000 |
|---|---|---|
| committer | kan <kan@FreeBSD.org> | 2004-07-28 03:11:36 +0000 |
| commit | e0020c9fe3d2c91658ad0f59cb6a55c44f909db3 (patch) | |
| tree | b406472295ae0b130894cc19f02f43b36157fec6 /contrib/gcc/config/alpha | |
| parent | b754d213ab76dee1e7bcd5acb4becd5658c0ca99 (diff) | |
| parent | 5e00ec74d8ce58f99801200d4d3d0412c7cc1b28 (diff) | |
| download | FreeBSD-src-e0020c9fe3d2c91658ad0f59cb6a55c44f909db3.zip FreeBSD-src-e0020c9fe3d2c91658ad0f59cb6a55c44f909db3.tar.gz | |
This commit was generated by cvs2svn to compensate for changes in r132718,
which included commits to RCS files with non-trunk default branches.
Diffstat (limited to 'contrib/gcc/config/alpha')
30 files changed, 871 insertions, 1259 deletions
diff --git a/contrib/gcc/config/alpha/alpha-modes.def b/contrib/gcc/config/alpha/alpha-modes.def new file mode 100644 index 0000000..8e9e698 --- /dev/null +++ b/contrib/gcc/config/alpha/alpha-modes.def @@ -0,0 +1,23 @@ +/* Alpha extra machine modes. + Copyright (C) 2003 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +/* 128-bit floating point. This gets reset in alpha_override_options + if VAX float format is in use. */ +FLOAT_MODE (TF, 16, ieee_quad_format); diff --git a/contrib/gcc/config/alpha/alpha-protos.h b/contrib/gcc/config/alpha/alpha-protos.h index fe4943b..95f1ad2 100644 --- a/contrib/gcc/config/alpha/alpha-protos.h +++ b/contrib/gcc/config/alpha/alpha-protos.h @@ -1,182 +1,123 @@ /* Prototypes for alpha.c functions used in the md file & elsewhere. - Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc. + Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ extern int alpha_next_sequence_number; -extern void literal_section PARAMS ((void)); -extern void override_options PARAMS ((void)); -extern int zap_mask PARAMS ((HOST_WIDE_INT)); -extern int direct_return PARAMS ((void)); - -extern int alpha_sa_size PARAMS ((void)); -extern int alpha_pv_save_size PARAMS ((void)); -extern int alpha_using_fp PARAMS ((void)); -extern void alpha_write_verstamp PARAMS ((FILE *)); -extern void alpha_expand_prologue PARAMS ((void)); -extern void alpha_expand_epilogue PARAMS ((void)); -extern void alpha_output_filename PARAMS ((FILE *, const char *)); -extern void alpha_output_lineno PARAMS ((FILE *, int)); - -extern int reg_or_0_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_or_6bit_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_or_8bit_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_or_const_int_operand PARAMS ((rtx, enum machine_mode)); -extern int cint8_operand PARAMS ((rtx, enum machine_mode)); -extern int add_operand PARAMS ((rtx, enum machine_mode)); -extern int sext_add_operand PARAMS ((rtx, enum machine_mode)); -extern int const48_operand PARAMS ((rtx, enum machine_mode)); -extern int and_operand PARAMS ((rtx, enum machine_mode)); -extern int or_operand PARAMS ((rtx, enum machine_mode)); -extern int mode_width_operand PARAMS ((rtx, enum machine_mode)); -extern int mode_mask_operand PARAMS ((rtx, enum machine_mode)); -extern int mul8_operand PARAMS ((rtx, enum machine_mode)); -extern int const0_operand PARAMS ((rtx, enum machine_mode)); -extern int hard_fp_register_operand PARAMS ((rtx, enum machine_mode)); -extern int hard_int_register_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_or_cint_operand PARAMS ((rtx, enum machine_mode)); -extern int some_operand PARAMS ((rtx, enum machine_mode)); -extern int some_ni_operand PARAMS ((rtx, enum machine_mode)); -extern int input_operand PARAMS ((rtx, enum machine_mode)); -extern int current_file_function_operand PARAMS ((rtx, enum machine_mode)); -extern int direct_call_operand PARAMS ((rtx, enum machine_mode)); -extern int local_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int small_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int some_small_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int global_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int dtp16_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int dtp32_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int gotdtp_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int tp16_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int tp32_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int gottp_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int call_operand PARAMS ((rtx, enum machine_mode)); -extern int symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int alpha_comparison_operator PARAMS ((rtx, enum machine_mode)); -extern int alpha_zero_comparison_operator PARAMS ((rtx, enum machine_mode)); -extern int alpha_swapped_comparison_operator PARAMS ((rtx, enum machine_mode)); -extern int signed_comparison_operator PARAMS ((rtx, enum machine_mode)); -extern int alpha_fp_comparison_operator PARAMS ((rtx, enum machine_mode)); -extern int divmod_operator PARAMS ((rtx, enum machine_mode)); -extern int aligned_memory_operand PARAMS ((rtx, enum machine_mode)); -extern int unaligned_memory_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_or_unaligned_mem_operand PARAMS ((rtx, enum machine_mode)); -extern int any_memory_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_not_elim_operand PARAMS ((rtx, enum machine_mode)); -extern int normal_memory_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_no_subreg_operand PARAMS ((rtx, enum machine_mode)); -extern int addition_operation PARAMS ((rtx, enum machine_mode)); - -extern bool alpha_const_ok_for_letter_p PARAMS ((HOST_WIDE_INT, int)); -extern bool alpha_const_double_ok_for_letter_p PARAMS ((rtx, int)); -extern bool alpha_extra_constraint PARAMS ((rtx, int)); - -extern rtx alpha_tablejump_addr_vec PARAMS ((rtx)); -extern rtx alpha_tablejump_best_label PARAMS ((rtx)); - -extern bool alpha_legitimate_address_p PARAMS ((enum machine_mode, rtx, int)); -extern rtx alpha_legitimize_address PARAMS ((rtx, rtx, enum machine_mode)); -extern rtx alpha_legitimize_reload_address PARAMS ((rtx, enum machine_mode, - int, int, int)); - -extern rtx split_small_symbolic_operand PARAMS ((rtx)); - -extern void get_aligned_mem PARAMS ((rtx, rtx *, rtx *)); -extern rtx get_unaligned_address PARAMS ((rtx, int)); -extern enum reg_class alpha_preferred_reload_class PARAMS ((rtx, - enum reg_class)); -extern enum reg_class secondary_reload_class PARAMS ((enum reg_class, - enum machine_mode, - rtx, int)); - -extern void alpha_set_memflags PARAMS ((rtx, rtx)); -extern rtx alpha_emit_set_const PARAMS ((rtx, enum machine_mode, - HOST_WIDE_INT, int)); -extern rtx alpha_emit_set_long_const PARAMS ((rtx, HOST_WIDE_INT, - HOST_WIDE_INT)); -extern bool alpha_expand_mov PARAMS ((enum machine_mode, rtx *)); -extern bool alpha_expand_mov_nobwx PARAMS ((enum machine_mode, rtx *)); -extern void alpha_emit_floatuns PARAMS ((rtx[])); -extern rtx alpha_emit_conditional_move PARAMS ((rtx, enum machine_mode)); -extern void alpha_split_tfmode_pair PARAMS ((rtx[])); -extern void alpha_split_tfmode_frobsign PARAMS ((rtx[], - rtx (*)(rtx, rtx, rtx))); -extern void alpha_expand_unaligned_load PARAMS ((rtx, rtx, HOST_WIDE_INT, - HOST_WIDE_INT, int)); -extern void alpha_expand_unaligned_store PARAMS ((rtx, rtx, HOST_WIDE_INT, - HOST_WIDE_INT)); -extern int alpha_expand_block_move PARAMS ((rtx [])); -extern int alpha_expand_block_clear PARAMS ((rtx [])); -extern rtx alpha_expand_zap_mask PARAMS ((HOST_WIDE_INT)); -extern void alpha_expand_builtin_vector_binop PARAMS ((rtx (*)(rtx, rtx, rtx), - enum machine_mode, - rtx, rtx, rtx)); -extern rtx alpha_return_addr PARAMS ((int, rtx)); -extern rtx alpha_gp_save_rtx PARAMS ((void)); -extern void print_operand PARAMS ((FILE *, rtx, int)); -extern void print_operand_address PARAMS ((FILE *, rtx)); -extern void alpha_initialize_trampoline PARAMS ((rtx, rtx, rtx, int, int, int)); -extern void alpha_reorg PARAMS ((rtx)); - -extern tree alpha_build_va_list PARAMS ((void)); -extern void alpha_va_start PARAMS ((tree, rtx)); -extern rtx alpha_va_arg PARAMS ((tree, tree)); -extern rtx function_arg PARAMS ((CUMULATIVE_ARGS, enum machine_mode, - tree, int)); -extern void alpha_start_function PARAMS ((FILE *, const char *, tree)); -extern void alpha_end_function PARAMS ((FILE *, const char *, tree)); - -extern int alpha_find_lo_sum_using_gp PARAMS ((rtx)); +extern void literal_section (void); +extern void override_options (void); +extern int zap_mask (HOST_WIDE_INT); +extern int direct_return (void); + +extern int alpha_sa_size (void); +extern HOST_WIDE_INT alpha_initial_elimination_offset (unsigned int, + unsigned int); +extern int alpha_pv_save_size (void); +extern int alpha_using_fp (void); +extern void alpha_expand_prologue (void); +extern void alpha_expand_epilogue (void); +extern void alpha_output_filename (FILE *, const char *); +extern void alpha_output_lineno (FILE *, int); + +extern bool alpha_const_ok_for_letter_p (HOST_WIDE_INT, int); +extern bool alpha_const_double_ok_for_letter_p (rtx, int); +extern bool alpha_extra_constraint (rtx, int); + +extern rtx alpha_tablejump_addr_vec (rtx); +extern rtx alpha_tablejump_best_label (rtx); + +extern bool alpha_legitimate_address_p (enum machine_mode, rtx, int); +extern rtx alpha_legitimize_address (rtx, rtx, enum machine_mode); +extern rtx alpha_legitimize_reload_address (rtx, enum machine_mode, + int, int, int); + +extern rtx split_small_symbolic_operand (rtx); + +extern void get_aligned_mem (rtx, rtx *, rtx *); +extern rtx get_unaligned_address (rtx, int); +extern enum reg_class alpha_preferred_reload_class (rtx, enum reg_class); +extern enum reg_class secondary_reload_class (enum reg_class, + enum machine_mode, rtx, int); + +extern void alpha_set_memflags (rtx, rtx); +extern rtx alpha_emit_set_const (rtx, enum machine_mode, HOST_WIDE_INT, int); +extern rtx alpha_emit_set_long_const (rtx, HOST_WIDE_INT, HOST_WIDE_INT); +extern bool alpha_expand_mov (enum machine_mode, rtx *); +extern bool alpha_expand_mov_nobwx (enum machine_mode, rtx *); +extern void alpha_emit_floatuns (rtx[]); +extern rtx alpha_emit_conditional_move (rtx, enum machine_mode); +extern void alpha_split_tfmode_pair (rtx[]); +extern void alpha_split_tfmode_frobsign (rtx[], rtx (*)(rtx, rtx, rtx)); +extern void alpha_expand_unaligned_load (rtx, rtx, HOST_WIDE_INT, + HOST_WIDE_INT, int); +extern void alpha_expand_unaligned_store (rtx, rtx, HOST_WIDE_INT, + HOST_WIDE_INT); +extern int alpha_expand_block_move (rtx []); +extern int alpha_expand_block_clear (rtx []); +extern rtx alpha_expand_zap_mask (HOST_WIDE_INT); +extern void alpha_expand_builtin_vector_binop (rtx (*)(rtx, rtx, rtx), + enum machine_mode, + rtx, rtx, rtx); +extern rtx alpha_return_addr (int, rtx); +extern rtx alpha_gp_save_rtx (void); +extern void print_operand (FILE *, rtx, int); +extern void print_operand_address (FILE *, rtx); +extern void alpha_initialize_trampoline (rtx, rtx, rtx, int, int, int); + +extern void alpha_va_start (tree, rtx); +extern rtx alpha_va_arg (tree, tree); +extern rtx function_arg (CUMULATIVE_ARGS, enum machine_mode, tree, int); +extern rtx function_value (tree, tree, enum machine_mode); + +extern void alpha_start_function (FILE *, const char *, tree); +extern void alpha_end_function (FILE *, const char *, tree); + +extern int alpha_find_lo_sum_using_gp (rtx); #ifdef REAL_VALUE_TYPE -extern int check_float_value PARAMS ((enum machine_mode, - REAL_VALUE_TYPE *, int)); +extern int check_float_value (enum machine_mode, REAL_VALUE_TYPE *, int); #endif #ifdef RTX_CODE -extern rtx alpha_emit_conditional_branch PARAMS ((enum rtx_code)); -extern rtx alpha_emit_setcc PARAMS ((enum rtx_code)); -extern int alpha_split_conditional_move PARAMS ((enum rtx_code, rtx, rtx, - rtx, rtx)); -extern void alpha_emit_xfloating_arith PARAMS ((enum rtx_code, rtx[])); -extern void alpha_emit_xfloating_cvt PARAMS ((enum rtx_code, rtx[])); +extern rtx alpha_emit_conditional_branch (enum rtx_code); +extern rtx alpha_emit_setcc (enum rtx_code); +extern int alpha_split_conditional_move (enum rtx_code, rtx, rtx, rtx, rtx); +extern void alpha_emit_xfloating_arith (enum rtx_code, rtx[]); +extern void alpha_emit_xfloating_cvt (enum rtx_code, rtx[]); #endif -extern rtx alpha_need_linkage PARAMS ((const char *, int)); -extern rtx alpha_use_linkage PARAMS ((rtx, tree, int, int)); +extern rtx alpha_need_linkage (const char *, int); +extern rtx alpha_use_linkage (rtx, tree, int, int); #if TARGET_ABI_OPEN_VMS -#ifdef HAVE_MACHINE_MODES -extern enum avms_arg_type alpha_arg_type PARAMS ((enum machine_mode)); +extern enum avms_arg_type alpha_arg_type (enum machine_mode); +extern rtx alpha_arg_info_reg_val (CUMULATIVE_ARGS); #endif -extern rtx alpha_arg_info_reg_val PARAMS ((CUMULATIVE_ARGS)); -#endif /* TARGET_ABI_OPEN_VMS */ -extern rtx unicosmk_add_call_info_word PARAMS ((rtx)); +extern rtx unicosmk_add_call_info_word (rtx); #if TARGET_ABI_UNICOSMK -extern void unicosmk_defer_case_vector PARAMS ((rtx, rtx)); -extern void unicosmk_add_extern PARAMS ((const char *)); -extern void unicosmk_output_align PARAMS ((FILE *, int)); -extern char * unicosmk_text_section PARAMS ((void)); -extern char * unicosmk_data_section PARAMS ((void)); -extern void unicosmk_asm_file_start PARAMS ((FILE *)); -extern void unicosmk_asm_file_end PARAMS ((FILE *)); -extern void unicosmk_output_common PARAMS ((FILE *, const char *, int, int)); -#endif /* TARGET_ABI_UNICOSMK */ +extern void unicosmk_defer_case_vector (rtx, rtx); +extern void unicosmk_add_extern (const char *); +extern void unicosmk_output_align (FILE *, int); +extern char * unicosmk_text_section (void); +extern char * unicosmk_data_section (void); +extern void unicosmk_output_common (FILE *, const char *, int, int); +extern int unicosmk_initial_elimination_offset (int, int); +#endif diff --git a/contrib/gcc/config/alpha/alpha.h b/contrib/gcc/config/alpha/alpha.h index 6b52700..d59797c 100644 --- a/contrib/gcc/config/alpha/alpha.h +++ b/contrib/gcc/config/alpha/alpha.h @@ -1,22 +1,22 @@ /* Definitions of target machine for GNU compiler, for DEC Alpha. Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002 Free Software Foundation, Inc. + 2000, 2001, 2002, 2004 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -67,6 +67,8 @@ Boston, MA 02111-1307, USA. */ builtin_define ("_IEEE_FP"); \ if (TARGET_IEEE_WITH_INEXACT) \ builtin_define ("_IEEE_FP_INEXACT"); \ + if (TARGET_LONG_DOUBLE_128) \ + builtin_define ("__LONG_DOUBLE_128__"); \ \ /* Macros dependent on the C dialect. */ \ SUBTARGET_LANGUAGE_CPP_BUILTINS(); \ @@ -78,14 +80,14 @@ Boston, MA 02111-1307, USA. */ { \ if (preprocessing_asm_p ()) \ builtin_define_std ("LANGUAGE_ASSEMBLY"); \ - else if (c_language == clk_c) \ - builtin_define_std ("LANGUAGE_C"); \ - else if (c_language == clk_cplusplus) \ + else if (c_dialect_cxx ()) \ { \ builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \ builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \ } \ - if (flag_objc) \ + else \ + builtin_define_std ("LANGUAGE_C"); \ + if (c_dialect_objc ()) \ { \ builtin_define ("__LANGUAGE_OBJECTIVE_C"); \ builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \ @@ -112,9 +114,12 @@ Boston, MA 02111-1307, USA. */ mirrors this list, so changes to alpha.md must be made at the same time. */ enum processor_type - {PROCESSOR_EV4, /* 2106[46]{a,} */ +{ + PROCESSOR_EV4, /* 2106[46]{a,} */ PROCESSOR_EV5, /* 21164{a,pc,} */ - PROCESSOR_EV6}; /* 21264 */ + PROCESSOR_EV6, /* 21264 */ + PROCESSOR_MAX +}; extern enum processor_type alpha_cpu; @@ -222,6 +227,15 @@ extern int alpha_tls_size; #define MASK_TLS_KERNEL (1 << 14) #define TARGET_TLS_KERNEL (target_flags & MASK_TLS_KERNEL) +/* This means use direct branches to local functions. */ +#define MASK_SMALL_TEXT (1 << 15) +#define TARGET_SMALL_TEXT (target_flags & MASK_SMALL_TEXT) + +/* This means use IEEE quad-format for long double. Assumes the + presence of the GEM support library routines. */ +#define MASK_LONG_DOUBLE_128 (1 << 16) +#define TARGET_LONG_DOUBLE_128 (target_flags & MASK_LONG_DOUBLE_128) + /* This means that the processor is an EV5, EV56, or PCA56. Unlike alpha_cpu this is not affected by -mtune= setting. */ #define MASK_CPU_EV5 (1 << 28) @@ -254,7 +268,7 @@ extern int alpha_tls_size; #define TARGET_CAN_FAULT_IN_PROLOGUE 0 #endif #ifndef TARGET_HAS_XFLOATING_LIBS -#define TARGET_HAS_XFLOATING_LIBS 0 +#define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128 #endif #ifndef TARGET_PROFILING_NEEDS_GP #define TARGET_PROFILING_NEEDS_GP 0 @@ -310,8 +324,15 @@ extern int alpha_tls_size; N_("Emit 16-bit relocations to the small data areas")}, \ {"large-data", -MASK_SMALL_DATA, \ N_("Emit 32-bit relocations to the small data areas")}, \ + {"small-text", MASK_SMALL_TEXT, \ + N_("Emit direct branches to local functions")}, \ + {"large-text", -MASK_SMALL_TEXT, ""}, \ {"tls-kernel", MASK_TLS_KERNEL, \ N_("Emit rdval instead of rduniq for thread pointer")}, \ + {"long-double-128", MASK_LONG_DOUBLE_128, \ + N_("Use 128-bit long double")}, \ + {"long-double-64", -MASK_LONG_DOUBLE_128, \ + N_("Use 64-bit long double")}, \ {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT \ | TARGET_DEFAULT_EXPLICIT_RELOCS, ""} } @@ -340,27 +361,34 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ #define TARGET_OPTIONS \ { \ {"cpu=", &alpha_cpu_string, \ - N_("Use features of and schedule given CPU")}, \ + N_("Use features of and schedule given CPU"), 0}, \ {"tune=", &alpha_tune_string, \ - N_("Schedule given CPU")}, \ + N_("Schedule given CPU"), 0}, \ {"fp-rounding-mode=", &alpha_fprm_string, \ - N_("Control the generated fp rounding mode")}, \ + N_("Control the generated fp rounding mode"), 0}, \ {"fp-trap-mode=", &alpha_fptm_string, \ - N_("Control the IEEE trap mode")}, \ + N_("Control the IEEE trap mode"), 0}, \ {"trap-precision=", &alpha_tp_string, \ - N_("Control the precision given to fp exceptions")}, \ + N_("Control the precision given to fp exceptions"), 0}, \ {"memory-latency=", &alpha_mlat_string, \ - N_("Tune expected memory latency")}, \ + N_("Tune expected memory latency"), 0}, \ {"tls-size=", &alpha_tls_size_string, \ - N_("Specify bit size of immediate TLS offsets")}, \ + N_("Specify bit size of immediate TLS offsets"), 0}, \ } +/* Support for a compile-time default CPU, et cetera. The rules are: + --with-cpu is ignored if -mcpu is specified. + --with-tune is ignored if -mtune is specified. */ +#define OPTION_DEFAULT_SPECS \ + {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \ + {"tune", "%{!mtune=*:-mtune=%(VALUE)}" } + /* This macro defines names of additional specifications to put in the specs that can be used in various specifications like CC1_SPEC. Its definition is an initializer with a subgrouping for each command option. Each subgrouping contains a string constant, that defines the - specification name, and a string constant that used by the GNU CC driver + specification name, and a string constant that used by the GCC driver program. Do not define this macro if it does not need to do anything. */ @@ -421,7 +449,18 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ #define FLOAT_TYPE_SIZE 32 #define DOUBLE_TYPE_SIZE 64 -#define LONG_DOUBLE_TYPE_SIZE 64 +#define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64) + +/* Define this to set long double type size to use in libgcc2.c, which can + not depend on target_flags. */ +#ifdef __LONG_DOUBLE_128__ +#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128 +#else +#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 +#endif + +/* Work around target_flags dependency in ada/targtyps.c. */ +#define WIDEST_HARDWARE_FP_SIZE 64 #define WCHAR_TYPE "unsigned int" #define WCHAR_TYPE_SIZE 32 @@ -444,15 +483,6 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ (MODE) = DImode; \ } -/* Define this if function arguments should also be promoted using the above - procedure. */ - -#define PROMOTE_FUNCTION_ARGS - -/* Likewise, if the function return value is promoted. */ - -#define PROMOTE_FUNCTION_RETURN - /* Define this if most significant bit is lowest numbered in instructions that operate on numbered bit-fields. @@ -482,7 +512,7 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ #define PARM_BOUNDARY 64 /* Boundary (in *bits*) on which stack pointer should be aligned. */ -#define STACK_BOUNDARY 64 +#define STACK_BOUNDARY 128 /* Allocation boundary (in *bits*) for the code of a function. */ #define FUNCTION_BOUNDARY 32 @@ -571,44 +601,30 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } /* List the order in which to allocate registers. Each register must be - listed once, even those in FIXED_REGISTERS. - - We allocate in the following order: - $f10-$f15 (nonsaved floating-point register) - $f22-$f30 (likewise) - $f21-$f16 (likewise, but input args) - $f0 (nonsaved, but return value) - $f1 (nonsaved, but immediate before saved) - $f2-$f9 (saved floating-point registers) - $1-$8 (nonsaved integer registers) - $22-$25 (likewise) - $28 (likewise) - $0 (likewise, but return value) - $21-$16 (likewise, but input args) - $27 (procedure value in OSF, nonsaved in NT) - $9-$14 (saved integer registers) - $26 (return PC) - $15 (frame pointer) - $29 (global pointer) - $30, $31, $f31 (stack pointer and always zero/ap & fp) */ - -#define REG_ALLOC_ORDER \ - {42, 43, 44, 45, 46, 47, \ - 54, 55, 56, 57, 58, 59, 60, 61, 62, \ - 53, 52, 51, 50, 49, 48, \ - 32, 33, \ - 34, 35, 36, 37, 38, 39, 40, 41, \ - 1, 2, 3, 4, 5, 6, 7, 8, \ - 22, 23, 24, 25, \ - 28, \ - 0, \ - 21, 20, 19, 18, 17, 16, \ - 27, \ - 9, 10, 11, 12, 13, 14, \ - 26, \ - 15, \ - 29, \ - 30, 31, 63 } + listed once, even those in FIXED_REGISTERS. */ + +#define REG_ALLOC_ORDER { \ + 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \ + 22, 23, 24, 25, 28, /* likewise */ \ + 0, /* likewise, but return value */ \ + 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \ + 27, /* likewise, but OSF procedure value */ \ + \ + 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \ + 54, 55, 56, 57, 58, 59, /* likewise */ \ + 60, 61, 62, /* likewise */ \ + 32, 33, /* likewise, but return values */ \ + 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \ + \ + 9, 10, 11, 12, 13, 14, /* saved integer registers */ \ + 26, /* return address */ \ + 15, /* hard frame pointer */ \ + \ + 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \ + 40, 41, /* likewise */ \ + \ + 29, 30, 31, 63 /* gp, sp, ap, sfp */ \ +} /* Return number of consecutive hard regs needed starting at reg REGNO to hold something of mode MODE. @@ -620,12 +636,11 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. On Alpha, the integer registers can hold any mode. The floating-point - registers can hold 32-bit and 64-bit integers as well, but not 16-bit - or 8-bit values. */ + registers can hold 64-bit integers as well, but not smaller values. */ #define HARD_REGNO_MODE_OK(REGNO, MODE) \ ((REGNO) >= 32 && (REGNO) <= 62 \ - ? GET_MODE_UNIT_SIZE (MODE) == 8 || GET_MODE_UNIT_SIZE (MODE) == 4 \ + ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \ : 1) /* Value is 1 if MODE is a supported vector mode. */ @@ -686,11 +701,6 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ current_file functions. Moreover, we do not expose the ldgp until after reload, so we're probably safe. */ /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */ - -/* Register in which address to store a structure value - arrives in the function. On the Alpha, the address is passed - as a hidden argument. */ -#define STRUCT_VALUE 0 /* Define the classes of registers for register constraints in the machine description. Also define ranges of constants. @@ -810,7 +820,7 @@ enum reg_class { 'U' is a symbolic operand. - 'W' is a vector zero. */ + 'W' is a vector zero. */ #define EXTRA_CONSTRAINT alpha_extra_constraint @@ -953,19 +963,8 @@ extern int alpha_memory_latency; /* Define the offset between two registers, one to be eliminated, and the other its replacement, at the start of a routine. */ -#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ -{ if ((FROM) == FRAME_POINTER_REGNUM) \ - (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ - + alpha_sa_size ()); \ - else if ((FROM) == ARG_POINTER_REGNUM) \ - (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ - + alpha_sa_size () \ - + (ALPHA_ROUND (get_frame_size () \ - + current_function_pretend_args_size) \ - - current_function_pretend_args_size)); \ - else \ - abort (); \ -} +#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ + ((OFFSET) = alpha_initial_elimination_offset(FROM, TO)) /* Define this if stack space is still allocated for a parameter passed in a register. */ @@ -988,37 +987,14 @@ extern int alpha_memory_latency; On Alpha the value is found in $0 for integer functions and $f0 for floating-point functions. */ -#define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \ - && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ - || POINTER_TYPE_P (VALTYPE)) \ - ? word_mode : TYPE_MODE (VALTYPE), \ - ((TARGET_FPREGS \ - && (TREE_CODE (VALTYPE) == REAL_TYPE \ - || TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \ - ? 32 : 0)) +#define FUNCTION_VALUE(VALTYPE, FUNC) \ + function_value (VALTYPE, FUNC, VOIDmode) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) \ - gen_rtx_REG (MODE, \ - (TARGET_FPREGS \ - && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ - || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ - ? 32 : 0)) - -/* The definition of this macro implies that there are cases where - a scalar value cannot be returned in registers. - - For the Alpha, any structure or union type is returned in memory, as - are integers whose size is larger than 64 bits. */ - -#define RETURN_IN_MEMORY(TYPE) \ - (TYPE_MODE (TYPE) == BLKmode \ - || TYPE_MODE (TYPE) == TFmode \ - || TYPE_MODE (TYPE) == TCmode \ - || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64)) +#define LIBCALL_VALUE(MODE) \ + function_value (NULL, NULL, MODE) /* 1 if N is a possible register number for a function value as seen by the caller. */ @@ -1048,7 +1024,8 @@ extern int alpha_memory_latency; for a call to a function whose data type is FNTYPE. For a library call, FNTYPE is 0. */ -#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) (CUM) = 0 +#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ + (CUM) = 0 /* Define intermediate macro to compute the size (in registers) of an argument for the Alpha. */ @@ -1096,13 +1073,6 @@ extern int alpha_memory_latency; #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ ((MODE) == TFmode || (MODE) == TCmode) -/* Specify the padding direction of arguments. - - On the Alpha, we must pad upwards in order to be able to pass args in - registers. */ - -#define FUNCTION_ARG_PADDING(MODE, TYPE) upward - /* For an arg passed partly in registers and partly in memory, this is the number of registers used. For args passed entirely in registers or entirely in memory, zero. */ @@ -1111,68 +1081,6 @@ extern int alpha_memory_latency; ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \ ? 6 - (CUM) : 0) -/* Perform any needed actions needed for a function that is receiving a - variable number of arguments. - - CUM is as above. - - MODE and TYPE are the mode and type of the current parameter. - - PRETEND_SIZE is a variable that should be set to the amount of stack - that must be pushed by the prolog to pretend that our caller pushed - it. - - Normally, this macro will push all remaining incoming registers on the - stack and set PRETEND_SIZE to the length of the registers pushed. - - On the Alpha, we allocate space for all 12 arg registers, but only - push those that are remaining. - - However, if NO registers need to be saved, don't allocate any space. - This is not only because we won't need the space, but because AP includes - the current_pretend_args_size and we don't want to mess up any - ap-relative addresses already made. - - If we are not to use the floating-point registers, save the integer - registers where we would put the floating-point registers. This is - not the most efficient way to implement varargs with just one register - class, but it isn't worth doing anything more efficient in this rare - case. */ - -#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ -{ if ((CUM) < 6) \ - { \ - if (! (NO_RTL)) \ - { \ - rtx tmp; int set = get_varargs_alias_set (); \ - tmp = gen_rtx_MEM (BLKmode, \ - plus_constant (virtual_incoming_args_rtx, \ - ((CUM) + 6)* UNITS_PER_WORD)); \ - set_mem_alias_set (tmp, set); \ - move_block_from_reg \ - (16 + CUM, tmp, \ - 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ - \ - tmp = gen_rtx_MEM (BLKmode, \ - plus_constant (virtual_incoming_args_rtx, \ - (CUM) * UNITS_PER_WORD)); \ - set_mem_alias_set (tmp, set); \ - move_block_from_reg \ - (16 + (TARGET_FPREGS ? 32 : 0) + CUM, tmp, \ - 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ - } \ - PRETEND_SIZE = 12 * UNITS_PER_WORD; \ - } \ -} - -/* We do not allow indirect calls to be optimized into sibling calls, nor - can we allow a call to a function in a different compilation unit to - be optimized into a sibcall. */ -#define FUNCTION_OK_FOR_SIBCALL(DECL) \ - (DECL \ - && (! TREE_PUBLIC (DECL) \ - || (TREE_ASM_WRITTEN (DECL) && (*targetm.binds_local_p) (DECL)))) - /* Try to output insns to set TARGET equal to the constant C if it can be done in less than N insns. Do all computations in MODE. Returns the place where the output has been placed if it can be done and the insns have been @@ -1212,6 +1120,10 @@ extern struct alpha_compare alpha_compare; #define PROFILE_BEFORE_PROLOGUE 1 +/* Never use profile counters. */ + +#define NO_PROFILE_COUNTERS 1 + /* Output assembler code to FILE to increment profiler label # LABELNO for profiling a function entry. Under OSF/1, profiling is enabled by simply passing -pg to the assembler and linker. */ @@ -1287,12 +1199,6 @@ do { \ /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT 0 */ -/* #define HAVE_POST_DECREMENT 0 */ - -/* #define HAVE_PRE_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT 0 */ - /* Macros to check register numbers against specific register classes. */ /* These assume that REGNO is a hard or pseudo reg number. @@ -1417,14 +1323,6 @@ do { \ #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ { if (GET_CODE (ADDR) == AND) goto LABEL; } - -/* Compute the cost of an address. For the Alpha, all valid addresses are - the same cost. */ - -#define ADDRESS_COST(X) 0 - -/* Machine-dependent reorg pass. */ -#define MACHINE_DEPENDENT_REORG(X) alpha_reorg(X) /* Specify the machine mode that this machine uses for the index in the tablejump instruction. */ @@ -1443,14 +1341,6 @@ do { \ /* Define this as 1 if `char' should by default be signed; else as 0. */ #define DEFAULT_SIGNED_CHAR 1 -/* This flag, if defined, says the same insns that convert to a signed fixnum - also convert validly to an unsigned one. - - We actually lie a bit here as overflow conditions are different. But - they aren't being checked anyway. */ - -#define FIXUNS_TRUNC_LIKE_FIX_TRUNC - /* Max number of bytes we can move to or from memory in one reasonably fast instruction. */ @@ -1494,10 +1384,9 @@ do { \ is done just by pretending it is already truncated. */ #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 -/* We assume that the store-condition-codes instructions store 0 for false - and some other value for true. This is the value stored for true. */ - -#define STORE_FLAG_VALUE 1 +/* The CIX ctlz and cttz instructions return 64 for zero. */ +#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX) +#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX) /* Define the value returned by a floating-point comparison instruction. */ @@ -1548,162 +1437,6 @@ do { \ /* Define this to be nonzero if shift instructions ignore all but the low-order few bits. */ #define SHIFT_COUNT_TRUNCATED 1 - -/* Compute the cost of computing a constant rtl expression RTX - whose rtx-code is CODE. The body of this macro is a portion - of a switch statement. If the code is computed here, - return it with a return statement. Otherwise, break from the switch. - - If this is an 8-bit constant, return zero since it can be used - nearly anywhere with no cost. If it is a valid operand for an - ADD or AND, likewise return 0 if we know it will be used in that - context. Otherwise, return 2 since it might be used there later. - All other constants take at least two insns. */ - -#define CONST_COSTS(RTX,CODE,OUTER_CODE) \ - case CONST_INT: \ - if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \ - return 0; \ - case CONST_DOUBLE: \ - if ((RTX) == CONST0_RTX (GET_MODE (RTX))) \ - return 0; \ - else if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \ - || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \ - return 0; \ - else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \ - return 2; \ - else \ - return COSTS_N_INSNS (2); \ - case CONST: \ - case SYMBOL_REF: \ - case LABEL_REF: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - return COSTS_N_INSNS (3); \ - case PROCESSOR_EV5: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (2); \ - default: abort(); \ - } - -/* Provide the costs of a rtl expression. This is in the body of a - switch on CODE. */ - -#define RTX_COSTS(X,CODE,OUTER_CODE) \ - case PLUS: case MINUS: \ - if (FLOAT_MODE_P (GET_MODE (X))) \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - return COSTS_N_INSNS (6); \ - case PROCESSOR_EV5: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (4); \ - default: abort(); \ - } \ - else if (GET_CODE (XEXP (X, 0)) == MULT \ - && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \ - return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \ - + rtx_cost (XEXP (X, 1), OUTER_CODE)); \ - break; \ - case MULT: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - if (FLOAT_MODE_P (GET_MODE (X))) \ - return COSTS_N_INSNS (6); \ - return COSTS_N_INSNS (23); \ - case PROCESSOR_EV5: \ - if (FLOAT_MODE_P (GET_MODE (X))) \ - return COSTS_N_INSNS (4); \ - else if (GET_MODE (X) == DImode) \ - return COSTS_N_INSNS (12); \ - else \ - return COSTS_N_INSNS (8); \ - case PROCESSOR_EV6: \ - if (FLOAT_MODE_P (GET_MODE (X))) \ - return COSTS_N_INSNS (4); \ - else \ - return COSTS_N_INSNS (7); \ - default: abort(); \ - } \ - case ASHIFT: \ - if (GET_CODE (XEXP (X, 1)) == CONST_INT \ - && INTVAL (XEXP (X, 1)) <= 3) \ - break; \ - /* ... fall through ... */ \ - case ASHIFTRT: case LSHIFTRT: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - return COSTS_N_INSNS (2); \ - case PROCESSOR_EV5: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (1); \ - default: abort(); \ - } \ - case IF_THEN_ELSE: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (2); \ - case PROCESSOR_EV5: \ - return COSTS_N_INSNS (1); \ - default: abort(); \ - } \ - case DIV: case UDIV: case MOD: case UMOD: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - if (GET_MODE (X) == SFmode) \ - return COSTS_N_INSNS (34); \ - else if (GET_MODE (X) == DFmode) \ - return COSTS_N_INSNS (63); \ - else \ - return COSTS_N_INSNS (70); \ - case PROCESSOR_EV5: \ - if (GET_MODE (X) == SFmode) \ - return COSTS_N_INSNS (15); \ - else if (GET_MODE (X) == DFmode) \ - return COSTS_N_INSNS (22); \ - else \ - return COSTS_N_INSNS (70); /* ??? */ \ - case PROCESSOR_EV6: \ - if (GET_MODE (X) == SFmode) \ - return COSTS_N_INSNS (12); \ - else if (GET_MODE (X) == DFmode) \ - return COSTS_N_INSNS (15); \ - else \ - return COSTS_N_INSNS (70); /* ??? */ \ - default: abort(); \ - } \ - case MEM: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (3); \ - case PROCESSOR_EV5: \ - return COSTS_N_INSNS (2); \ - default: abort(); \ - } \ - case NEG: case ABS: \ - if (! FLOAT_MODE_P (GET_MODE (X))) \ - break; \ - /* ... fall through ... */ \ - case FLOAT: case UNSIGNED_FLOAT: case FIX: case UNSIGNED_FIX: \ - case FLOAT_EXTEND: case FLOAT_TRUNCATE: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - return COSTS_N_INSNS (6); \ - case PROCESSOR_EV5: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (4); \ - default: abort(); \ - } /* Control the assembler format that we output. */ @@ -1759,18 +1492,12 @@ do { \ #define USER_LABEL_PREFIX "" -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "$%s%d:\n", PREFIX, NUM) - /* This is how to output a label for a jump table. Arguments are the same as - for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is + for (*targetm.asm_out.internal_label), except the insn for the jump table is passed. */ #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ -{ ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } +{ ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); } /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where @@ -1824,22 +1551,6 @@ do { \ } \ while (0) -/* This is how to output an insn to push a register on the stack. - It need not be very fast code. */ - -#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ - fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \ - (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ - (REGNO) & 31); - -/* This is how to output an insn to pop a register from the stack. - It need not be very fast code. */ - -#define ASM_OUTPUT_REG_POP(FILE,REGNO) \ - fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \ - (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ - (REGNO) & 31); - /* This is how to output an element of a case-vector that is absolute. (Alpha does not use such vectors, but we must define this macro anyway.) */ @@ -1862,7 +1573,7 @@ do { \ /* This is how to advance the location counter by SIZE bytes. */ #define ASM_OUTPUT_SKIP(FILE,SIZE) \ - fprintf (FILE, "\t.space %d\n", (SIZE)) + fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)) /* This says how to output an assembler line to define a global common symbol. */ @@ -1870,7 +1581,7 @@ do { \ #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ ( fputs ("\t.comm ", (FILE)), \ assemble_name ((FILE), (NAME)), \ - fprintf ((FILE), ",%d\n", (SIZE))) + fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))) /* This says how to output an assembler line to define a local common symbol. */ @@ -1878,15 +1589,7 @@ do { \ #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ ( fputs ("\t.lcomm ", (FILE)), \ assemble_name ((FILE), (NAME)), \ - fprintf ((FILE), ",%d\n", (SIZE))) - -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) + fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))) /* Print operand X (an rtx) in assembler syntax to file FILE. @@ -1908,11 +1611,14 @@ do { \ - Generates double precision suffix for floating point instructions (t for IEEE, g for VAX) + + + Generates a nop instruction after a noreturn call at the very end + of the function */ #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \ - || (CODE) == '#' || (CODE) == '*' || (CODE) == '&') + || (CODE) == '#' || (CODE) == '*' || (CODE) == '&' || (CODE) == '+') /* Print a memory address as an operand to reference that memory location. */ @@ -1943,8 +1649,9 @@ do { \ {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ {"alpha_fp_comparison_operator", {EQ, LE, LT, UNORDERED}}, \ {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \ + {"fix_operator", {FIX, UNSIGNED_FIX}}, \ {"const0_operand", {CONST_INT, CONST_DOUBLE, CONST_VECTOR}}, \ - {"current_file_function_operand", {SYMBOL_REF}}, \ + {"samegp_function_operand", {SYMBOL_REF}}, \ {"direct_call_operand", {SYMBOL_REF}}, \ {"local_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \ {"small_symbolic_operand", {SYMBOL_REF, CONST}}, \ @@ -1965,6 +1672,7 @@ do { \ {"unaligned_memory_operand", {MEM}}, \ {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \ {"any_memory_operand", {MEM}}, \ + {"normal_memory_operand", {MEM}}, \ {"hard_fp_register_operand", {SUBREG, REG}}, \ {"hard_int_register_operand", {SUBREG, REG}}, \ {"reg_not_elim_operand", {SUBREG, REG}}, \ @@ -1974,10 +1682,6 @@ do { \ {"some_small_symbolic_operand", {SET, PARALLEL, PREFETCH, UNSPEC, \ UNSPEC_VOLATILE}}, -/* Define the `__builtin_va_list' type for the ABI. */ -#define BUILD_VA_LIST_TYPE(VALIST) \ - (VALIST) = alpha_build_va_list () - /* Implement `va_start' for varargs and stdarg. */ #define EXPAND_BUILTIN_VA_START(valist, nextarg) \ alpha_va_start (valist, nextarg) @@ -2024,7 +1728,7 @@ extern long alpha_auto_offset; #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset) -#define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \ +#define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) \ alpha_output_lineno (STREAM, LINE) #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ diff --git a/contrib/gcc/config/alpha/alpha.md b/contrib/gcc/config/alpha/alpha.md index f7e9fa4..998e300 100644 --- a/contrib/gcc/config/alpha/alpha.md +++ b/contrib/gcc/config/alpha/alpha.md @@ -1,22 +1,22 @@ ;; Machine description for DEC Alpha for GNU C compiler ;; Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, -;; 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +;; 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) ;; -;; This file is part of GNU CC. +;; This file is part of GCC. ;; -;; GNU CC is free software; you can redistribute it and/or modify +;; GCC is free software; you can redistribute it and/or modify ;; it under the terms of the GNU General Public License as published by ;; the Free Software Foundation; either version 2, or (at your option) ;; any later version. ;; -;; GNU CC is distributed in the hope that it will be useful, +;; GCC is distributed in the hope that it will be useful, ;; but WITHOUT ANY WARRANTY; without even the implied warranty of ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;; GNU General Public License for more details. ;; ;; You should have received a copy of the GNU General Public License -;; along with GNU CC; see the file COPYING. If not, write to +;; along with GCC; see the file COPYING. If not, write to ;; the Free Software Foundation, 59 Temple Place - Suite 330, ;; Boston, MA 02111-1307, USA. @@ -30,7 +30,7 @@ (UNSPEC_INSXH 2) (UNSPEC_MSKXH 3) (UNSPEC_CVTQL 4) - (UNSPEC_NT_LDA 5) + (UNSPEC_CVTLQ 5) (UNSPEC_UMK_LAUM 6) (UNSPEC_UMK_LALM 7) (UNSPEC_UMK_LAL 8) @@ -97,8 +97,8 @@ ;; separately. (define_attr "type" - "ild,fld,ldsym,ist,fst,ibr,callpal,fbr,jsr,iadd,ilog,shift,icmov,fcmov,icmp,imul,\ -fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" + "ild,fld,ldsym,ist,fst,ibr,callpal,fbr,jsr,iadd,ilog,shift,icmov,fcmov, + icmp,imul,fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (const_string "iadd")) ;; Describe a user's asm statement. @@ -120,7 +120,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; The ROUND_SUFFIX attribute marks which instructions require a ;; rounding-mode suffix. The value NONE indicates no suffix, -;; the value NORMAL indicates a suffix controled by alpha_fprm. +;; the value NORMAL indicates a suffix controlled by alpha_fprm. (define_attr "round_suffix" "none,normal,c" (const_string "none")) @@ -133,7 +133,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; V_SV_SVI accepts /v, /sv and /svi (cvttq only) ;; U_SU_SUI accepts /u, /su and /sui (most fp instructions) ;; -;; The actual suffix emitted is controled by alpha_fptm. +;; The actual suffix emitted is controlled by alpha_fptm. (define_attr "trap_suffix" "none,su,sui,v_sv,v_sv_svi,u_su_sui" (const_string "none")) @@ -154,6 +154,14 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ] (const_string "no"))) +;; The CANNOT_COPY attribute marks instructions with relocations that +;; cannot easily be duplicated. This includes insns with gpdisp relocs +;; since they have to stay in 1-1 correspondence with one another. This +;; also includes jsr insns, since they must stay in correspondence with +;; the immediately following gpdisp instructions. + +(define_attr "cannot_copy" "false,true" + (const_string "false")) ;; Include scheduling descriptions. @@ -177,41 +185,36 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "" "") -(define_insn "*extendsidi2_nofix" - [(set (match_operand:DI 0 "register_operand" "=r,r,*f,?*f") - (sign_extend:DI - (match_operand:SI 1 "nonimmediate_operand" "r,m,*f,m")))] - "! TARGET_FIX" - "@ - addl $31,%1,%0 - ldl %0,%1 - cvtlq %1,%0 - lds %0,%1\;cvtlq %0,%0" - [(set_attr "type" "iadd,ild,fadd,fld") - (set_attr "length" "*,*,*,8")]) +(define_insn "*cvtlq" + [(set (match_operand:DI 0 "register_operand" "=f") + (unspec:DI [(match_operand:SF 1 "reg_or_0_operand" "fG")] + UNSPEC_CVTLQ))] + "" + "cvtlq %1,%0" + [(set_attr "type" "fadd")]) -(define_insn "*extendsidi2_fix" - [(set (match_operand:DI 0 "register_operand" "=r,r,r,?*f,?*f") +(define_insn "*extendsidi2_1" + [(set (match_operand:DI 0 "register_operand" "=r,r,!*f") (sign_extend:DI - (match_operand:SI 1 "nonimmediate_operand" "r,m,*f,*f,m")))] - "TARGET_FIX" + (match_operand:SI 1 "nonimmediate_operand" "r,m,m")))] + "" "@ addl $31,%1,%0 ldl %0,%1 - ftois %1,%0 - cvtlq %1,%0 lds %0,%1\;cvtlq %0,%0" - [(set_attr "type" "iadd,ild,ftoi,fadd,fld") - (set_attr "length" "*,*,*,*,8")]) + [(set_attr "type" "iadd,ild,fld") + (set_attr "length" "*,*,8")]) -;; Due to issues with CLASS_CANNOT_CHANGE_SIZE, we cannot use a subreg here. (define_split [(set (match_operand:DI 0 "hard_fp_register_operand" "") (sign_extend:DI (match_operand:SI 1 "memory_operand" "")))] "reload_completed" [(set (match_dup 2) (match_dup 1)) - (set (match_dup 0) (sign_extend:DI (match_dup 2)))] - "operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]));") + (set (match_dup 0) (unspec:DI [(match_dup 2)] UNSPEC_CVTLQ))] +{ + operands[1] = adjust_address (operands[1], SFmode, 0); + operands[2] = gen_rtx_REG (SFmode, REGNO (operands[0])); +}) ;; Optimize sign-extension of SImode loads. This shows up in the wake of ;; reload when converting fp->int. @@ -227,28 +230,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (sign_extend:DI (match_dup 1)))] "") -(define_peephole2 - [(set (match_operand:SI 0 "hard_int_register_operand" "") - (match_operand:SI 1 "hard_fp_register_operand" "")) - (set (match_operand:DI 2 "hard_int_register_operand" "") - (sign_extend:DI (match_dup 0)))] - "TARGET_FIX - && (true_regnum (operands[0]) == true_regnum (operands[2]) - || peep2_reg_dead_p (2, operands[0]))" - [(set (match_dup 2) - (sign_extend:DI (match_dup 1)))] - "") - -(define_peephole2 - [(set (match_operand:DI 0 "hard_fp_register_operand" "") - (sign_extend:DI (match_operand:SI 1 "hard_fp_register_operand" ""))) - (set (match_operand:DI 2 "hard_int_register_operand" "") - (match_dup 0))] - "TARGET_FIX && peep2_reg_dead_p (2, operands[0])" - [(set (match_dup 2) - (sign_extend:DI (match_dup 1)))] - "") - ;; Don't say we have addsi3 if optimizing. This generates better code. We ;; have the anonymous addsi3 pattern below in case combine wants to make it. (define_expand "addsi3" @@ -413,7 +394,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" [(set (match_operand:DI 0 "register_operand" "=r") (plus:DI (match_operand:DI 1 "register_operand" "r") (high:DI (match_operand:DI 2 "local_symbolic_operand" ""))))] - "TARGET_EXPLICIT_RELOCS" + "TARGET_EXPLICIT_RELOCS && reload_completed" "ldah %0,%2(%1)\t\t!gprelhigh" [(set_attr "usegp" "yes")]) @@ -1337,7 +1318,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "eqv %r1,%2,%0" [(set_attr "type" "ilog")]) -;; Handle the FFS insn iff we support CIX. +;; Handle FFS and related insns iff we support CIX. (define_expand "ffsdi2" [(set (match_dup 2) @@ -1361,6 +1342,27 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ; EV6 calls all mvi and cttz/ctlz/popc class imisc, so just ; reuse the existing type name. [(set_attr "type" "mvi")]) + +(define_insn "clzdi2" + [(set (match_operand:DI 0 "register_operand" "=r") + (clz:DI (match_operand:DI 1 "register_operand" "r")))] + "TARGET_CIX" + "ctlz %1,%0" + [(set_attr "type" "mvi")]) + +(define_insn "ctzdi2" + [(set (match_operand:DI 0 "register_operand" "=r") + (ctz:DI (match_operand:DI 1 "register_operand" "r")))] + "TARGET_CIX" + "cttz %1,%0" + [(set_attr "type" "mvi")]) + +(define_insn "popcountdi2" + [(set (match_operand:DI 0 "register_operand" "=r") + (popcount:DI (match_operand:DI 1 "register_operand" "r")))] + "TARGET_CIX" + "ctpop %1,%0" + [(set_attr "type" "mvi")]) ;; Next come the shifts and the various extract and insert operations. @@ -2305,8 +2307,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; processing, it is cheaper to do the truncation in the int regs. (define_insn "*cvtql" - [(set (match_operand:SI 0 "register_operand" "=f") - (unspec:SI [(match_operand:DI 1 "reg_or_0_operand" "fG")] + [(set (match_operand:SF 0 "register_operand" "=f") + (unspec:SF [(match_operand:DI 1 "reg_or_0_operand" "fG")] UNSPEC_CVTQL))] "TARGET_FP" "cvtql%/ %R1,%0" @@ -2316,37 +2318,46 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (define_insn_and_split "*fix_truncdfsi_ieee" [(set (match_operand:SI 0 "memory_operand" "=m") - (subreg:SI (fix:DI (match_operand:DF 1 "reg_or_0_operand" "fG")) 0)) + (subreg:SI + (match_operator:DI 4 "fix_operator" + [(match_operand:DF 1 "reg_or_0_operand" "fG")]) 0)) (clobber (match_scratch:DI 2 "=&f")) - (clobber (match_scratch:SI 3 "=&f"))] + (clobber (match_scratch:SF 3 "=&f"))] "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "#" "&& reload_completed" - [(set (match_dup 2) (fix:DI (match_dup 1))) - (set (match_dup 3) (unspec:SI [(match_dup 2)] UNSPEC_CVTQL)) - (set (match_dup 0) (match_dup 3))] - "" + [(set (match_dup 2) (match_op_dup 4 [(match_dup 1)])) + (set (match_dup 3) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) + (set (match_dup 5) (match_dup 3))] +{ + operands[5] = adjust_address (operands[0], SFmode, 0); +} [(set_attr "type" "fadd") (set_attr "trap" "yes")]) (define_insn_and_split "*fix_truncdfsi_internal" [(set (match_operand:SI 0 "memory_operand" "=m") - (subreg:SI (fix:DI (match_operand:DF 1 "reg_or_0_operand" "fG")) 0)) + (subreg:SI + (match_operator:DI 3 "fix_operator" + [(match_operand:DF 1 "reg_or_0_operand" "fG")]) 0)) (clobber (match_scratch:DI 2 "=f"))] "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "#" "&& reload_completed" - [(set (match_dup 2) (fix:DI (match_dup 1))) - (set (match_dup 3) (unspec:SI [(match_dup 2)] UNSPEC_CVTQL)) - (set (match_dup 0) (match_dup 3))] - ;; Due to REG_CANNOT_CHANGE_SIZE issues, we cannot simply use SUBREG. - "operands[3] = gen_rtx_REG (SImode, REGNO (operands[2]));" + [(set (match_dup 2) (match_op_dup 3 [(match_dup 1)])) + (set (match_dup 4) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) + (set (match_dup 5) (match_dup 4))] +{ + operands[4] = gen_rtx_REG (SFmode, REGNO (operands[2])); + operands[5] = adjust_address (operands[0], SFmode, 0); +} [(set_attr "type" "fadd") (set_attr "trap" "yes")]) (define_insn "*fix_truncdfdi_ieee" [(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f") - (fix:DI (match_operand:DF 1 "reg_or_0_operand" "fG")))] + (match_operator:DI 2 "fix_operator" + [(match_operand:DF 1 "reg_or_0_operand" "fG")]))] "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cvt%-q%/ %R1,%0" [(set_attr "type" "fadd") @@ -2354,9 +2365,10 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "c") (set_attr "trap_suffix" "v_sv_svi")]) -(define_insn "fix_truncdfdi2" +(define_insn "*fix_truncdfdi2" [(set (match_operand:DI 0 "reg_no_subreg_operand" "=f") - (fix:DI (match_operand:DF 1 "reg_or_0_operand" "fG")))] + (match_operator:DI 2 "fix_operator" + [(match_operand:DF 1 "reg_or_0_operand" "fG")]))] "TARGET_FP" "cvt%-q%/ %R1,%0" [(set_attr "type" "fadd") @@ -2364,44 +2376,64 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "c") (set_attr "trap_suffix" "v_sv_svi")]) +(define_expand "fix_truncdfdi2" + [(set (match_operand:DI 0 "reg_no_subreg_operand" "") + (fix:DI (match_operand:DF 1 "reg_or_0_operand" "")))] + "TARGET_FP" + "") + +(define_expand "fixuns_truncdfdi2" + [(set (match_operand:DI 0 "reg_no_subreg_operand" "") + (unsigned_fix:DI (match_operand:DF 1 "reg_or_0_operand" "")))] + "TARGET_FP" + "") + ;; Likewise between SFmode and SImode. (define_insn_and_split "*fix_truncsfsi_ieee" [(set (match_operand:SI 0 "memory_operand" "=m") - (subreg:SI (fix:DI (float_extend:DF - (match_operand:SF 1 "reg_or_0_operand" "fG"))) 0)) + (subreg:SI + (match_operator:DI 4 "fix_operator" + [(float_extend:DF + (match_operand:SF 1 "reg_or_0_operand" "fG"))]) 0)) (clobber (match_scratch:DI 2 "=&f")) - (clobber (match_scratch:SI 3 "=&f"))] + (clobber (match_scratch:SF 3 "=&f"))] "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "#" "&& reload_completed" - [(set (match_dup 2) (fix:DI (float_extend:DF (match_dup 1)))) - (set (match_dup 3) (unspec:SI [(match_dup 2)] UNSPEC_CVTQL)) - (set (match_dup 0) (match_dup 3))] - "" + [(set (match_dup 2) (match_op_dup 4 [(float_extend:DF (match_dup 1))])) + (set (match_dup 3) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) + (set (match_dup 5) (match_dup 3))] +{ + operands[5] = adjust_address (operands[0], SFmode, 0); +} [(set_attr "type" "fadd") (set_attr "trap" "yes")]) (define_insn_and_split "*fix_truncsfsi_internal" [(set (match_operand:SI 0 "memory_operand" "=m") - (subreg:SI (fix:DI (float_extend:DF - (match_operand:SF 1 "reg_or_0_operand" "fG"))) 0)) + (subreg:SI + (match_operator:DI 3 "fix_operator" + [(float_extend:DF + (match_operand:SF 1 "reg_or_0_operand" "fG"))]) 0)) (clobber (match_scratch:DI 2 "=f"))] "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "#" "&& reload_completed" - [(set (match_dup 2) (fix:DI (float_extend:DF (match_dup 1)))) - (set (match_dup 3) (unspec:SI [(match_dup 2)] UNSPEC_CVTQL)) - (set (match_dup 0) (match_dup 3))] - ;; Due to REG_CANNOT_CHANGE_SIZE issues, we cannot simply use SUBREG. - "operands[3] = gen_rtx_REG (SImode, REGNO (operands[2]));" + [(set (match_dup 2) (match_op_dup 3 [(float_extend:DF (match_dup 1))])) + (set (match_dup 4) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) + (set (match_dup 5) (match_dup 4))] +{ + operands[4] = gen_rtx_REG (SFmode, REGNO (operands[2])); + operands[5] = adjust_address (operands[0], SFmode, 0); +} [(set_attr "type" "fadd") (set_attr "trap" "yes")]) (define_insn "*fix_truncsfdi_ieee" [(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f") - (fix:DI (float_extend:DF - (match_operand:SF 1 "reg_or_0_operand" "fG"))))] + (match_operator:DI 2 "fix_operator" + [(float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG"))]))] "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cvt%-q%/ %R1,%0" [(set_attr "type" "fadd") @@ -2409,10 +2441,10 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "c") (set_attr "trap_suffix" "v_sv_svi")]) -(define_insn "fix_truncsfdi2" +(define_insn "*fix_truncsfdi2" [(set (match_operand:DI 0 "reg_no_subreg_operand" "=f") - (fix:DI (float_extend:DF - (match_operand:SF 1 "reg_or_0_operand" "fG"))))] + (match_operator:DI 2 "fix_operator" + [(float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG"))]))] "TARGET_FP" "cvt%-q%/ %R1,%0" [(set_attr "type" "fadd") @@ -2420,12 +2452,31 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "c") (set_attr "trap_suffix" "v_sv_svi")]) +(define_expand "fix_truncsfdi2" + [(set (match_operand:DI 0 "reg_no_subreg_operand" "") + (fix:DI (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" ""))))] + "TARGET_FP" + "") + +(define_expand "fixuns_truncsfdi2" + [(set (match_operand:DI 0 "reg_no_subreg_operand" "") + (unsigned_fix:DI + (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" ""))))] + "TARGET_FP" + "") + (define_expand "fix_trunctfdi2" [(use (match_operand:DI 0 "register_operand" "")) (use (match_operand:TF 1 "general_operand" ""))] "TARGET_HAS_XFLOATING_LIBS" "alpha_emit_xfloating_cvt (FIX, operands); DONE;") +(define_expand "fixuns_trunctfdi2" + [(use (match_operand:DI 0 "register_operand" "")) + (use (match_operand:TF 1 "general_operand" ""))] + "TARGET_HAS_XFLOATING_LIBS" + "alpha_emit_xfloating_cvt (UNSIGNED_FIX, operands); DONE;") + (define_insn "*floatdisf_ieee" [(set (match_operand:SF 0 "register_operand" "=&f") (float:SF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] @@ -2446,6 +2497,35 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "normal") (set_attr "trap_suffix" "sui")]) +(define_insn_and_split "*floatsisf2_ieee" + [(set (match_operand:SF 0 "register_operand" "=&f") + (float:SF (match_operand:SI 1 "memory_operand" "m"))) + (clobber (match_scratch:DI 2 "=&f")) + (clobber (match_scratch:SF 3 "=&f"))] + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" + "#" + "&& reload_completed" + [(set (match_dup 3) (match_dup 1)) + (set (match_dup 2) (unspec:DI [(match_dup 3)] UNSPEC_CVTLQ)) + (set (match_dup 0) (float:SF (match_dup 2)))] +{ + operands[1] = adjust_address (operands[1], SFmode, 0); +}) + +(define_insn_and_split "*floatsisf2" + [(set (match_operand:SF 0 "register_operand" "=f") + (float:SF (match_operand:SI 1 "memory_operand" "m")))] + "TARGET_FP" + "#" + "&& reload_completed" + [(set (match_dup 0) (match_dup 1)) + (set (match_dup 2) (unspec:DI [(match_dup 0)] UNSPEC_CVTLQ)) + (set (match_dup 0) (float:SF (match_dup 2)))] +{ + operands[1] = adjust_address (operands[1], SFmode, 0); + operands[2] = gen_rtx_REG (DImode, REGNO (operands[0])); +}) + (define_insn "*floatdidf_ieee" [(set (match_operand:DF 0 "register_operand" "=&f") (float:DF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] @@ -2466,6 +2546,36 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "normal") (set_attr "trap_suffix" "sui")]) +(define_insn_and_split "*floatsidf2_ieee" + [(set (match_operand:DF 0 "register_operand" "=&f") + (float:DF (match_operand:SI 1 "memory_operand" "m"))) + (clobber (match_scratch:DI 2 "=&f")) + (clobber (match_scratch:SF 3 "=&f"))] + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" + "#" + "&& reload_completed" + [(set (match_dup 3) (match_dup 1)) + (set (match_dup 2) (unspec:DI [(match_dup 3)] UNSPEC_CVTLQ)) + (set (match_dup 0) (float:DF (match_dup 2)))] +{ + operands[1] = adjust_address (operands[1], SFmode, 0); +}) + +(define_insn_and_split "*floatsidf2" + [(set (match_operand:DF 0 "register_operand" "=f") + (float:DF (match_operand:SI 1 "memory_operand" "m")))] + "TARGET_FP" + "#" + "&& reload_completed" + [(set (match_dup 3) (match_dup 1)) + (set (match_dup 2) (unspec:DI [(match_dup 3)] UNSPEC_CVTLQ)) + (set (match_dup 0) (float:DF (match_dup 2)))] +{ + operands[1] = adjust_address (operands[1], SFmode, 0); + operands[2] = gen_rtx_REG (DImode, REGNO (operands[0])); + operands[3] = gen_rtx_REG (SFmode, REGNO (operands[0])); +}) + (define_expand "floatditf2" [(use (match_operand:TF 0 "register_operand" "")) (use (match_operand:DI 1 "general_operand" ""))] @@ -4594,7 +4704,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "@ jsr $26,(%0),0\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%* - bsr $26,$%0..ng + bsr $26,%0\t\t!samegp ldq $27,%0($29)\t\t!literal!%#\;jsr $26,($27),%0\t\t!lituse_jsr!%#\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%*" [(set_attr "type" "jsr") (set_attr "length" "12,*,16")]) @@ -4607,8 +4717,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 29)) (clobber (reg:DI 26))])] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed - && ! current_file_function_operand (operands[0], Pmode) - && peep2_regno_dead_p (1, 29)" + && ! samegp_function_operand (operands[0], Pmode) + && (peep2_regno_dead_p (1, 29) + || find_reg_note (insn, REG_NORETURN, NULL_RTX))" [(parallel [(call (mem:DI (match_dup 2)) (match_dup 1)) (set (reg:DI 26) (plus:DI (pc) (const_int 4))) @@ -4637,8 +4748,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 29)) (clobber (reg:DI 26))])] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed - && ! current_file_function_operand (operands[0], Pmode) - && ! peep2_regno_dead_p (1, 29)" + && ! samegp_function_operand (operands[0], Pmode) + && ! (peep2_regno_dead_p (1, 29) + || find_reg_note (insn, REG_NORETURN, NULL_RTX))" [(parallel [(call (mem:DI (match_dup 2)) (match_dup 1)) (set (reg:DI 26) (plus:DI (pc) (const_int 4))) @@ -4678,7 +4790,18 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (match_operand 3 "const_int_operand" ""))] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "jsr $26,(%0),%2%J3" - [(set_attr "type" "jsr")]) + [(set_attr "type" "jsr") + (set_attr "cannot_copy" "true")]) + +;; We output a nop after noreturn calls at the very end of the function to +;; ensure that the return address always remains in the caller's code range, +;; as not doing so might confuse unwinding engines. +;; +;; The potential change in insn length is not reflected in the length +;; attributes at this stage. Since the extra space is only actually added at +;; the very end of the compilation process (via final/print_operand), it +;; really seems harmless and not worth the trouble of some extra computation +;; cost and complexity. (define_insn "*call_osf_1_noreturn" [(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,s")) @@ -4688,9 +4811,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "! TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && find_reg_note (insn, REG_NORETURN, NULL_RTX)" "@ - jsr $26,($27),0 - bsr $26,$%0..ng - jsr $26,%0" + jsr $26,($27),0%+ + bsr $26,$%0..ng%+ + jsr $26,%0%+" [(set_attr "type" "jsr") (set_attr "length" "*,*,8")]) @@ -4715,7 +4838,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (unspec [(reg:DI 29)] UNSPEC_SIBCALL)] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "@ - br $31,$%0..ng + br $31,%0\t\t!samegp ldq $27,%0($29)\t\t!literal!%#\;jmp $31,($27),%0\t\t!lituse_jsr!%#" [(set_attr "type" "jsr") (set_attr "length" "*,8")]) @@ -4754,20 +4877,19 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 26)) (clobber (reg:DI 27))] "TARGET_ABI_OPEN_VMS" - "* { switch (which_alternative) { case 0: - return \"mov %2,$27\;jsr $26,0\;ldq $27,0($29)\"; + return "mov %2,$27\;jsr $26,0\;ldq $27,0($29)"; case 1: operands [2] = alpha_use_linkage (operands [0], cfun->decl, 1, 0); operands [3] = alpha_use_linkage (operands [0], cfun->decl, 0, 0); - return \"ldq $26,%3\;ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)\"; + return "ldq $26,%3\;ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)"; default: abort(); } -}" +} [(set_attr "type" "jsr") (set_attr "length" "12,16")]) @@ -5086,27 +5208,10 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" operands[1] = force_reg (TFmode, operands[1]); }) -(define_insn "*movsi_nofix" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m") - (match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f"))] - "(TARGET_ABI_OSF || TARGET_ABI_UNICOSMK) && ! TARGET_FIX - && (register_operand (operands[0], SImode) - || reg_or_0_operand (operands[1], SImode))" - "@ - bis $31,%r1,%0 - lda %0,%1($31) - ldah %0,%h1($31) - ldl %0,%1 - stl %r1,%0 - cpys %R1,%R1,%0 - ld%, %0,%1 - st%, %R1,%0" - [(set_attr "type" "ilog,iadd,iadd,ild,ist,fcpys,fld,fst")]) - -(define_insn "*movsi_fix" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m,r,*f") - (match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f,*f,r"))] - "TARGET_ABI_OSF && TARGET_FIX +(define_insn "*movsi" + [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m") + (match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ"))] + "(TARGET_ABI_OSF || TARGET_ABI_UNICOSMK) && (register_operand (operands[0], SImode) || reg_or_0_operand (operands[1], SImode))" "@ @@ -5114,38 +5219,13 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" lda %0,%1($31) ldah %0,%h1($31) ldl %0,%1 - stl %r1,%0 - cpys %R1,%R1,%0 - ld%, %0,%1 - st%, %R1,%0 - ftois %1,%0 - itofs %1,%0" - [(set_attr "type" "ilog,iadd,iadd,ild,ist,fcpys,fld,fst,ftoi,itof")]) - -(define_insn "*movsi_nt_vms_nofix" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m,*f,*f,m") - (match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ,*fJ,m,*f"))] - "(TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS) - && !TARGET_FIX - && (register_operand (operands[0], SImode) - || reg_or_0_operand (operands[1], SImode))" - "@ - bis $31,%1,%0 - lda %0,%1 - ldah %0,%h1 - lda %0,%1 - ldl %0,%1 - stl %r1,%0 - cpys %R1,%R1,%0 - ld%, %0,%1 - st%, %R1,%0" - [(set_attr "type" "ilog,iadd,iadd,ldsym,ild,ist,fcpys,fld,fst")]) + stl %r1,%0" + [(set_attr "type" "ilog,iadd,iadd,ild,ist")]) -(define_insn "*movsi_nt_vms_fix" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m,*f,*f,m,r,*f") - (match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ,*fJ,m,*f,*f,r"))] +(define_insn "*movsi_nt_vms" + [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m") + (match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ"))] "(TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS) - && TARGET_FIX && (register_operand (operands[0], SImode) || reg_or_0_operand (operands[1], SImode))" "@ @@ -5154,13 +5234,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ldah %0,%h1 lda %0,%1 ldl %0,%1 - stl %r1,%0 - cpys %R1,%R1,%0 - ld%, %0,%1 - st%, %R1,%0 - ftois %1,%0 - itofs %1,%0" - [(set_attr "type" "ilog,iadd,iadd,ldsym,ild,ist,fcpys,fld,fst,ftoi,itof")]) + stl %r1,%0" + [(set_attr "type" "ilog,iadd,iadd,ldsym,ild,ist")]) (define_insn "*movhi_nobwx" [(set (match_operand:HI 0 "register_operand" "=r,r") @@ -5243,7 +5318,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; Split the load of an address into a four-insn sequence on Unicos/Mk. ;; Always generate a REG_EQUAL note for the last instruction to facilitate -;; optimisations. If the symbolic operand is a label_ref, generate REG_LABEL +;; optimizations. If the symbolic operand is a label_ref, generate REG_LABEL ;; notes and update LABEL_NUSES because this is not done automatically. ;; Labels may be incorrectly deleted if we don't do this. ;; @@ -5399,7 +5474,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" [(set (match_operand:DI 0 "register_operand" "=r") (unspec:DI [(match_operand:DI 1 "symbolic_operand" "")] UNSPEC_SYMBOL))] - "TARGET_EXPLICIT_RELOCS" + "TARGET_EXPLICIT_RELOCS && flag_inline_functions" "#" "" [(set (match_dup 0) (match_dup 1))] @@ -5635,7 +5710,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (define_expand "aligned_loadqi" [(set (match_operand:SI 3 "register_operand" "") (match_operand:SI 1 "memory_operand" "")) - (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (subreg:DI (match_dup 3) 0) (const_int 8) (match_operand:DI 2 "const_int_operand" "")))] @@ -5646,7 +5721,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (define_expand "aligned_loadhi" [(set (match_operand:SI 3 "register_operand" "") (match_operand:SI 1 "memory_operand" "")) - (set (subreg:DI (match_operand:HI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (subreg:DI (match_dup 3) 0) (const_int 16) (match_operand:DI 2 "const_int_operand" "")))] @@ -5662,7 +5737,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; operand 3 can overlap the input and output registers. (define_expand "unaligned_loadqi" - [(use (match_operand:QI 0 "register_operand" "")) + [(use (match_operand:DI 0 "register_operand" "")) (use (match_operand:DI 1 "address_operand" "")) (use (match_operand:DI 2 "register_operand" "")) (use (match_operand:DI 3 "register_operand" ""))] @@ -5683,7 +5758,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (const_int -8)))) (set (match_operand:DI 3 "register_operand" "") (match_dup 1)) - (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (match_dup 2) (const_int 8) (ashift:DI (match_dup 3) (const_int 3))))] @@ -5696,7 +5771,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (const_int -8)))) (set (match_operand:DI 3 "register_operand" "") (match_dup 1)) - (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (match_dup 2) (const_int 8) (minus:DI @@ -5706,7 +5781,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "") (define_expand "unaligned_loadhi" - [(use (match_operand:QI 0 "register_operand" "")) + [(use (match_operand:DI 0 "register_operand" "")) (use (match_operand:DI 1 "address_operand" "")) (use (match_operand:DI 2 "register_operand" "")) (use (match_operand:DI 3 "register_operand" ""))] @@ -5727,7 +5802,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (const_int -8)))) (set (match_operand:DI 3 "register_operand" "") (match_dup 1)) - (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (match_dup 2) (const_int 16) (ashift:DI (match_dup 3) (const_int 3))))] @@ -5740,7 +5815,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (const_int -8)))) (set (match_operand:DI 3 "register_operand" "") (plus:DI (match_dup 1) (const_int 1))) - (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (match_dup 2) (const_int 16) (minus:DI @@ -5935,9 +6010,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" { rtx scratch, seq; - if (GET_CODE (operands[1]) != MEM) - abort (); - if (aligned_memory_operand (operands[1], QImode)) { seq = gen_reload_inqi_help (operands[0], operands[1], @@ -5956,8 +6028,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" scratch = gen_rtx_REG (DImode, REGNO (operands[2])); addr = get_unaligned_address (operands[1], 0); - seq = gen_unaligned_loadqi (operands[0], addr, scratch, - gen_rtx_REG (DImode, REGNO (operands[0]))); + operands[0] = gen_rtx_REG (DImode, REGNO (operands[0])); + seq = gen_unaligned_loadqi (operands[0], addr, scratch, operands[0]); alpha_set_memflags (seq, operands[1]); } emit_insn (seq); @@ -5972,9 +6044,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" { rtx scratch, seq; - if (GET_CODE (operands[1]) != MEM) - abort (); - if (aligned_memory_operand (operands[1], HImode)) { seq = gen_reload_inhi_help (operands[0], operands[1], @@ -5993,8 +6062,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" scratch = gen_rtx_REG (DImode, REGNO (operands[2])); addr = get_unaligned_address (operands[1], 0); - seq = gen_unaligned_loadhi (operands[0], addr, scratch, - gen_rtx_REG (DImode, REGNO (operands[0]))); + operands[0] = gen_rtx_REG (DImode, REGNO (operands[0])); + seq = gen_unaligned_loadhi (operands[0], addr, scratch, operands[0]); alpha_set_memflags (seq, operands[1]); } emit_insn (seq); @@ -6007,9 +6076,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:TI 2 "register_operand" "=&r")])] "! TARGET_BWX" { - if (GET_CODE (operands[0]) != MEM) - abort (); - if (aligned_memory_operand (operands[0], QImode)) { emit_insn (gen_reload_outqi_help @@ -6042,9 +6108,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:TI 2 "register_operand" "=&r")])] "! TARGET_BWX" { - if (GET_CODE (operands[0]) != MEM) - abort (); - if (aligned_memory_operand (operands[0], HImode)) { emit_insn (gen_reload_outhi_help @@ -6075,71 +6138,47 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; always get a proper address for a stack slot during reload_foo ;; expansion, so we must delay our address manipulations until after. -(define_insn "reload_inqi_help" +(define_insn_and_split "reload_inqi_help" [(set (match_operand:QI 0 "register_operand" "=r") (match_operand:QI 1 "memory_operand" "m")) (clobber (match_operand:SI 2 "register_operand" "=r"))] "! TARGET_BWX && (reload_in_progress || reload_completed)" - "#") - -(define_insn "reload_inhi_help" - [(set (match_operand:HI 0 "register_operand" "=r") - (match_operand:HI 1 "memory_operand" "m")) - (clobber (match_operand:SI 2 "register_operand" "=r"))] - "! TARGET_BWX && (reload_in_progress || reload_completed)" - "#") - -(define_insn "reload_outqi_help" - [(set (match_operand:QI 0 "memory_operand" "=m") - (match_operand:QI 1 "register_operand" "r")) - (clobber (match_operand:SI 2 "register_operand" "=r")) - (clobber (match_operand:SI 3 "register_operand" "=r"))] - "! TARGET_BWX && (reload_in_progress || reload_completed)" - "#") - -(define_insn "reload_outhi_help" - [(set (match_operand:HI 0 "memory_operand" "=m") - (match_operand:HI 1 "register_operand" "r")) - (clobber (match_operand:SI 2 "register_operand" "=r")) - (clobber (match_operand:SI 3 "register_operand" "=r"))] - "! TARGET_BWX && (reload_in_progress || reload_completed)" - "#") - -(define_split - [(set (match_operand:QI 0 "register_operand" "") - (match_operand:QI 1 "memory_operand" "")) - (clobber (match_operand:SI 2 "register_operand" ""))] + "#" "! TARGET_BWX && reload_completed" [(const_int 0)] { rtx aligned_mem, bitnum; get_aligned_mem (operands[1], &aligned_mem, &bitnum); - + operands[0] = gen_lowpart (DImode, operands[0]); emit_insn (gen_aligned_loadqi (operands[0], aligned_mem, bitnum, operands[2])); DONE; }) -(define_split - [(set (match_operand:HI 0 "register_operand" "") - (match_operand:HI 1 "memory_operand" "")) - (clobber (match_operand:SI 2 "register_operand" ""))] +(define_insn_and_split "reload_inhi_help" + [(set (match_operand:HI 0 "register_operand" "=r") + (match_operand:HI 1 "memory_operand" "m")) + (clobber (match_operand:SI 2 "register_operand" "=r"))] + "! TARGET_BWX && (reload_in_progress || reload_completed)" + "#" "! TARGET_BWX && reload_completed" [(const_int 0)] { rtx aligned_mem, bitnum; get_aligned_mem (operands[1], &aligned_mem, &bitnum); - + operands[0] = gen_lowpart (DImode, operands[0]); emit_insn (gen_aligned_loadhi (operands[0], aligned_mem, bitnum, operands[2])); DONE; }) -(define_split - [(set (match_operand:QI 0 "memory_operand" "") - (match_operand:QI 1 "register_operand" "")) - (clobber (match_operand:SI 2 "register_operand" "")) - (clobber (match_operand:SI 3 "register_operand" ""))] +(define_insn_and_split "reload_outqi_help" + [(set (match_operand:QI 0 "memory_operand" "=m") + (match_operand:QI 1 "register_operand" "r")) + (clobber (match_operand:SI 2 "register_operand" "=r")) + (clobber (match_operand:SI 3 "register_operand" "=r"))] + "! TARGET_BWX && (reload_in_progress || reload_completed)" + "#" "! TARGET_BWX && reload_completed" [(const_int 0)] { @@ -6150,11 +6189,13 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" DONE; }) -(define_split - [(set (match_operand:HI 0 "memory_operand" "") - (match_operand:HI 1 "register_operand" "")) - (clobber (match_operand:SI 2 "register_operand" "")) - (clobber (match_operand:SI 3 "register_operand" ""))] +(define_insn_and_split "reload_outhi_help" + [(set (match_operand:HI 0 "memory_operand" "=m") + (match_operand:HI 1 "register_operand" "r")) + (clobber (match_operand:SI 2 "register_operand" "=r")) + (clobber (match_operand:SI 3 "register_operand" "=r"))] + "! TARGET_BWX && (reload_in_progress || reload_completed)" + "#" "! TARGET_BWX && reload_completed" [(const_int 0)] { @@ -6494,6 +6535,56 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" FAIL; }) +(define_expand "movstrdi" + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") + (match_operand:BLK 1 "memory_operand" "")) + (use (match_operand:DI 2 "immediate_operand" "")) + (use (match_operand:DI 3 "immediate_operand" "")) + (use (match_dup 4)) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 18)) + (clobber (reg:DI 19)) + (clobber (reg:DI 20)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))])] + "TARGET_ABI_OPEN_VMS" +{ + operands[4] = gen_rtx_SYMBOL_REF (Pmode, "OTS$MOVE"); + alpha_need_linkage (XSTR (operands[4], 0), 0); +}) + +(define_insn "*movstrdi_1" + [(set (match_operand:BLK 0 "memory_operand" "=m,=m") + (match_operand:BLK 1 "memory_operand" "m,m")) + (use (match_operand:DI 2 "nonmemory_operand" "r,i")) + (use (match_operand:DI 3 "immediate_operand" "")) + (use (match_operand:DI 4 "call_operand" "i,i")) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 18)) + (clobber (reg:DI 19)) + (clobber (reg:DI 20)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))] + "TARGET_ABI_OPEN_VMS" +{ + operands [5] = alpha_use_linkage (operands [4], cfun->decl, 0, 1); + switch (which_alternative) + { + case 0: + return "lda $16,%0\;bis $31,%2,$17\;lda $18,%1\;ldq $26,%5\;lda $25,3($31)\;jsr $26,%4\;ldq $27,0($29)"; + case 1: + return "lda $16,%0\;lda $17,%2($31)\;lda $18,%1\;ldq $26,%5\;lda $25,3($31)\;jsr $26,%4\;ldq $27,0($29)"; + default: + abort(); + } +} + [(set_attr "type" "multi") + (set_attr "length" "28")]) + (define_expand "clrstrqi" [(parallel [(set (match_operand:BLK 0 "memory_operand" "") (const_int 0)) @@ -6506,6 +6597,51 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" else FAIL; }) + +(define_expand "clrstrdi" + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") + (const_int 0)) + (use (match_operand:DI 1 "immediate_operand" "")) + (use (match_operand:DI 2 "immediate_operand" "")) + (use (match_dup 3)) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))])] + "TARGET_ABI_OPEN_VMS" +{ + operands[3] = gen_rtx_SYMBOL_REF (Pmode, "OTS$ZERO"); + alpha_need_linkage (XSTR (operands[3], 0), 0); +}) + +(define_insn "*clrstrdi_1" + [(set (match_operand:BLK 0 "memory_operand" "=m,=m") + (const_int 0)) + (use (match_operand:DI 1 "nonmemory_operand" "r,i")) + (use (match_operand:DI 2 "immediate_operand" "")) + (use (match_operand:DI 3 "call_operand" "i,i")) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))] + "TARGET_ABI_OPEN_VMS" +{ + operands [4] = alpha_use_linkage (operands [3], cfun->decl, 0, 1); + switch (which_alternative) + { + case 0: + return "lda $16,%0\;bis $31,%1,$17\;ldq $26,%4\;lda $25,2($31)\;jsr $26,%3\;ldq $27,0($29)"; + case 1: + return "lda $16,%0\;lda $17,%1($31)\;ldq $26,%4\;lda $25,2($31)\;jsr $26,%3\;ldq $27,0($29)"; + default: + abort(); + } +} + [(set_attr "type" "multi") + (set_attr "length" "24")]) + ;; Subroutine of stack space allocation. Perform a stack probe. (define_expand "probe_stack" @@ -6605,7 +6741,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "" { operands[2] = gen_label_rtx (); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (operands[2])); return "stq $31,-8192(%1)\;subq %0,1,%0\;lda %1,-8192(%1)\;bne %0,%l2"; @@ -6648,7 +6784,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand 2 "const_int_operand" "")] UNSPECV_LDGP1))] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" - "ldah %0,0(%1)\t\t!gpdisp!%2") + "ldah %0,0(%1)\t\t!gpdisp!%2" + [(set_attr "cannot_copy" "true")]) (define_insn "*ldgp_er_2" [(set (match_operand:DI 0 "register_operand" "=r") @@ -6656,7 +6793,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand 2 "const_int_operand" "")] UNSPEC_LDGP2))] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" - "lda %0,0(%1)\t\t!gpdisp!%2") + "lda %0,0(%1)\t\t!gpdisp!%2" + [(set_attr "cannot_copy" "true")]) (define_insn "*prologue_ldgp_er_2" [(set (match_operand:DI 0 "register_operand" "=r") @@ -6664,7 +6802,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand 2 "const_int_operand" "")] UNSPECV_PLDGP2))] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" - "lda %0,0(%1)\t\t!gpdisp!%2\n$%~..ng:") + "lda %0,0(%1)\t\t!gpdisp!%2\n$%~..ng:" + [(set_attr "cannot_copy" "true")]) (define_insn "*prologue_ldgp_1" [(set (match_operand:DI 0 "register_operand" "=r") @@ -6672,7 +6811,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand 2 "const_int_operand" "")] UNSPECV_LDGP1))] "" - "ldgp %0,0(%1)\n$%~..ng:") + "ldgp %0,0(%1)\n$%~..ng:" + [(set_attr "cannot_copy" "true")]) (define_insn "*prologue_ldgp_2" [(set (match_operand:DI 0 "register_operand" "=r") @@ -6722,17 +6862,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" DONE; }) -;; In creating a large stack frame, NT _must_ use ldah+lda to load -;; the frame size into a register. We use this pattern to ensure -;; we get lda instead of addq. -(define_insn "nt_lda" - [(set (match_operand:DI 0 "register_operand" "=r") - (unspec:DI [(match_dup 0) - (match_operand:DI 1 "const_int_operand" "n")] - UNSPEC_NT_LDA))] - "" - "lda %0,%1(%0)") - (define_expand "builtin_longjmp" [(use (match_operand:DI 0 "register_operand" "r"))] "TARGET_ABI_OSF" @@ -6786,7 +6915,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" [(const_int 0)] " { - emit_note (NULL, NOTE_INSN_DELETED); + emit_note (NOTE_INSN_DELETED); DONE; }") @@ -7046,7 +7175,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extxl_be; else @@ -7061,7 +7190,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extxl_be; else @@ -7076,7 +7205,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extxl_be; else @@ -7091,7 +7220,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extxl_be; else @@ -7106,7 +7235,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extwh_be; else @@ -7121,7 +7250,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extlh_be; else @@ -7136,7 +7265,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extqh_be; else @@ -7151,7 +7280,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_insbl_be; else @@ -7167,7 +7296,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_inswl_be; else @@ -7183,7 +7312,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_insll_be; else @@ -7200,7 +7329,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_insql_be; else @@ -7245,7 +7374,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); rtx mask; if (WORDS_BIG_ENDIAN) gen = gen_mskxl_be; @@ -7262,7 +7391,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); rtx mask; if (WORDS_BIG_ENDIAN) gen = gen_mskxl_be; @@ -7279,7 +7408,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); rtx mask; if (WORDS_BIG_ENDIAN) gen = gen_mskxl_be; @@ -7296,7 +7425,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); rtx mask; if (WORDS_BIG_ENDIAN) gen = gen_mskxl_be; @@ -7719,7 +7848,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "@ jsr $26,(%1),0\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%* - bsr $26,$%1..ng + bsr $26,%1\t\t!samegp ldq $27,%1($29)\t\t!literal!%#\;jsr $26,($27),0\t\t!lituse_jsr!%#\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%*" [(set_attr "type" "jsr") (set_attr "length" "12,*,16")]) @@ -7733,8 +7862,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 29)) (clobber (reg:DI 26))])] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed - && ! current_file_function_operand (operands[1], Pmode) - && peep2_regno_dead_p (1, 29)" + && ! samegp_function_operand (operands[1], Pmode) + && (peep2_regno_dead_p (1, 29) + || find_reg_note (insn, REG_NORETURN, NULL_RTX))" [(parallel [(set (match_dup 0) (call (mem:DI (match_dup 3)) (match_dup 2))) @@ -7765,8 +7895,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 29)) (clobber (reg:DI 26))])] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed - && ! current_file_function_operand (operands[1], Pmode) - && ! peep2_regno_dead_p (1, 29)" + && ! samegp_function_operand (operands[1], Pmode) + && ! (peep2_regno_dead_p (1, 29) + || find_reg_note (insn, REG_NORETURN, NULL_RTX))" [(parallel [(set (match_dup 0) (call (mem:DI (match_dup 3)) (match_dup 2))) @@ -7808,7 +7939,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (match_operand 4 "" ""))] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "jsr $26,(%1),%3%J4" - [(set_attr "type" "jsr")]) + [(set_attr "type" "jsr") + (set_attr "cannot_copy" "true")]) (define_insn "*call_value_osf_1_noreturn" [(set (match_operand 0 "" "") @@ -7819,9 +7951,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "! TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && find_reg_note (insn, REG_NORETURN, NULL_RTX)" "@ - jsr $26,($27),0 - bsr $26,$%1..ng - jsr $26,%1" + jsr $26,($27),0%+ + bsr $26,$%1..ng%+ + jsr $26,%1%+" [(set_attr "type" "jsr") (set_attr "length" "*,*,8")]) @@ -7910,7 +8042,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (unspec [(reg:DI 29)] UNSPEC_SIBCALL)] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "@ - br $31,$%1..ng + br $31,%1\t\t!samegp ldq $27,%1($29)\t\t!literal!%#\;jmp $31,($27),%1\t\t!lituse_jsr!%#" [(set_attr "type" "jsr") (set_attr "length" "*,8")]) @@ -7952,20 +8084,19 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 26)) (clobber (reg:DI 27))] "TARGET_ABI_OPEN_VMS" - "* { switch (which_alternative) { case 0: - return \"mov %3,$27\;jsr $26,0\;ldq $27,0($29)\"; + return "mov %3,$27\;jsr $26,0\;ldq $27,0($29)"; case 1: operands [3] = alpha_use_linkage (operands [1], cfun->decl, 1, 0); operands [4] = alpha_use_linkage (operands [1], cfun->decl, 0, 0); - return \"ldq $26,%4\;ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)\"; + return "ldq $26,%4\;ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)"; default: abort(); } -}" +} [(set_attr "type" "jsr") (set_attr "length" "12,16")]) diff --git a/contrib/gcc/config/alpha/ev4.md b/contrib/gcc/config/alpha/ev4.md index 41e1efd..cee3ae6 100644 --- a/contrib/gcc/config/alpha/ev4.md +++ b/contrib/gcc/config/alpha/ev4.md @@ -1,20 +1,20 @@ ;; Scheduling description for Alpha EV4. ;; Copyright (C) 2002 Free Software Foundation, Inc. ;; -;; This file is part of GNU CC. +;; This file is part of GCC. ;; -;; GNU CC is free software; you can redistribute it and/or modify +;; GCC is free software; you can redistribute it and/or modify ;; it under the terms of the GNU General Public License as published by ;; the Free Software Foundation; either version 2, or (at your option) ;; any later version. ;; -;; GNU CC is distributed in the hope that it will be useful, +;; GCC is distributed in the hope that it will be useful, ;; but WITHOUT ANY WARRANTY; without even the implied warranty of ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;; GNU General Public License for more details. ;; ;; You should have received a copy of the GNU General Public License -;; along with GNU CC; see the file COPYING. If not, write to +;; along with GCC; see the file COPYING. If not, write to ;; the Free Software Foundation, 59 Temple Place - Suite 330, ;; Boston, MA 02111-1307, USA. diff --git a/contrib/gcc/config/alpha/ev5.md b/contrib/gcc/config/alpha/ev5.md index 832cf6b..20757e1 100644 --- a/contrib/gcc/config/alpha/ev5.md +++ b/contrib/gcc/config/alpha/ev5.md @@ -1,20 +1,20 @@ ;; Scheduling description for Alpha EV5. ;; Copyright (C) 2002 Free Software Foundation, Inc. ;; -;; This file is part of GNU CC. +;; This file is part of GCC. ;; -;; GNU CC is free software; you can redistribute it and/or modify +;; GCC is free software; you can redistribute it and/or modify ;; it under the terms of the GNU General Public License as published by ;; the Free Software Foundation; either version 2, or (at your option) ;; any later version. ;; -;; GNU CC is distributed in the hope that it will be useful, +;; GCC is distributed in the hope that it will be useful, ;; but WITHOUT ANY WARRANTY; without even the implied warranty of ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;; GNU General Public License for more details. ;; ;; You should have received a copy of the GNU General Public License -;; along with GNU CC; see the file COPYING. If not, write to +;; along with GCC; see the file COPYING. If not, write to ;; the Free Software Foundation, 59 Temple Place - Suite 330, ;; Boston, MA 02111-1307, USA. diff --git a/contrib/gcc/config/alpha/ev6.md b/contrib/gcc/config/alpha/ev6.md index 12204b6..23a09b0 100644 --- a/contrib/gcc/config/alpha/ev6.md +++ b/contrib/gcc/config/alpha/ev6.md @@ -1,20 +1,20 @@ ;; Scheduling description for Alpha EV6. ;; Copyright (C) 2002 Free Software Foundation, Inc. ;; -;; This file is part of GNU CC. +;; This file is part of GCC. ;; -;; GNU CC is free software; you can redistribute it and/or modify +;; GCC is free software; you can redistribute it and/or modify ;; it under the terms of the GNU General Public License as published by ;; the Free Software Foundation; either version 2, or (at your option) ;; any later version. ;; -;; GNU CC is distributed in the hope that it will be useful, +;; GCC is distributed in the hope that it will be useful, ;; but WITHOUT ANY WARRANTY; without even the implied warranty of ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;; GNU General Public License for more details. ;; ;; You should have received a copy of the GNU General Public License -;; along with GNU CC; see the file COPYING. If not, write to +;; along with GCC; see the file COPYING. If not, write to ;; the Free Software Foundation, 59 Temple Place - Suite 330, ;; Boston, MA 02111-1307, USA. diff --git a/contrib/gcc/config/alpha/gnu.h b/contrib/gcc/config/alpha/gnu.h index 9b25daf..40348c6 100644 --- a/contrib/gcc/config/alpha/gnu.h +++ b/contrib/gcc/config/alpha/gnu.h @@ -6,12 +6,8 @@ #undef TARGET_OS_CPP_BUILTINS /* config.gcc includes alpha/linux.h. */ #define TARGET_OS_CPP_BUILTINS() \ do { \ - builtin_define ("__GNU__"); \ - builtin_define ("__ELF__"); \ - builtin_define ("__gnu_hurd__"); \ + HURD_TARGET_OS_CPP_BUILTINS(); \ builtin_define ("_LONGLONG"); \ - builtin_define_std ("unix"); \ - builtin_assert ("system=gnu"); \ } while (0) #undef ELF_DYNAMIC_LINKER diff --git a/contrib/gcc/config/alpha/lib1funcs.asm b/contrib/gcc/config/alpha/lib1funcs.asm index 6bea231..a2abb1f 100644 --- a/contrib/gcc/config/alpha/lib1funcs.asm +++ b/contrib/gcc/config/alpha/lib1funcs.asm @@ -307,7 +307,7 @@ $46: conventions. */ #if TYPE == UNSIGNED && SIZE == 32 /* This could be avoided by adding some CPP hair to the divide loop. - It is probably not worth the added complexity. */ + It is probably not worth the added complexity. */ addl RETREG,0,RETREG #endif diff --git a/contrib/gcc/config/alpha/linux-elf.h b/contrib/gcc/config/alpha/linux-elf.h index 49f5181..025b9a2 100644 --- a/contrib/gcc/config/alpha/linux-elf.h +++ b/contrib/gcc/config/alpha/linux-elf.h @@ -3,20 +3,20 @@ Copyright (C) 1996, 1997 Free Software Foundation, Inc. Contributed by Richard Henderson. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -27,11 +27,7 @@ Boston, MA 02111-1307, USA. */ #define SUBTARGET_EXTRA_SPECS \ { "elf_dynamic_linker", ELF_DYNAMIC_LINKER }, -#ifdef USE_GNULIBC_1 -#define ELF_DYNAMIC_LINKER "/lib/ld.so.1" -#else #define ELF_DYNAMIC_LINKER "/lib/ld-linux.so.2" -#endif #define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax} \ %{O*:-O3} %{!O*:-O1} \ @@ -42,8 +38,8 @@ Boston, MA 02111-1307, USA. */ %{!dynamic-linker:-dynamic-linker %(elf_dynamic_linker)}} \ %{static:-static}}" -#ifndef USE_GNULIBC_1 #undef LIB_SPEC #define LIB_SPEC \ -"%{pthread:-lpthread }%{shared:-lc}%{!shared:%{profile:-lc_p}%{!profile:-lc}} " -#endif +"%{pthread:-lpthread} %{shared:-lc}%{!shared:%{profile:-lc_p}%{!profile:-lc}} " + +#define TARGET_ASM_FILE_END file_end_indicate_exec_stack diff --git a/contrib/gcc/config/alpha/linux.h b/contrib/gcc/config/alpha/linux.h index 3a2940c..a4bc3d3 100644 --- a/contrib/gcc/config/alpha/linux.h +++ b/contrib/gcc/config/alpha/linux.h @@ -1,22 +1,22 @@ /* Definitions of target machine for GNU compiler, for Alpha Linux-based GNU systems. - Copyright (C) 1996, 1997, 1998, 2002 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998, 2002, 2003 Free Software Foundation, Inc. Contributed by Richard Henderson. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -30,8 +30,10 @@ Boston, MA 02111-1307, USA. */ builtin_define_std ("linux"); \ builtin_define_std ("unix"); \ builtin_assert ("system=linux"); \ + builtin_assert ("system=unix"); \ + builtin_assert ("system=posix"); \ /* The GNU C++ standard library requires this. */ \ - if (c_language == clk_cplusplus) \ + if (c_dialect_cxx ()) \ builtin_define ("_GNU_SOURCE"); \ } while (0) @@ -59,6 +61,10 @@ Boston, MA 02111-1307, USA. */ /* Define this so that all GNU/Linux targets handle the same pragmas. */ #define HANDLE_PRAGMA_PACK_PUSH_POP +/* Determine whether the the entire c99 runtime is present in the + runtime library. */ +#define TARGET_C99_FUNCTIONS 1 + #define TARGET_HAS_F_SETLKW #define LINK_GCC_C_SEQUENCE_SPEC \ diff --git a/contrib/gcc/config/alpha/netbsd.h b/contrib/gcc/config/alpha/netbsd.h index e1da9cf..d4f833a 100644 --- a/contrib/gcc/config/alpha/netbsd.h +++ b/contrib/gcc/config/alpha/netbsd.h @@ -1,21 +1,21 @@ /* Definitions of target machine for GNU compiler, for Alpha NetBSD systems. - Copyright (C) 1998, 2002 Free Software Foundation, Inc. + Copyright (C) 1998, 2002, 2003 Free Software Foundation, Inc. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -25,7 +25,6 @@ Boston, MA 02111-1307, USA. */ #define TARGET_OS_CPP_BUILTINS() \ do { \ NETBSD_OS_CPP_BUILTINS_ELF(); \ - NETBSD_OS_CPP_BUILTINS_LP64(); \ } while (0) @@ -77,7 +76,7 @@ Boston, MA 02111-1307, USA. */ /* Attempt to enable execute permissions on the stack. */ -#define TRANSFER_FROM_TRAMPOLINE NETBSD_ENABLE_EXECUTE_STACK +#define ENABLE_EXECUTE_STACK NETBSD_ENABLE_EXECUTE_STACK #undef TARGET_VERSION diff --git a/contrib/gcc/config/alpha/openbsd.h b/contrib/gcc/config/alpha/openbsd.h index b82b66d..b9df2e4 100644 --- a/contrib/gcc/config/alpha/openbsd.h +++ b/contrib/gcc/config/alpha/openbsd.h @@ -1,36 +1,26 @@ /* Configuration file for an alpha OpenBSD target. - Copyright (C) 1999 Free Software Foundation, Inc. + Copyright (C) 1999, 2003 Free Software Foundation, Inc. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* We settle for little endian for now. */ #define TARGET_ENDIAN_DEFAULT 0 -#define OBSD_NO_DYNAMIC_LIBRARIES -#define OBSD_HAS_DECLARE_FUNCTION_NAME -#define OBSD_HAS_DECLARE_FUNCTION_SIZE -#define OBSD_HAS_DECLARE_OBJECT - -/* alpha ecoff supports only weak aliases, see below. */ -#define ASM_WEAKEN_LABEL(FILE,NAME) ASM_OUTPUT_WEAK_ALIAS (FILE,NAME,0) - -#include <openbsd.h> - /* Controlling the compilation driver. */ /* alpha needs __start. */ @@ -82,38 +72,18 @@ Boston, MA 02111-1307, USA. */ /* Assembler format: exception region output. */ /* All configurations that don't use elf must be explicit about not using - dwarf unwind information. egcs doesn't try too hard to check internal - configuration files... */ + dwarf unwind information. */ #ifdef INCOMING_RETURN_ADDR_RTX #undef DWARF2_UNWIND_INFO #define DWARF2_UNWIND_INFO 0 #endif -/* Assembler format: file framework. */ - -/* Taken from alpha/osf.h. This used to be common to all alpha - configurations, but elf has departed from it. - Check alpha/alpha.h, alpha/osf.h for it when egcs is upgraded. */ -#ifndef ASM_FILE_START -#define ASM_FILE_START(FILE) \ -{ \ - alpha_write_verstamp (FILE); \ - fprintf (FILE, "\t.set noreorder\n"); \ - fprintf (FILE, "\t.set volatile\n"); \ - fprintf (FILE, "\t.set noat\n"); \ - if (TARGET_SUPPORT_ARCH) \ - fprintf (FILE, "\t.arch %s\n", \ - TARGET_CPU_EV6 ? "ev6" \ - : (TARGET_CPU_EV5 \ - ? (TARGET_MAX ? "pca56" : TARGET_BWX ? "ev56" : "ev5") \ - : "ev4")); \ - \ - ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \ -} -#endif - /* Assembler format: label output. */ +/* alpha ecoff supports only weak aliases. */ +#undef ASM_WEAKEN_LABEL +#define ASM_WEAKEN_LABEL(FILE,NAME) ASM_OUTPUT_WEAK_ALIAS (FILE,NAME,0) + #define ASM_OUTPUT_WEAK_ALIAS(FILE,NAME,VALUE) \ do { \ fputs ("\t.weakext\t", FILE); \ diff --git a/contrib/gcc/config/alpha/osf.h b/contrib/gcc/config/alpha/osf.h index 2be2a42..1ae6db3 100644 --- a/contrib/gcc/config/alpha/osf.h +++ b/contrib/gcc/config/alpha/osf.h @@ -1,22 +1,22 @@ /* Definitions of target machine for GNU compiler, for DEC Alpha on OSF/1. - Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2001, 2002, 2003 - Free Software Foundation, Inc. + Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2001, 2002, 2003, + 2004 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -49,6 +49,13 @@ Boston, MA 02111-1307, USA. */ to be defined for <math.h>. */ \ if (LONG_DOUBLE_TYPE_SIZE == 128) \ builtin_define ("__X_FLOAT"); \ + \ + /* Tru64 UNIX V4/V5 provide several ISO C94 \ + features protected by the corresponding \ + __STDC_VERSION__ macro. libstdc++ v3 \ + needs them as well. */ \ + if (c_dialect_cxx ()) \ + builtin_define ("__STDC_VERSION__=199409L"); \ } while (0) /* Accept DEC C flags for multithreaded programs. We use _PTHREAD_USE_D4 @@ -84,22 +91,6 @@ Boston, MA 02111-1307, USA. */ #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/" -#define ASM_FILE_START(FILE) \ -{ \ - alpha_write_verstamp (FILE); \ - fprintf (FILE, "\t.set noreorder\n"); \ - fprintf (FILE, "\t.set volatile\n"); \ - fprintf (FILE, "\t.set noat\n"); \ - if (TARGET_SUPPORT_ARCH) \ - fprintf (FILE, "\t.arch %s\n", \ - TARGET_CPU_EV6 ? "ev6" \ - : (TARGET_CPU_EV5 \ - ? (TARGET_MAX ? "pca56" : TARGET_BWX ? "ev56" : "ev5") \ - : "ev4")); \ - \ - ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \ -} - /* Tru64 UNIX V5.1 requires a special as flag. Empty by default. */ #define ASM_OLDAS_SPEC "" @@ -154,14 +145,11 @@ Boston, MA 02111-1307, USA. */ /* Attempt to turn on access permissions for the stack. */ -#define TRANSFER_FROM_TRAMPOLINE \ -extern void __enable_execute_stack PARAMS ((void *)); \ - \ +#define ENABLE_EXECUTE_STACK \ void \ -__enable_execute_stack (addr) \ - void *addr; \ +__enable_execute_stack (void *addr) \ { \ - extern int mprotect PARAMS ((const void *, size_t, int)); \ + extern int mprotect (const void *, size_t, int); \ long size = getpagesize (); \ long mask = ~(size-1); \ char *page = (char *) (((long) addr) & mask); \ @@ -181,6 +169,10 @@ __enable_execute_stack (addr) \ #define LD_INIT_SWITCH "-init" #define LD_FINI_SWITCH "-fini" +/* The linker needs a space after "-o". This allows -oldstyle_liblookup to + be passed to ld. */ +#define SWITCHES_NEED_SPACES "o" + /* Select a format to encode pointers in exception handling data. CODE is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is true if the symbol may be affected by dynamic relocations. diff --git a/contrib/gcc/config/alpha/osf5.h b/contrib/gcc/config/alpha/osf5.h index e483124..e96ae7e 100644 --- a/contrib/gcc/config/alpha/osf5.h +++ b/contrib/gcc/config/alpha/osf5.h @@ -1,29 +1,26 @@ /* Definitions of target machine for GNU compiler, for DEC Alpha on Tru64 5. - Copyright (C) 2000, 2001 Free Software Foundation, Inc. + Copyright (C) 2000, 2001, 2004 Free Software Foundation, Inc. - This file is part of GNU CC. + This file is part of GCC. - GNU CC is free software; you can redistribute it and/or modify + GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. - GNU CC is distributed in the hope that it will be useful, + GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License - along with GNU CC; see the file COPYING. If not, write to + along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* Tru64 5.1 uses IEEE QUAD format. */ -/* ??? However, since there is no support for VAX H_floating, we must - drop back to a 64-bit long double to avoid a crash looking for the - format associated with TFmode. */ -#undef LONG_DOUBLE_TYPE_SIZE -#define LONG_DOUBLE_TYPE_SIZE (TARGET_FLOAT_VAX ? 64 : 128) +#undef TARGET_DEFAULT +#define TARGET_DEFAULT MASK_FP | MASK_FPREGS | MASK_LONG_DOUBLE_128 /* In Tru64 UNIX V5.1, Compaq introduced a new assembler (/usr/lib/cmplrs/cc/adu) which currently (versions between 3.04.29 and @@ -49,3 +46,8 @@ linked. */ #undef TARGET_LD_BUGGY_LDGP #define TARGET_LD_BUGGY_LDGP 1 + +/* Tru64 v5.1 has the float and long double forms of math functions. */ +#undef TARGET_C99_FUNCTIONS +#define TARGET_C99_FUNCTIONS 1 + diff --git a/contrib/gcc/config/alpha/t-osf-pthread b/contrib/gcc/config/alpha/t-osf-pthread new file mode 100644 index 0000000..968e65c --- /dev/null +++ b/contrib/gcc/config/alpha/t-osf-pthread @@ -0,0 +1,5 @@ +# Provide dummy POSIX threads functions +LIB2FUNCS_EXTRA += $(srcdir)/gthr-posix.c + +# Compile libgcc2 with POSIX threads supports +TARGET_LIBGCC2_CFLAGS=-pthread diff --git a/contrib/gcc/config/alpha/t-osf4 b/contrib/gcc/config/alpha/t-osf4 index 0525d61..fe747a3 100644 --- a/contrib/gcc/config/alpha/t-osf4 +++ b/contrib/gcc/config/alpha/t-osf4 @@ -10,7 +10,11 @@ SHLIB_NAME = @shlib_base_name@.so SHLIB_SONAME = @shlib_base_name@.so.1 SHLIB_OBJS = @shlib_objs@ +# Hide all POSIX threads related symbols provided by gthr-posix.c. This +# only has an effect if t-osf-pthread is in use. SHLIB_LINK = $(GCC_FOR_TARGET) $(LIBGCC2_CFLAGS) -shared -nodefaultlibs \ + -Wl,-hidden_symbol,pthread\* -Wl,-hidden_symbol,__pthread\* \ + -Wl,-hidden_symbol,sched_get_\* -Wl,-hidden_symbol,sched_yield \ -Wl,-msym -Wl,-set_version,gcc.1 -Wl,-soname,$(SHLIB_SONAME) \ -o $(SHLIB_NAME) @multilib_flags@ $(SHLIB_OBJS) -lc && \ rm -f $(SHLIB_SONAME) && \ diff --git a/contrib/gcc/config/alpha/unicosmk.h b/contrib/gcc/config/alpha/unicosmk.h index 8f7b53d..9d966d6 100644 --- a/contrib/gcc/config/alpha/unicosmk.h +++ b/contrib/gcc/config/alpha/unicosmk.h @@ -4,20 +4,20 @@ Free Software Foundation, Inc. Contributed by Roman Lechtchinsky (rl@cs.tu-berlin.de) -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -102,8 +102,6 @@ Boston, MA 02111-1307, USA. */ other its replacement, at the start of a routine. This is somewhat complicated on the T3E which is why we use a function. */ -extern int unicosmk_initial_elimination_offset PARAMS ((int, int)); - #undef INITIAL_ELIMINATION_OFFSET #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ do { \ @@ -178,7 +176,7 @@ typedef struct { function whose data type is FNTYPE. For a library call, FNTYPE is 0. */ #undef INIT_CUMULATIVE_ARGS -#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ +#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ do { (CUM).num_args = 0; \ (CUM).num_arg_words = 0; \ (CUM).num_reg_words = 0; \ @@ -220,41 +218,11 @@ do { \ ++(CUM).num_args; \ } while(0) -/* We want the default definition for this. - ??? In fact, we should delete the definition from alpha.h as it - corresponds to the default definition for little-endian machines. */ - -#undef FUNCTION_ARG_PADDING - /* An argument is passed either entirely in registers or entirely on stack. */ #undef FUNCTION_ARG_PARTIAL_NREGS /* #define FUNCTION_ARG_PARTIAL_NREGS(CUM,MODE,TYPE,NAMED) 0 */ -/* Perform any needed actions needed for a function that is receiving a - variable number of arguments. - - On Unicos/Mk, the standard subroutine __T3E_MISMATCH stores all register - arguments on the stack. Unfortunately, it doesn't always store the first - one (i.e. the one that arrives in $16 or $f16). This is not a problem - with stdargs as we always have at least one named argument there. */ - -#undef SETUP_INCOMING_VARARGS -#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ -{ if ((CUM).num_reg_words < 6) \ - { \ - if (! (NO_RTL)) \ - { \ - int start = (CUM).num_reg_words + 1; \ - \ - emit_insn (gen_umk_mismatch_args (GEN_INT (start))); \ - emit_insn (gen_arg_home_umk ()); \ - } \ - \ - PRETEND_SIZE = 0; \ - } \ -} - /* This ensures that $15 increments/decrements in leaf functions won't get eliminated. */ @@ -319,43 +287,33 @@ do { fprintf (FILE, "\tbr $1,0\n"); \ COMMON_SECTION \ SSIB_SECTION -extern void common_section PARAMS ((void)); +extern void common_section (void); #define COMMON_SECTION \ void \ -common_section () \ +common_section (void) \ { \ in_section = in_common; \ } -extern void ssib_section PARAMS ((void)); +extern void ssib_section (void); #define SSIB_SECTION \ void \ -ssib_section () \ +ssib_section (void) \ { \ in_section = in_ssib; \ } -/* This outputs text to go at the start of an assembler file. */ - -#undef ASM_FILE_START -#define ASM_FILE_START(FILE) unicosmk_asm_file_start (FILE) - -/* This outputs text to go at the end of an assembler file. */ - -#undef ASM_FILE_END -#define ASM_FILE_END(FILE) unicosmk_asm_file_end (FILE) - -/* We take care of that in ASM_FILE_START. */ +/* We take care of this in unicosmk_file_start. */ #undef ASM_OUTPUT_SOURCE_FILENAME /* This is how to output a label for a jump table. Arguments are the same as - for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is + for (*targetm.asm_out.internal_label), except the insn for the jump table is passed. */ #undef ASM_OUTPUT_CASE_LABEL #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM) + (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM) /* CAM has some restrictions with respect to string literals. It won't accept lines with more that 256 characters which means that we have @@ -453,7 +411,8 @@ ssib_section () \ #undef ASM_OUTPUT_SKIP #define ASM_OUTPUT_SKIP(STREAM,SIZE) \ - fprintf ((STREAM), "\t.byte\t0:%d\n", (SIZE)); + fprintf ((STREAM), "\t.byte\t0:"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\ + (SIZE)); /* This says how to output an assembler line to define a global common symbol. We need the alignment information because it has to be supplied @@ -470,7 +429,7 @@ ssib_section () \ do { data_section (); \ fprintf (FILE, "\t.align\t%d\n", floor_log2 ((ALIGN) / BITS_PER_UNIT));\ ASM_OUTPUT_LABEL ((FILE), (NAME)); \ - fprintf (FILE, "\t.byte 0:%d\n", SIZE); \ + fprintf (FILE, "\t.byte 0:"HOST_WIDE_INT_PRINT_UNSIGNED"\n",(SIZE));\ } while (0) /* CAM does not allow us to declare a symbol as external first and then @@ -521,28 +480,9 @@ ssib_section () \ #undef SDB_DEBUGGING_INFO #undef MIPS_DEBUGGING_INFO #undef DBX_DEBUGGING_INFO -#undef DWARF_DEBUGGING_INFO #undef DWARF2_DEBUGGING_INFO #undef DWARF2_UNWIND_INFO #undef INCOMING_RETURN_ADDR_RTX - - -/* We use the functions provided by the system library for integer - division. */ - -#undef UDIVDI3_LIBCALL -#undef DIVDI3_LIBCALL -#define UDIVDI3_LIBCALL "$uldiv" -#define DIVDI3_LIBCALL "$sldiv" - -/* This is necessary to prevent gcc from generating calls to __divsi3. */ - -#define INIT_TARGET_OPTABS \ - do { \ - sdiv_optab->handlers[(int) SImode].libfunc = NULL_RTX; \ - udiv_optab->handlers[(int) SImode].libfunc = NULL_RTX; \ - } while (0) - #undef ASM_OUTPUT_SOURCE_LINE /* We don't need a start file. */ @@ -555,7 +495,6 @@ ssib_section () \ #undef LIB_SPEC #define LIB_SPEC "-L/opt/ctl/craylibs/craylibs -lu -lm -lc -lsma" -#undef BUILD_VA_LIST_TYPE #undef EXPAND_BUILTIN_VA_START #undef EXPAND_BUILTIN_VA_ARG diff --git a/contrib/gcc/config/alpha/vms-cc.c b/contrib/gcc/config/alpha/vms-cc.c index 26c3ae3..672a30f 100644 --- a/contrib/gcc/config/alpha/vms-cc.c +++ b/contrib/gcc/config/alpha/vms-cc.c @@ -1,21 +1,21 @@ /* VMS DEC C wrapper. - Copyright (C) 2001 Free Software Foundation, Inc. + Copyright (C) 2001, 2003 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -25,6 +25,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #undef PATH_SEPARATOR #undef PATH_SEPARATOR_STR @@ -32,50 +34,47 @@ Boston, MA 02111-1307, USA. */ #define PATH_SEPARATOR_STR "," /* These can be set by command line arguments */ -int verbose = 0; -int save_temps = 0; +static int verbose = 0; +static int save_temps = 0; -int comp_arg_max = -1; -const char **comp_args = 0; -int comp_arg_index = -1; -char *objfilename = 0; +static int comp_arg_max = -1; +static const char **comp_args = 0; +static int comp_arg_index = -1; +static char *objfilename = 0; -char *system_search_dirs = (char *) ""; -char *search_dirs; +static char *system_search_dirs = (char *) ""; +static char *search_dirs; -char *default_defines = (char *) ""; -char *defines; +static char *default_defines = (char *) ""; +static char *defines; /* Translate a Unix syntax directory specification into VMS syntax. - If indicators of VMS syntax found, return input string. */ -static char *to_host_dir_spec PARAMS ((char *)); + If indicators of VMS syntax found, return input string. */ +static char *to_host_dir_spec (char *); /* Translate a Unix syntax file specification into VMS syntax. - If indicators of VMS syntax found, return input string. */ -static char *to_host_file_spec PARAMS ((char *)); + If indicators of VMS syntax found, return input string. */ +static char *to_host_file_spec (char *); -/* Add a translated arg to the list to be passed to DEC CC */ -static void addarg PARAMS ((const char *)); +/* Add a translated arg to the list to be passed to DEC CC. */ +static void addarg (const char *); /* Preprocess the number of args in P_ARGC and contained in ARGV. - Look for special flags, etc. that must be handled first. */ -static void preprocess_args PARAMS ((int *, char **)); + Look for special flags, etc. that must be handled first. */ +static void preprocess_args (int *, char **); /* Process the number of args in P_ARGC and contained in ARGV. Look - for special flags, etc. that must be handled for the VMS compiler. */ -static void process_args PARAMS ((int *, char **)); + for special flags, etc. that must be handled for the VMS compiler. */ +static void process_args (int *, char **); /* Action routine called by decc$to_vms */ -static int translate_unix PARAMS ((char *, int)); - -int main PARAMS ((int, char **)); +static int translate_unix (char *, int); /* Add the argument contained in STR to the list of arguments to pass to the compiler. */ static void -addarg (str) - const char *str; +addarg (const char *str) { int i; @@ -98,9 +97,7 @@ addarg (str) } static void -preprocess_args (p_argc, argv) - int *p_argc; - char *argv[]; +preprocess_args (int *p_argc, char *argv[]) { int i; @@ -120,9 +117,7 @@ preprocess_args (p_argc, argv) } static void -process_args (p_argc, argv) - int *p_argc; - char *argv[]; +process_args (int *p_argc, char *argv[]) { int i; @@ -183,9 +178,7 @@ process_args (p_argc, argv) typedef struct dsc {unsigned short len, mbz; char *adr; } Descr; int -main (argc, argv) - int argc; - char **argv; +main (int argc, char **argv) { int i; char cwdev [128], *devptr; @@ -318,17 +311,14 @@ static char new_host_dirspec [255]; static char filename_buff [256]; static int -translate_unix (name, type) - char *name; - int type ATTRIBUTE_UNUSED; +translate_unix (char *name, int type ATTRIBUTE_UNUSED) { strcpy (filename_buff, name); return 0; } static char * -to_host_dir_spec (dirspec) - char *dirspec; +to_host_dir_spec (char *dirspec) { int len = strlen (dirspec); @@ -351,8 +341,7 @@ to_host_dir_spec (dirspec) } static char * -to_host_file_spec (filespec) - char *filespec; +to_host_file_spec (char *filespec) { strcpy (new_host_filespec, ""); if (strchr (filespec, ']') || strchr (filespec, ':')) diff --git a/contrib/gcc/config/alpha/vms-crt0-64.c b/contrib/gcc/config/alpha/vms-crt0-64.c index 82ba322..9792f92 100644 --- a/contrib/gcc/config/alpha/vms-crt0-64.c +++ b/contrib/gcc/config/alpha/vms-crt0-64.c @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -77,7 +77,7 @@ __main (arg1, arg2, arg3, image_file_desc, arg5, arg6) #pragma __pointer_size long - /* Reallocate argv with 64 bit pointers. */ + /* Reallocate argv with 64 bit pointers. */ long_argv = (char **) malloc (sizeof (char *) * (argc + 1)); for (i = 0; i < argc; i++) diff --git a/contrib/gcc/config/alpha/vms-crt0.c b/contrib/gcc/config/alpha/vms-crt0.c index b7665f9..88896c6 100644 --- a/contrib/gcc/config/alpha/vms-crt0.c +++ b/contrib/gcc/config/alpha/vms-crt0.c @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -33,7 +33,7 @@ You Lose! This file can only be compiled with DEC C. #else /* This file can only be compiled with DEC C, due to the call to - lib$establish. */ + lib$establish. */ #include <stdlib.h> #include <string.h> diff --git a/contrib/gcc/config/alpha/vms-dwarf2.asm b/contrib/gcc/config/alpha/vms-dwarf2.asm index a94ae24..1f68a80 100644 --- a/contrib/gcc/config/alpha/vms-dwarf2.asm +++ b/contrib/gcc/config/alpha/vms-dwarf2.asm @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ diff --git a/contrib/gcc/config/alpha/vms-dwarf2eh.asm b/contrib/gcc/config/alpha/vms-dwarf2eh.asm index 22f7050..2cdbeb1 100644 --- a/contrib/gcc/config/alpha/vms-dwarf2eh.asm +++ b/contrib/gcc/config/alpha/vms-dwarf2eh.asm @@ -2,9 +2,9 @@ Copyright (C) 2002 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ diff --git a/contrib/gcc/config/alpha/vms-ld.c b/contrib/gcc/config/alpha/vms-ld.c index e5688d8..cb1d4c9 100644 --- a/contrib/gcc/config/alpha/vms-ld.c +++ b/contrib/gcc/config/alpha/vms-ld.c @@ -1,22 +1,22 @@ /* VMS linker wrapper. - Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002 + Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -26,6 +26,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" typedef struct dsc {unsigned short len, mbz; char *adr; } Descr; @@ -42,7 +44,7 @@ static char *vmsdwarf2spec = 0; /* File specification for vms-dwarf2eh.o. */ static char *vmsdwarf2ehspec = 0; -/* verbose = 1 if -v passed. */ +/* verbose = 1 if -v passed. */ static int verbose = 0; /* save_temps = 1 if -save-temps passed. */ @@ -87,39 +89,38 @@ static char *search_dirs; /* Add STR to the list of arguments to pass to the linker. Expand the list as necessary to accommodate. */ -static void addarg PARAMS ((const char *)); +static void addarg (const char *); /* Check to see if NAME is a regular file, i.e. not a directory */ -static int is_regular_file PARAMS ((char *)); +static int is_regular_file (char *); /* Translate a Unix syntax file specification FILESPEC into VMS syntax. - If indicators of VMS syntax found, return input string. */ -static char *to_host_file_spec PARAMS ((char *)); + If indicators of VMS syntax found, return input string. */ +static char *to_host_file_spec (char *); -/* Locate the library named LIB_NAME in the set of paths PATH_VAL. */ -static char *locate_lib PARAMS ((char *, char *)); +/* Locate the library named LIB_NAME in the set of paths PATH_VAL. */ +static char *locate_lib (char *, char *); /* Given a library name NAME, i.e. foo, Look for libfoo.lib and then libfoo.a in the set of directories we are allowed to search in. */ -static const char *expand_lib PARAMS ((char *)); +static const char *expand_lib (char *); /* Preprocess the number of args P_ARGC in ARGV. - Look for special flags, etc. that must be handled first. */ -static void preprocess_args PARAMS ((int *, char **)); + Look for special flags, etc. that must be handled first. */ +static void preprocess_args (int *, char **); /* Preprocess the number of args P_ARGC in ARGV. Look for - special flags, etc. that must be handled for the VMS linker. */ -static void process_args PARAMS ((int *, char **)); + special flags, etc. that must be handled for the VMS linker. */ +static void process_args (int *, char **); /* Action routine called by decc$to_vms. NAME is a file name or - directory name. TYPE is unused. */ -static int translate_unix PARAMS ((char *, int)); + directory name. TYPE is unused. */ +static int translate_unix (char *, int); -int main PARAMS ((int, char **)); +int main (int, char **); static void -addarg (str) - const char *str; +addarg (const char *str) { int i; @@ -142,9 +143,7 @@ addarg (str) } static char * -locate_lib (lib_name, path_val) - char *lib_name; - char *path_val; +locate_lib (char *lib_name, char *path_val) { int lib_len = strlen (lib_name); char *eptr, *sptr; @@ -204,8 +203,7 @@ locate_lib (lib_name, path_val) } static const char * -expand_lib (name) - char *name; +expand_lib (char *name) { char *lib, *lib_path; @@ -238,8 +236,7 @@ expand_lib (name) } static int -is_regular_file (name) - char *name; +is_regular_file (char *name) { int ret; struct stat statbuf; @@ -249,9 +246,7 @@ is_regular_file (name) } static void -preprocess_args (p_argc, argv) - int *p_argc; - char **argv; +preprocess_args (int *p_argc, char **argv) { int i; @@ -303,9 +298,7 @@ preprocess_args (p_argc, argv) } static void -process_args (p_argc, argv) - int *p_argc; - char **argv; +process_args (int *p_argc, char **argv) { int i; @@ -379,9 +372,7 @@ process_args (p_argc, argv) and args to be what the VMS linker wants. */ int -main (argc, argv) - int argc; - char **argv; +main (int argc, char **argv) { int i; char cwdev [128], *devptr; @@ -751,17 +742,14 @@ static char new_host_filespec [255]; static char filename_buff [256]; static int -translate_unix (name, type) - char *name; - int type ATTRIBUTE_UNUSED; +translate_unix (char *name, int type ATTRIBUTE_UNUSED) { strcpy (filename_buff, name); return 0; } static char * -to_host_file_spec (filespec) - char *filespec; +to_host_file_spec (char *filespec) { strcpy (new_host_filespec, ""); if (strchr (filespec, ']') || strchr (filespec, ':')) diff --git a/contrib/gcc/config/alpha/vms-psxcrt0-64.c b/contrib/gcc/config/alpha/vms-psxcrt0-64.c index b16e8b4..8ca9e1d 100644 --- a/contrib/gcc/config/alpha/vms-psxcrt0-64.c +++ b/contrib/gcc/config/alpha/vms-psxcrt0-64.c @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -79,7 +79,7 @@ __main (arg1, arg2, arg3, image_file_desc, arg5, arg6) #pragma __pointer_size long - /* Reallocate argv with 64 bit pointers. */ + /* Reallocate argv with 64 bit pointers. */ long_argv = (char **) malloc (sizeof (char *) * (argc + 1)); for (i = 0; i < argc; i++) diff --git a/contrib/gcc/config/alpha/vms-psxcrt0.c b/contrib/gcc/config/alpha/vms-psxcrt0.c index c4140b4..65962ee 100644 --- a/contrib/gcc/config/alpha/vms-psxcrt0.c +++ b/contrib/gcc/config/alpha/vms-psxcrt0.c @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -33,7 +33,7 @@ You Lose! This file can only be compiled with DEC C. #else /* This file can only be compiled with DEC C, due to the call to - lib$establish. */ + lib$establish. */ #include <stdlib.h> #include <string.h> diff --git a/contrib/gcc/config/alpha/vms.h b/contrib/gcc/config/alpha/vms.h index 8df6156..f7058f3 100644 --- a/contrib/gcc/config/alpha/vms.h +++ b/contrib/gcc/config/alpha/vms.h @@ -1,21 +1,21 @@ /* Output variables, constants and external declarations, for GNU compiler. - Copyright (C) 1996, 1997, 1998, 2000, 2001, 2002 + Copyright (C) 1996, 1997, 1998, 2000, 2001, 2002, 2004 Free Software Foundation, Inc. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -41,9 +41,6 @@ Boston, MA 02111-1307, USA. */ builtin_define ("__IEEE_FLOAT"); \ } while (0) -/* By default, allow $ to be part of an identifier. */ -#define DOLLARS_IN_IDENTIFIERS 2 - #undef TARGET_DEFAULT #define TARGET_DEFAULT (MASK_FP|MASK_FPREGS|MASK_GAS) #undef TARGET_ABI_OPEN_VMS @@ -54,9 +51,6 @@ Boston, MA 02111-1307, USA. */ #undef TARGET_VERSION #define TARGET_VERSION fprintf (stderr, " (%s)", TARGET_NAME); -/* The structure return address arrives as an "argument" on VMS. */ -#undef STRUCT_VALUE_REGNUM -#define STRUCT_VALUE 0 #undef PCC_STATIC_STRUCT_RETURN /* "long" is 32 bits, but 64 bits for Ada. */ @@ -178,7 +172,7 @@ typedef struct {int num_args; enum avms_arg_type atypes[6];} avms_arg_info; For a library call, FNTYPE is 0. */ #undef INIT_CUMULATIVE_ARGS -#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ +#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ (CUM).num_args = 0; \ (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \ (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; @@ -205,61 +199,10 @@ typedef struct {int num_args; enum avms_arg_type atypes[6];} avms_arg_info; + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \ ? 6 - (CUM).num_args : 0) -/* Perform any needed actions needed for a function that is receiving a - variable number of arguments. - - CUM is as for INIT_CUMULATIVE_ARGS. - - MODE and TYPE are the mode and type of the current parameter. - - PRETEND_SIZE is a variable that should be set to the amount of stack - that must be pushed by the prolog to pretend that our caller pushed - it. - - Normally, this macro will push all remaining incoming registers on the - stack and set PRETEND_SIZE to the length of the registers pushed. - - For VMS, we allocate space for all 6 arg registers plus a count. - - However, if NO registers need to be saved, don't allocate any space. - This is not only because we won't need the space, but because AP includes - the current_pretend_args_size and we don't want to mess up any - ap-relative addresses already made. */ - -#undef SETUP_INCOMING_VARARGS -#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ -{ if ((CUM).num_args < 6) \ - { \ - if (! (NO_RTL)) \ - { \ - emit_move_insn (gen_rtx_REG (DImode, 1), \ - virtual_incoming_args_rtx); \ - emit_insn (gen_arg_home ()); \ - } \ - \ - PRETEND_SIZE = 7 * UNITS_PER_WORD; \ - } \ -} - /* ABI has stack checking, but it's broken. */ #undef STACK_CHECK_BUILTIN #define STACK_CHECK_BUILTIN 0 -#undef ASM_FILE_START -#define ASM_FILE_START(FILE) \ -{ \ - alpha_write_verstamp (FILE); \ - fprintf (FILE, "\t.set noreorder\n"); \ - fprintf (FILE, "\t.set volatile\n"); \ - if (TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX) \ - { \ - fprintf (FILE, "\t.arch %s\n", \ - (TARGET_CPU_EV6 ? "ev6" \ - : TARGET_MAX ? "pca56" : "ev56")); \ - } \ - ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \ -} - #define LINK_SECTION_ASM_OP "\t.link" #define READONLY_DATA_SECTION_ASM_OP "\t.rdata" #define LITERALS_SECTION_ASM_OP "\t.literals" @@ -272,7 +215,7 @@ typedef struct {int num_args; enum avms_arg_type atypes[6];} avms_arg_info; #undef EXTRA_SECTION_FUNCTIONS #define EXTRA_SECTION_FUNCTIONS \ void \ -link_section () \ +link_section (void) \ { \ if (in_section != in_link) \ { \ @@ -281,7 +224,7 @@ link_section () \ } \ } \ void \ -literals_section () \ +literals_section (void) \ { \ if (in_section != in_literals) \ { \ @@ -290,8 +233,8 @@ literals_section () \ } \ } -extern void link_section PARAMS ((void)); -extern void literals_section PARAMS ((void)); +extern void link_section (void); +extern void literals_section (void); #undef ASM_OUTPUT_ADDR_DIFF_ELT #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) abort () @@ -306,7 +249,7 @@ extern void literals_section PARAMS ((void)); #undef ASM_OUTPUT_CASE_LABEL #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ -{ ASM_OUTPUT_ALIGN (FILE, 3); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } +{ ASM_OUTPUT_ALIGN (FILE, 3); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); } /* This says how to output assembler code to declare an uninitialized external linkage data object. */ @@ -318,7 +261,7 @@ extern void literals_section PARAMS ((void)); do { \ fprintf ((FILE), "%s", COMMON_ASM_OP); \ assemble_name ((FILE), (NAME)); \ - fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \ + fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED ",%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \ } while (0) @@ -448,10 +391,7 @@ do { \ #undef PREFERRED_DEBUGGING_TYPE #define PREFERRED_DEBUGGING_TYPE VMS_AND_DWARF2_DEBUG -#undef ASM_FORMAT_PRIVATE_NAME -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \ - sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s___%lu" /* ??? VMS uses different linkage. */ #undef TARGET_ASM_OUTPUT_MI_THUNK @@ -479,7 +419,7 @@ do { \ } /* Link with vms-dwarf2.o if -g (except -g0). This causes the - VMS link to pull all the dwarf2 debug sections together. */ + VMS link to pull all the dwarf2 debug sections together. */ #undef LINK_SPEC #define LINK_SPEC "%{g:-g vms-dwarf2.o%s} %{g0} %{g1:-g1 vms-dwarf2.o%s} \ %{g2:-g2 vms-dwarf2.o%s} %{g3:-g3 vms-dwarf2.o%s} %{shared} %{v} %{map}" @@ -491,16 +431,6 @@ do { \ #undef LIB_SPEC #define LIB_SPEC "-lc" -/* Define the names of the division and modulus functions. */ -#define DIVSI3_LIBCALL "OTS$DIV_I" -#define DIVDI3_LIBCALL "OTS$DIV_L" -#define UDIVSI3_LIBCALL "OTS$DIV_UI" -#define UDIVDI3_LIBCALL "OTS$DIV_UL" -#define MODSI3_LIBCALL "OTS$REM_I" -#define MODDI3_LIBCALL "OTS$REM_L" -#define UMODSI3_LIBCALL "OTS$REM_UI" -#define UMODDI3_LIBCALL "OTS$REM_UL" - #define NAME__MAIN "__gccmain" #define SYMBOL__MAIN __gccmain diff --git a/contrib/gcc/config/alpha/vms64.h b/contrib/gcc/config/alpha/vms64.h index 3b4f587..29de9a5 100644 --- a/contrib/gcc/config/alpha/vms64.h +++ b/contrib/gcc/config/alpha/vms64.h @@ -2,20 +2,20 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ diff --git a/contrib/gcc/config/alpha/vms_tramp.asm b/contrib/gcc/config/alpha/vms_tramp.asm index 9a6a1c8..1eb1e2b 100644 --- a/contrib/gcc/config/alpha/vms_tramp.asm +++ b/contrib/gcc/config/alpha/vms_tramp.asm @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ diff --git a/contrib/gcc/config/alpha/xm-vms.h b/contrib/gcc/config/alpha/xm-vms.h index 7bfceba..bdac52e 100644 --- a/contrib/gcc/config/alpha/xm-vms.h +++ b/contrib/gcc/config/alpha/xm-vms.h @@ -2,26 +2,23 @@ Copyright (C) 1996, 1997, 2001 Free Software Foundation, Inc. Contributed by Klaus Kaempf (kkaempf@progis.de). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#define HOST_WIDE_INT long long -#define HOST_BITS_PER_WIDE_INT 64 - /* A couple of conditionals for execution machine are controlled here. */ #ifndef VMS #define VMS |
