This commit was generated by cvs2svn to compensate for changes in r96263,

which included commits to RCS files with non-trunk default branches.

10 files changed, 185 insertions, 117 deletions

diff --git a/contrib/gcc/config/alpha/alpha-protos.h b/contrib/gcc/config/alpha/alpha-protos.h
index 2ff0350..c6fdd04 100644
--- a/contrib/gcc/config/alpha/alpha-protos.h
+++ b/contrib/gcc/config/alpha/alpha-protos.h
@@ -59,7 +59,7 @@ extern int current_file_function_operand PARAMS ((rtx, enum machine_mode));
 extern int direct_call_operand PARAMS ((rtx, enum machine_mode));
 extern int local_symbolic_operand PARAMS ((rtx, enum machine_mode));
 extern int small_symbolic_operand PARAMS ((rtx, enum machine_mode));
-extern int some_small_symbolic_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int some_small_symbolic_operand PARAMS ((rtx, enum machine_mode));
 extern int global_symbolic_operand PARAMS ((rtx, enum machine_mode));
 extern int call_operand PARAMS ((rtx, enum machine_mode));
 extern int symbolic_operand PARAMS ((rtx, enum machine_mode));
@@ -90,7 +90,7 @@ extern rtx alpha_legitimize_address PARAMS ((rtx, rtx, enum machine_mode));
 extern rtx alpha_legitimize_reload_address PARAMS ((rtx, enum machine_mode,
 						    int, int, int));
 
-extern rtx split_small_symbolic_mem_operand PARAMS ((rtx));
+extern rtx split_small_symbolic_operand PARAMS ((rtx));
 
 extern void get_aligned_mem PARAMS ((rtx, rtx *, rtx *));
 extern rtx get_unaligned_address PARAMS ((rtx, int));
@@ -163,6 +163,8 @@ extern rtx function_arg PARAMS ((CUMULATIVE_ARGS, enum machine_mode,
 #endif
 extern void alpha_start_function PARAMS ((FILE *, const char *, tree));
 extern void alpha_end_function PARAMS ((FILE *, const char *, tree));
+extern void alpha_output_mi_thunk_osf PARAMS ((FILE *, tree,
+					       HOST_WIDE_INT, tree));
 extern void alpha_encode_section_info PARAMS ((tree));
 #endif /* TREE CODE */
 
diff --git a/contrib/gcc/config/alpha/alpha.h b/contrib/gcc/config/alpha/alpha.h
index dd8d820..b2363bc 100644
--- a/contrib/gcc/config/alpha/alpha.h
+++ b/contrib/gcc/config/alpha/alpha.h
@@ -43,12 +43,6 @@ Boston, MA 02111-1307, USA.  */
 #define CPP_SUBTARGET_SPEC ""
 #endif
 
-/* Set the spec to use for signed char.  The default tests the above macro
-   but DEC's compiler can't handle the conditional in a "constant"
-   operand.  */
-
-#define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"
-
 #define WORD_SWITCH_TAKES_ARG(STR)		\
  (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
 
@@ -2079,7 +2073,8 @@ do {						\
   {"reg_no_subreg_operand", {REG}},					\
   {"addition_operation", {PLUS}},					\
   {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}},			\
-  {"some_small_symbolic_mem_operand", {SET, PARALLEL}},
+  {"some_small_symbolic_operand", {SET, PARALLEL, PREFETCH, UNSPEC,	\
+				   UNSPEC_VOLATILE}},
 
 /* Define the `__builtin_va_list' type for the ABI.  */
 #define BUILD_VA_LIST_TYPE(VALIST) \
@@ -2242,3 +2237,8 @@ do {							\
 
 /* Generate calls to memcpy, etc., not bcopy, etc.  */
 #define TARGET_MEM_FUNCTIONS 1
+
+/* Output code to add DELTA to the first argument, and then jump to FUNCTION.
+   Used for C++ multiple inheritance.  */
+#define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
+  alpha_output_mi_thunk_osf (FILE, THUNK_FNDECL, DELTA, FUNCTION)
diff --git a/contrib/gcc/config/alpha/alpha.md b/contrib/gcc/config/alpha/alpha.md
index b987de8..785a61d 100644
--- a/contrib/gcc/config/alpha/alpha.md
+++ b/contrib/gcc/config/alpha/alpha.md
@@ -39,6 +39,7 @@
    (UNSPEC_LITERAL	11)
    (UNSPEC_LITUSE	12)
    (UNSPEC_SIBCALL	13)
+   (UNSPEC_SYMBOL	14)
   ])
 
 ;; UNSPEC_VOLATILE:
@@ -518,31 +519,14 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
 	(sign_extend:DI (match_dup 1)))]
   "")
 
-;; Do addsi3 the way expand_binop would do if we didn't have one.  This
-;; generates better code.  We have the anonymous addsi3 pattern below in
-;; case combine wants to make it.
+;; Don't say we have addsi3 if optimizing.  This generates better code.  We
+;; have the anonymous addsi3 pattern below in case combine wants to make it.
 (define_expand "addsi3"
   [(set (match_operand:SI 0 "register_operand" "")
 	(plus:SI (match_operand:SI 1 "reg_or_0_operand" "")
 		 (match_operand:SI 2 "add_operand" "")))]
-  ""
-{
-  if (optimize)
-    {
-      rtx op1 = gen_lowpart (DImode, operands[1]);
-      rtx op2 = gen_lowpart (DImode, operands[2]);
-
-      if (! cse_not_expected)
-        {
-          rtx tmp = gen_reg_rtx (DImode);
-          emit_insn (gen_adddi3 (tmp, op1, op2));
-          emit_move_insn (gen_lowpart (DImode, operands[0]), tmp);
-        }
-      else
-        emit_insn (gen_adddi3 (gen_lowpart (DImode, operands[0]), op1, op2));
-      DONE;
-    }
-})
+  "! optimize"
+  "")
 
 (define_insn "*addsi_internal"
   [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
@@ -581,6 +565,17 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
    addl %r1,%2,%0
    subl %r1,%n2,%0")
 
+(define_insn "*addsi_se2"
+  [(set (match_operand:DI 0 "register_operand" "=r,r")
+	(sign_extend:DI
+	 (subreg:SI (plus:DI (match_operand:DI 1 "reg_or_0_operand" "%rJ,rJ")
+			     (match_operand:DI 2 "sext_add_operand" "rI,O"))
+		    0)))]
+  ""
+  "@
+   addl %r1,%2,%0
+   subl %r1,%n2,%0")
+
 (define_split
   [(set (match_operand:DI 0 "register_operand" "")
 	(sign_extend:DI
@@ -844,24 +839,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
   [(set (match_operand:SI 0 "register_operand" "")
 	(minus:SI (match_operand:SI 1 "reg_or_0_operand" "")
 		  (match_operand:SI 2 "reg_or_8bit_operand" "")))]
-  ""
-{
-  if (optimize)
-    {
-      rtx op1 = gen_lowpart (DImode, operands[1]);
-      rtx op2 = gen_lowpart (DImode, operands[2]);
-
-      if (! cse_not_expected)
-        {
-          rtx tmp = gen_reg_rtx (DImode);
-          emit_insn (gen_subdi3 (tmp, op1, op2));
-          emit_move_insn (gen_lowpart (DImode, operands[0]), tmp);
-        }
-      else
-        emit_insn (gen_subdi3 (gen_lowpart (DImode, operands[0]), op1, op2));
-      DONE;
-    }
-})
+  "! optimize"
+  "")
 
 (define_insn "*subsi_internal"
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -877,6 +856,15 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
   ""
   "subl %r1,%2,%0")
 
+(define_insn "*subsi_se2"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+	(sign_extend:DI
+	 (subreg:SI (minus:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
+			      (match_operand:DI 2 "reg_or_8bit_operand" "rI"))
+		    0)))]
+  ""
+  "subl %r1,%2,%0")
+
 (define_insn "subvsi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(minus:SI (match_operand:SI 1 "reg_or_0_operand" "rJ")
@@ -1610,23 +1598,20 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
 }
   [(set_attr "type" "iadd,shift")])
 
-;; ??? The following pattern is made by combine, but earlier phases
-;; (specifically flow) can't handle it.  This occurs in jump.c.  Deal
-;; with this in a better way at some point.
-;;(define_insn ""
-;;  [(set (match_operand:DI 0 "register_operand" "=r")
-;;	(sign_extend:DI
-;;	 (subreg:SI (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
-;;			       (match_operand:DI 2 "const_int_operand" "P"))
-;;		    0)))]
-;;  "INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3"
-;;{
-;;  if (operands[2] == const1_rtx)
-;;    return "addl %r1,%r1,%0";
-;;  else
-;;    return "s%P2addl %r1,0,%0";
-;;}
-;;  [(set_attr "type" "iadd")])
+(define_insn "*ashldi_se"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+	(sign_extend:DI
+	 (subreg:SI (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
+			       (match_operand:DI 2 "const_int_operand" "P"))
+		    0)))]
+  "INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3"
+{
+  if (operands[2] == const1_rtx)
+    return "addl %r1,%r1,%0";
+  else
+    return "s%P2addl %r1,0,%0";
+}
+  [(set_attr "type" "iadd")])
 
 (define_insn "lshrdi3"
   [(set (match_operand:DI 0 "register_operand" "=r")
@@ -5111,6 +5096,16 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
   ""
   "call_pal 0x86"
   [(set_attr "type" "ibr")])
+
+;; BUGCHK is documented common to OSF/1 and VMS PALcode.
+;; NT does not document anything at 0x81 -- presumably it would generate
+;; the equivalent of SIGILL, but this isn't that important.
+;; ??? Presuming unicosmk uses either OSF/1 or VMS PALcode.
+(define_insn "trap"
+  [(trap_if (const_int 1) (const_int 0))]
+  "!TARGET_ABI_WINDOWS_NT"
+  "call_pal 0x81"
+  [(set_attr "type" "ibr")])
 
 ;; Finally, we have the basic data motion insns.  The byte and word insns
 ;; are done via define_expand.  Start with the floating-point insns, since
@@ -5292,10 +5287,11 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
    itofs %1,%0"
   [(set_attr "type" "ilog,iadd,iadd,ild,ist,fcpys,fld,fst,ftoi,itof")])
 
-(define_insn "*movsi_nt_vms"
+(define_insn "*movsi_nt_vms_nofix"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m,*f,*f,m")
 	(match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ,*fJ,m,*f"))]
   "(TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS)
+    && !TARGET_FIX
     && (register_operand (operands[0], SImode)
         || reg_or_0_operand (operands[1], SImode))"
   "@
@@ -5310,6 +5306,27 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
    st%, %R1,%0"
   [(set_attr "type" "ilog,iadd,iadd,ldsym,ild,ist,fcpys,fld,fst")])
 
+(define_insn "*movsi_nt_vms_fix"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m,*f,*f,m,r,*f")
+	(match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ,*fJ,m,*f,*f,r"))]
+  "(TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS)
+    && TARGET_FIX
+    && (register_operand (operands[0], SImode)
+        || reg_or_0_operand (operands[1], SImode))"
+  "@
+   bis $31,%1,%0
+   lda %0,%1
+   ldah %0,%h1
+   lda %0,%1
+   ldl %0,%1
+   stl %r1,%0
+   cpys %R1,%R1,%0
+   ld%, %0,%1
+   st%, %R1,%0
+   ftois %1,%0
+   itofs %1,%0"
+  [(set_attr "type" "ilog,iadd,iadd,ldsym,ild,ist,fcpys,fld,fst,ftoi,itof")])
+
 (define_insn "*movhi_nobwx"
   [(set (match_operand:HI 0 "register_operand" "=r,r")
 	(match_operand:HI 1 "input_operand" "rJ,n"))]
@@ -5501,10 +5518,10 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
   "operands[2] = pic_offset_table_rtx;")
 
 (define_split
-  [(match_operand 0 "some_small_symbolic_mem_operand" "")]
+  [(match_operand 0 "some_small_symbolic_operand" "")]
   "TARGET_EXPLICIT_RELOCS && reload_completed"
   [(match_dup 0)]
-  "operands[0] = split_small_symbolic_mem_operand (operands[0]);")
+  "operands[0] = split_small_symbolic_operand (operands[0]);")
 
 (define_insn "movdi_er_high_g"
   [(set (match_operand:DI 0 "register_operand" "=r")
@@ -5531,6 +5548,41 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
 		    (const_int 0)] UNSPEC_LITERAL))]
   "operands[2] = pic_offset_table_rtx;")
 
+;; With RTL inlining, at -O3, rtl is generated, stored, then actually
+;; compiled at the end of compilation.  In the meantime, someone can
+;; re-encode-section-info on some symbol changing it e.g. from global
+;; to local-not-small.  If this happens, we'd have emitted a plain
+;; load rather than a high+losum load and not recognize the insn.
+;;
+;; So if rtl inlining is in effect, we delay the global/not-global
+;; decision until rest_of_compilation by wrapping it in an UNSPEC_SYMBOL.
+
+(define_insn_and_split "movdi_er_maybe_g"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+	(unspec:DI [(match_operand:DI 1 "symbolic_operand" "")]
+		   UNSPEC_SYMBOL))]
+  "TARGET_EXPLICIT_RELOCS && flag_inline_functions"
+  "#"
+  ""
+  [(set (match_dup 0) (match_dup 1))]
+{
+  if (local_symbolic_operand (operands[1], Pmode)
+      && !small_symbolic_operand (operands[1], Pmode))
+    {
+      rtx subtarget = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+      rtx tmp;
+
+      tmp = gen_rtx_HIGH (Pmode, operands[1]);
+      if (reload_completed)
+	tmp = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, tmp);
+      emit_insn (gen_rtx_SET (VOIDmode, subtarget, tmp));
+
+      tmp = gen_rtx_LO_SUM (Pmode, subtarget, operands[1]);
+      emit_insn (gen_rtx_SET (VOIDmode, operands[0], tmp));
+      DONE;
+    }
+})
+
 (define_insn "*movdi_er_nofix"
   [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,r,r,r,m,*f,*f,Q")
 	(match_operand:DI 1 "input_operand" "rJ,K,L,T,s,m,rJ,*fJ,Q,*f"))]
@@ -6700,13 +6752,10 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
    (set_attr "type" "multi")])
 
 (define_insn "*exception_receiver_2"
-  [(unspec_volatile [(match_operand:DI 0 "nonimmediate_operand" "r,m")]
-		    UNSPECV_EHR)]
+  [(unspec_volatile [(match_operand:DI 0 "memory_operand" "m")] UNSPECV_EHR)]
   "TARGET_LD_BUGGY_LDGP"
-  "@
-   bis $31,%0,$29
-   ldq $29,%0"
-  [(set_attr "type" "ilog,ild")])
+  "ldq $29,%0"
+  [(set_attr "type" "ild")])
 
 (define_expand "nonlocal_goto_receiver"
   [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)
diff --git a/contrib/gcc/config/alpha/linux.h b/contrib/gcc/config/alpha/linux.h
index 8a1b93f..912d7b26 100644
--- a/contrib/gcc/config/alpha/linux.h
+++ b/contrib/gcc/config/alpha/linux.h
@@ -1,6 +1,6 @@
 /* Definitions of target machine for GNU compiler,
    for Alpha Linux-based GNU systems.
-   Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+   Copyright (C) 1996, 1997, 1998, 2002 Free Software Foundation, Inc.
    Contributed by Richard Henderson.
 
 This file is part of GNU CC.
@@ -25,7 +25,7 @@ Boston, MA 02111-1307, USA.  */
 
 #undef CPP_PREDEFINES
 #define CPP_PREDEFINES \
-"-Dlinux -Dunix -Asystem=linux -D_LONGLONG -D__alpha__ " \
+"-D__gnu_linux__ -Dlinux -Dunix -Asystem=linux -D_LONGLONG -D__alpha__ " \
 SUB_CPP_PREDEFINES
 
 /* The GNU C++ standard library requires that these macros be defined.  */
diff --git a/contrib/gcc/config/alpha/netbsd.h b/contrib/gcc/config/alpha/netbsd.h
index 7eacce2..e5551da 100644
--- a/contrib/gcc/config/alpha/netbsd.h
+++ b/contrib/gcc/config/alpha/netbsd.h
@@ -79,19 +79,5 @@ Boston, MA 02111-1307, USA.  */
    %{!shared:crtend%O%s} %{shared:crtendS%O%s}"
 
 
-/* Make gcc agree with <machine/ansi.h> */
-
-#undef WCHAR_TYPE
-#define WCHAR_TYPE "int"
-
-#undef WCHAR_UNSIGNED
-#define WCHAR_UNSIGNED 0
-
-#undef WCHAR_TYPE_SIZE
-#define WCHAR_TYPE_SIZE 32
-
-#undef WINT_TYPE
-#define WINT_TYPE "int"
-
 #undef TARGET_VERSION
 #define TARGET_VERSION fprintf (stderr, " (NetBSD/alpha ELF)");
diff --git a/contrib/gcc/config/alpha/osf.h b/contrib/gcc/config/alpha/osf.h
index 250974c..efb0a16 100644
--- a/contrib/gcc/config/alpha/osf.h
+++ b/contrib/gcc/config/alpha/osf.h
@@ -47,7 +47,8 @@ Boston, MA 02111-1307, USA.  */
 
 #undef CPP_SUBTARGET_SPEC
 #define CPP_SUBTARGET_SPEC \
-"%{pthread|threads:-D_REENTRANT} %{threads:-D_PTHREAD_USE_D4} %(cpp_xfloat)"
+"%{pthread|threads:-D_REENTRANT} %{threads:-D_PTHREAD_USE_D4} %(cpp_xfloat) \
+-D__EXTERN_PREFIX"
 
 /* Under OSF4, -p and -pg require -lprof1, and -lprof1 requires -lpdf.  */
 
@@ -56,12 +57,13 @@ Boston, MA 02111-1307, USA.  */
  %{threads: -lpthreads} %{pthread|threads: -lpthread -lmach -lexc} -lc"
 
 /* Pass "-G 8" to ld because Alpha's CC does.  Pass -O3 if we are
-   optimizing, -O1 if we are not.  Pass -shared, -non_shared or
+   optimizing, -O1 if we are not.  Pass -S to silence `weak symbol
+   multiply defined' warnings.  Pass -shared, -non_shared or
    -call_shared as appropriate.  Pass -hidden_symbol so that our
    constructor and call-frame data structures are not accidentally
    overridden.  */
 #define LINK_SPEC  \
-  "-G 8 %{O*:-O3} %{!O*:-O1} %{static:-non_shared} \
+  "-G 8 %{O*:-O3} %{!O*:-O1} -S %{static:-non_shared} \
    %{!static:%{shared:-shared -hidden_symbol _GLOBAL_*} \
    %{!shared:-call_shared}} %{pg} %{taso} %{rpath*}"
 
@@ -93,19 +95,18 @@ Boston, MA 02111-1307, USA.  */
 
 #define ASM_OLDAS_SPEC ""
 
-/* No point in running CPP on our assembler output.  */
-#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0
-/* Don't pass -g to GNU as, because some versions don't accept this option.  */
-#define ASM_SPEC "%{malpha-as:-g %(asm_oldas)} -nocpp %{pg}"
-#else
 /* In OSF/1 v3.2c, the assembler by default does not output file names which
    causes mips-tfile to fail.  Passing -g to the assembler fixes this problem.
    ??? Strictly speaking, we need -g only if the user specifies -g.  Passing
    it always means that we get slightly larger than necessary object files
    if the user does not specify -g.  If we don't pass -g, then mips-tfile
    will need to be fixed to work in this case.  Pass -O0 since some
-   optimization are broken and don't help us anyway.  */
-#define ASM_SPEC "%{!mgas:-g %(asm_oldas)} -nocpp %{pg} -O0"
+   optimization are broken and don't help us anyway.  Pass -nocpp because
+   there's no point in running CPP on our assembler output.  */
+#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0
+#define ASM_SPEC "%{malpha-as:-g %(asm_oldas) -nocpp %{pg} -O0}"
+#else
+#define ASM_SPEC "%{!mgas:-g %(asm_oldas) -nocpp %{pg} -O0}"
 #endif
 
 /* Specify to run a post-processor, mips-tfile after the assembler
@@ -209,3 +210,7 @@ __enable_execute_stack (addr)						\
 /* Handle #pragma weak and #pragma pack.  */
 #undef HANDLE_SYSV_PRAGMA
 #define HANDLE_SYSV_PRAGMA 1
+
+/* Handle #pragma extern_prefix.  Technically only needed for Tru64 5.x,
+   but easier to manipulate preprocessor bits from here.  */
+#define HANDLE_PRAGMA_EXTERN_PREFIX 1
diff --git a/contrib/gcc/config/alpha/t-vms b/contrib/gcc/config/alpha/t-vms
index 5057c31..516d3ec 100644
--- a/contrib/gcc/config/alpha/t-vms
+++ b/contrib/gcc/config/alpha/t-vms
@@ -20,3 +20,7 @@ vcrt0.o: $(CRT0_S) $(GCC_PASSES)
 pcrt0.o: $(CRT0_S) $(GCC_PASSES)
 	decc -c /names=as_is $(srcdir)/config/alpha/vms-psxcrt0.c -o pcrt0.o
 
+MULTILIB_OPTIONS = mcpu=ev6
+MULTILIB_DIRNAMES = ev6
+LIBGCC = stmp-multilib
+INSTALL_LIBGCC = install-multilib
diff --git a/contrib/gcc/config/alpha/vms.h b/contrib/gcc/config/alpha/vms.h
index a01556e..ffc3275 100644
--- a/contrib/gcc/config/alpha/vms.h
+++ b/contrib/gcc/config/alpha/vms.h
@@ -251,6 +251,12 @@ typedef struct {int num_args; enum avms_arg_type atypes[6];} avms_arg_info;
   alpha_write_verstamp (FILE);					\
   fprintf (FILE, "\t.set noreorder\n");				\
   fprintf (FILE, "\t.set volatile\n");				\
+  if (TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX)	\
+    {								\
+      fprintf (FILE, "\t.arch %s\n",				\
+               (TARGET_CPU_EV6 ? "ev6"				\
+                : TARGET_MAX ? "pca56" : "ev56"));		\
+    }								\
   ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename);	\
 }
 
@@ -385,22 +391,14 @@ do {									\
 #define LINK_EH_SPEC "vms-dwarf2eh.o%s "
 
 #ifdef IN_LIBGCC2
-#include <libicb.h>
 #include <pdscdef.h>
 
 #define MD_FALLBACK_FRAME_STATE_FOR(CONTEXT, FS, SUCCESS)		\
  do {									\
-  unsigned long handle;							\
-  PDSCDEF *pv;								\
-  INVO_CONTEXT_BLK invo;						\
+  PDSCDEF *pv = *((PDSCDEF **) (CONTEXT)->reg [29]);                    \
 									\
-  memset (&invo, 0, sizeof (INVO_CONTEXT_BLK));				\
-									\
-  invo.libicb$q_ireg [29] = *((long long *) (CONTEXT)->reg [29]);	\
-  invo.libicb$q_ireg [30] = (long long) (CONTEXT)->cfa;			\
-  handle = LIB$GET_INVO_HANDLE (&invo);					\
-  LIB$GET_INVO_CONTEXT (handle, &invo);					\
-  pv = (PDSCDEF *) invo.libicb$ph_procedure_descriptor;			\
+  if (pv && ((long) pv & 0x7) == 0) /* low bits 0 means address */      \
+    pv = *(PDSCDEF **) pv;                                              \
 									\
   if (pv && ((pv->pdsc$w_flags & 0xf) == PDSC$K_KIND_FP_STACK))		\
     {									\
@@ -426,6 +424,19 @@ do {									\
 									\
       goto SUCCESS;							\
     }									\
+  else if (pv && ((pv->pdsc$w_flags & 0xf) == PDSC$K_KIND_FP_REGISTER))	\
+    {									\
+      (FS)->cfa_offset = pv->pdsc$l_size;				\
+      (FS)->cfa_reg = pv->pdsc$w_flags & PDSC$M_BASE_REG_IS_FP ? 29 : 30; \
+      (FS)->retaddr_column = 26;					\
+      (FS)->cfa_how = CFA_REG_OFFSET;					\
+      (FS)->regs.reg[26].loc.reg = pv->pdsc$b_save_ra;			\
+      (FS)->regs.reg[26].how = REG_SAVED_REG;			        \
+      (FS)->regs.reg[29].loc.reg = pv->pdsc$b_save_fp;			\
+      (FS)->regs.reg[29].how = REG_SAVED_REG;			        \
+									\
+      goto SUCCESS;							\
+    }									\
 } while (0)
 #endif
 
@@ -508,11 +519,17 @@ do {									\
 #define NAME__MAIN "__gccmain"
 #define SYMBOL__MAIN __gccmain
 
+#define MD_EXEC_PREFIX "/gnu/lib/gcc-lib/"
+#define MD_STARTFILE_PREFIX "/gnu/lib/gcc-lib/"
+
 /* Specify the list of include file directories.  */
-#define INCLUDE_DEFAULTS		\
-{					\
-  { "/gnu_gxx_include", 0, 1, 1 },	\
-  { "/gnu_cc_include", 0, 0, 0 },	\
-  { "/gnu/include", 0, 0, 0 },	        \
-  { 0, 0, 0, 0 }			\
+#define INCLUDE_DEFAULTS		   \
+{					   \
+  { "/gnu/lib/gcc-lib/include", 0, 0, 0 }, \
+  { "/gnu_gxx_include", 0, 1, 1 },	   \
+  { "/gnu_cc_include", 0, 0, 0 },	   \
+  { "/gnu/include", 0, 0, 0 },	           \
+  { 0, 0, 0, 0 }			   \
 }
+
+#define LONGLONG_STANDALONE 1
diff --git a/contrib/gcc/config/alpha/x-vms b/contrib/gcc/config/alpha/x-vms
index f53f1c7..c98f03d 100644
--- a/contrib/gcc/config/alpha/x-vms
+++ b/contrib/gcc/config/alpha/x-vms
@@ -1,6 +1,8 @@
 # Under VMS, directory names cannot contain dots.
 version:=$(shell echo $(gcc_version) | sed -e 's/\./_/g')
 
+libsubdir=$(libdir)/gcc-lib
+
 # Rules for linker and compiler wrappers.  These are only useful on
 # a VMS host.
 EXTRA_PROGRAMS=ld.exe decc.exe
diff --git a/contrib/gcc/config/alpha/xm-vms.h b/contrib/gcc/config/alpha/xm-vms.h
index d728ec1..7bfceba 100644
--- a/contrib/gcc/config/alpha/xm-vms.h
+++ b/contrib/gcc/config/alpha/xm-vms.h
@@ -37,6 +37,9 @@ Boston, MA 02111-1307, USA.  */
 /* Open files in stream mode if not otherwise explicitly specified */
 #define __UNIX_FOPEN 1
 
+/* Write to stdout using fputc to avoid record terminators in pipes */
+#define __UNIX_FWRITE 1
+
 #define STDC_HEADERS 1
 
 #define HOST_EXECUTABLE_SUFFIX ".exe"