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| author | kan <kan@FreeBSD.org> | 2004-07-28 03:11:36 +0000 |
|---|---|---|
| committer | kan <kan@FreeBSD.org> | 2004-07-28 03:11:36 +0000 |
| commit | 5e00ec74d8ce58f99801200d4d3d0412c7cc1b28 (patch) | |
| tree | 052f4bb635f2bea2c5e350bd60c902be100a0d1e /contrib/gcc/config/alpha | |
| parent | 87b8398a7d9f9bf0e28bbcd54a4fc27db2125f38 (diff) | |
| download | FreeBSD-src-5e00ec74d8ce58f99801200d4d3d0412c7cc1b28.zip FreeBSD-src-5e00ec74d8ce58f99801200d4d3d0412c7cc1b28.tar.gz | |
Gcc 3.4.2 20040728.
Diffstat (limited to 'contrib/gcc/config/alpha')
33 files changed, 2409 insertions, 2724 deletions
diff --git a/contrib/gcc/config/alpha/alpha-modes.def b/contrib/gcc/config/alpha/alpha-modes.def new file mode 100644 index 0000000..8e9e698 --- /dev/null +++ b/contrib/gcc/config/alpha/alpha-modes.def @@ -0,0 +1,23 @@ +/* Alpha extra machine modes. + Copyright (C) 2003 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +/* 128-bit floating point. This gets reset in alpha_override_options + if VAX float format is in use. */ +FLOAT_MODE (TF, 16, ieee_quad_format); diff --git a/contrib/gcc/config/alpha/alpha-protos.h b/contrib/gcc/config/alpha/alpha-protos.h index fe4943b..95f1ad2 100644 --- a/contrib/gcc/config/alpha/alpha-protos.h +++ b/contrib/gcc/config/alpha/alpha-protos.h @@ -1,182 +1,123 @@ /* Prototypes for alpha.c functions used in the md file & elsewhere. - Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc. + Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ extern int alpha_next_sequence_number; -extern void literal_section PARAMS ((void)); -extern void override_options PARAMS ((void)); -extern int zap_mask PARAMS ((HOST_WIDE_INT)); -extern int direct_return PARAMS ((void)); - -extern int alpha_sa_size PARAMS ((void)); -extern int alpha_pv_save_size PARAMS ((void)); -extern int alpha_using_fp PARAMS ((void)); -extern void alpha_write_verstamp PARAMS ((FILE *)); -extern void alpha_expand_prologue PARAMS ((void)); -extern void alpha_expand_epilogue PARAMS ((void)); -extern void alpha_output_filename PARAMS ((FILE *, const char *)); -extern void alpha_output_lineno PARAMS ((FILE *, int)); - -extern int reg_or_0_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_or_6bit_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_or_8bit_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_or_const_int_operand PARAMS ((rtx, enum machine_mode)); -extern int cint8_operand PARAMS ((rtx, enum machine_mode)); -extern int add_operand PARAMS ((rtx, enum machine_mode)); -extern int sext_add_operand PARAMS ((rtx, enum machine_mode)); -extern int const48_operand PARAMS ((rtx, enum machine_mode)); -extern int and_operand PARAMS ((rtx, enum machine_mode)); -extern int or_operand PARAMS ((rtx, enum machine_mode)); -extern int mode_width_operand PARAMS ((rtx, enum machine_mode)); -extern int mode_mask_operand PARAMS ((rtx, enum machine_mode)); -extern int mul8_operand PARAMS ((rtx, enum machine_mode)); -extern int const0_operand PARAMS ((rtx, enum machine_mode)); -extern int hard_fp_register_operand PARAMS ((rtx, enum machine_mode)); -extern int hard_int_register_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_or_cint_operand PARAMS ((rtx, enum machine_mode)); -extern int some_operand PARAMS ((rtx, enum machine_mode)); -extern int some_ni_operand PARAMS ((rtx, enum machine_mode)); -extern int input_operand PARAMS ((rtx, enum machine_mode)); -extern int current_file_function_operand PARAMS ((rtx, enum machine_mode)); -extern int direct_call_operand PARAMS ((rtx, enum machine_mode)); -extern int local_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int small_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int some_small_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int global_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int dtp16_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int dtp32_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int gotdtp_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int tp16_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int tp32_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int gottp_symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int call_operand PARAMS ((rtx, enum machine_mode)); -extern int symbolic_operand PARAMS ((rtx, enum machine_mode)); -extern int alpha_comparison_operator PARAMS ((rtx, enum machine_mode)); -extern int alpha_zero_comparison_operator PARAMS ((rtx, enum machine_mode)); -extern int alpha_swapped_comparison_operator PARAMS ((rtx, enum machine_mode)); -extern int signed_comparison_operator PARAMS ((rtx, enum machine_mode)); -extern int alpha_fp_comparison_operator PARAMS ((rtx, enum machine_mode)); -extern int divmod_operator PARAMS ((rtx, enum machine_mode)); -extern int aligned_memory_operand PARAMS ((rtx, enum machine_mode)); -extern int unaligned_memory_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_or_unaligned_mem_operand PARAMS ((rtx, enum machine_mode)); -extern int any_memory_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_not_elim_operand PARAMS ((rtx, enum machine_mode)); -extern int normal_memory_operand PARAMS ((rtx, enum machine_mode)); -extern int reg_no_subreg_operand PARAMS ((rtx, enum machine_mode)); -extern int addition_operation PARAMS ((rtx, enum machine_mode)); - -extern bool alpha_const_ok_for_letter_p PARAMS ((HOST_WIDE_INT, int)); -extern bool alpha_const_double_ok_for_letter_p PARAMS ((rtx, int)); -extern bool alpha_extra_constraint PARAMS ((rtx, int)); - -extern rtx alpha_tablejump_addr_vec PARAMS ((rtx)); -extern rtx alpha_tablejump_best_label PARAMS ((rtx)); - -extern bool alpha_legitimate_address_p PARAMS ((enum machine_mode, rtx, int)); -extern rtx alpha_legitimize_address PARAMS ((rtx, rtx, enum machine_mode)); -extern rtx alpha_legitimize_reload_address PARAMS ((rtx, enum machine_mode, - int, int, int)); - -extern rtx split_small_symbolic_operand PARAMS ((rtx)); - -extern void get_aligned_mem PARAMS ((rtx, rtx *, rtx *)); -extern rtx get_unaligned_address PARAMS ((rtx, int)); -extern enum reg_class alpha_preferred_reload_class PARAMS ((rtx, - enum reg_class)); -extern enum reg_class secondary_reload_class PARAMS ((enum reg_class, - enum machine_mode, - rtx, int)); - -extern void alpha_set_memflags PARAMS ((rtx, rtx)); -extern rtx alpha_emit_set_const PARAMS ((rtx, enum machine_mode, - HOST_WIDE_INT, int)); -extern rtx alpha_emit_set_long_const PARAMS ((rtx, HOST_WIDE_INT, - HOST_WIDE_INT)); -extern bool alpha_expand_mov PARAMS ((enum machine_mode, rtx *)); -extern bool alpha_expand_mov_nobwx PARAMS ((enum machine_mode, rtx *)); -extern void alpha_emit_floatuns PARAMS ((rtx[])); -extern rtx alpha_emit_conditional_move PARAMS ((rtx, enum machine_mode)); -extern void alpha_split_tfmode_pair PARAMS ((rtx[])); -extern void alpha_split_tfmode_frobsign PARAMS ((rtx[], - rtx (*)(rtx, rtx, rtx))); -extern void alpha_expand_unaligned_load PARAMS ((rtx, rtx, HOST_WIDE_INT, - HOST_WIDE_INT, int)); -extern void alpha_expand_unaligned_store PARAMS ((rtx, rtx, HOST_WIDE_INT, - HOST_WIDE_INT)); -extern int alpha_expand_block_move PARAMS ((rtx [])); -extern int alpha_expand_block_clear PARAMS ((rtx [])); -extern rtx alpha_expand_zap_mask PARAMS ((HOST_WIDE_INT)); -extern void alpha_expand_builtin_vector_binop PARAMS ((rtx (*)(rtx, rtx, rtx), - enum machine_mode, - rtx, rtx, rtx)); -extern rtx alpha_return_addr PARAMS ((int, rtx)); -extern rtx alpha_gp_save_rtx PARAMS ((void)); -extern void print_operand PARAMS ((FILE *, rtx, int)); -extern void print_operand_address PARAMS ((FILE *, rtx)); -extern void alpha_initialize_trampoline PARAMS ((rtx, rtx, rtx, int, int, int)); -extern void alpha_reorg PARAMS ((rtx)); - -extern tree alpha_build_va_list PARAMS ((void)); -extern void alpha_va_start PARAMS ((tree, rtx)); -extern rtx alpha_va_arg PARAMS ((tree, tree)); -extern rtx function_arg PARAMS ((CUMULATIVE_ARGS, enum machine_mode, - tree, int)); -extern void alpha_start_function PARAMS ((FILE *, const char *, tree)); -extern void alpha_end_function PARAMS ((FILE *, const char *, tree)); - -extern int alpha_find_lo_sum_using_gp PARAMS ((rtx)); +extern void literal_section (void); +extern void override_options (void); +extern int zap_mask (HOST_WIDE_INT); +extern int direct_return (void); + +extern int alpha_sa_size (void); +extern HOST_WIDE_INT alpha_initial_elimination_offset (unsigned int, + unsigned int); +extern int alpha_pv_save_size (void); +extern int alpha_using_fp (void); +extern void alpha_expand_prologue (void); +extern void alpha_expand_epilogue (void); +extern void alpha_output_filename (FILE *, const char *); +extern void alpha_output_lineno (FILE *, int); + +extern bool alpha_const_ok_for_letter_p (HOST_WIDE_INT, int); +extern bool alpha_const_double_ok_for_letter_p (rtx, int); +extern bool alpha_extra_constraint (rtx, int); + +extern rtx alpha_tablejump_addr_vec (rtx); +extern rtx alpha_tablejump_best_label (rtx); + +extern bool alpha_legitimate_address_p (enum machine_mode, rtx, int); +extern rtx alpha_legitimize_address (rtx, rtx, enum machine_mode); +extern rtx alpha_legitimize_reload_address (rtx, enum machine_mode, + int, int, int); + +extern rtx split_small_symbolic_operand (rtx); + +extern void get_aligned_mem (rtx, rtx *, rtx *); +extern rtx get_unaligned_address (rtx, int); +extern enum reg_class alpha_preferred_reload_class (rtx, enum reg_class); +extern enum reg_class secondary_reload_class (enum reg_class, + enum machine_mode, rtx, int); + +extern void alpha_set_memflags (rtx, rtx); +extern rtx alpha_emit_set_const (rtx, enum machine_mode, HOST_WIDE_INT, int); +extern rtx alpha_emit_set_long_const (rtx, HOST_WIDE_INT, HOST_WIDE_INT); +extern bool alpha_expand_mov (enum machine_mode, rtx *); +extern bool alpha_expand_mov_nobwx (enum machine_mode, rtx *); +extern void alpha_emit_floatuns (rtx[]); +extern rtx alpha_emit_conditional_move (rtx, enum machine_mode); +extern void alpha_split_tfmode_pair (rtx[]); +extern void alpha_split_tfmode_frobsign (rtx[], rtx (*)(rtx, rtx, rtx)); +extern void alpha_expand_unaligned_load (rtx, rtx, HOST_WIDE_INT, + HOST_WIDE_INT, int); +extern void alpha_expand_unaligned_store (rtx, rtx, HOST_WIDE_INT, + HOST_WIDE_INT); +extern int alpha_expand_block_move (rtx []); +extern int alpha_expand_block_clear (rtx []); +extern rtx alpha_expand_zap_mask (HOST_WIDE_INT); +extern void alpha_expand_builtin_vector_binop (rtx (*)(rtx, rtx, rtx), + enum machine_mode, + rtx, rtx, rtx); +extern rtx alpha_return_addr (int, rtx); +extern rtx alpha_gp_save_rtx (void); +extern void print_operand (FILE *, rtx, int); +extern void print_operand_address (FILE *, rtx); +extern void alpha_initialize_trampoline (rtx, rtx, rtx, int, int, int); + +extern void alpha_va_start (tree, rtx); +extern rtx alpha_va_arg (tree, tree); +extern rtx function_arg (CUMULATIVE_ARGS, enum machine_mode, tree, int); +extern rtx function_value (tree, tree, enum machine_mode); + +extern void alpha_start_function (FILE *, const char *, tree); +extern void alpha_end_function (FILE *, const char *, tree); + +extern int alpha_find_lo_sum_using_gp (rtx); #ifdef REAL_VALUE_TYPE -extern int check_float_value PARAMS ((enum machine_mode, - REAL_VALUE_TYPE *, int)); +extern int check_float_value (enum machine_mode, REAL_VALUE_TYPE *, int); #endif #ifdef RTX_CODE -extern rtx alpha_emit_conditional_branch PARAMS ((enum rtx_code)); -extern rtx alpha_emit_setcc PARAMS ((enum rtx_code)); -extern int alpha_split_conditional_move PARAMS ((enum rtx_code, rtx, rtx, - rtx, rtx)); -extern void alpha_emit_xfloating_arith PARAMS ((enum rtx_code, rtx[])); -extern void alpha_emit_xfloating_cvt PARAMS ((enum rtx_code, rtx[])); +extern rtx alpha_emit_conditional_branch (enum rtx_code); +extern rtx alpha_emit_setcc (enum rtx_code); +extern int alpha_split_conditional_move (enum rtx_code, rtx, rtx, rtx, rtx); +extern void alpha_emit_xfloating_arith (enum rtx_code, rtx[]); +extern void alpha_emit_xfloating_cvt (enum rtx_code, rtx[]); #endif -extern rtx alpha_need_linkage PARAMS ((const char *, int)); -extern rtx alpha_use_linkage PARAMS ((rtx, tree, int, int)); +extern rtx alpha_need_linkage (const char *, int); +extern rtx alpha_use_linkage (rtx, tree, int, int); #if TARGET_ABI_OPEN_VMS -#ifdef HAVE_MACHINE_MODES -extern enum avms_arg_type alpha_arg_type PARAMS ((enum machine_mode)); +extern enum avms_arg_type alpha_arg_type (enum machine_mode); +extern rtx alpha_arg_info_reg_val (CUMULATIVE_ARGS); #endif -extern rtx alpha_arg_info_reg_val PARAMS ((CUMULATIVE_ARGS)); -#endif /* TARGET_ABI_OPEN_VMS */ -extern rtx unicosmk_add_call_info_word PARAMS ((rtx)); +extern rtx unicosmk_add_call_info_word (rtx); #if TARGET_ABI_UNICOSMK -extern void unicosmk_defer_case_vector PARAMS ((rtx, rtx)); -extern void unicosmk_add_extern PARAMS ((const char *)); -extern void unicosmk_output_align PARAMS ((FILE *, int)); -extern char * unicosmk_text_section PARAMS ((void)); -extern char * unicosmk_data_section PARAMS ((void)); -extern void unicosmk_asm_file_start PARAMS ((FILE *)); -extern void unicosmk_asm_file_end PARAMS ((FILE *)); -extern void unicosmk_output_common PARAMS ((FILE *, const char *, int, int)); -#endif /* TARGET_ABI_UNICOSMK */ +extern void unicosmk_defer_case_vector (rtx, rtx); +extern void unicosmk_add_extern (const char *); +extern void unicosmk_output_align (FILE *, int); +extern char * unicosmk_text_section (void); +extern char * unicosmk_data_section (void); +extern void unicosmk_output_common (FILE *, const char *, int, int); +extern int unicosmk_initial_elimination_offset (int, int); +#endif diff --git a/contrib/gcc/config/alpha/alpha.c b/contrib/gcc/config/alpha/alpha.c index 42b57e1..0086968 100644 --- a/contrib/gcc/config/alpha/alpha.c +++ b/contrib/gcc/config/alpha/alpha.c @@ -1,28 +1,30 @@ /* Subroutines used for code generation on the DEC Alpha. Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "regs.h" @@ -48,6 +50,8 @@ Boston, MA 02111-1307, USA. */ #include "target-def.h" #include "debug.h" #include "langhooks.h" +#include <splay-tree.h> +#include "cfglayout.h" /* Specify which cpu to schedule for. */ @@ -103,110 +107,70 @@ static int alpha_function_needs_gp; /* The alias set for prologue/epilogue register save/restore. */ -static int alpha_sr_alias_set; +static GTY(()) int alpha_sr_alias_set; /* The assembler name of the current function. */ static const char *alpha_fnname; /* The next explicit relocation sequence number. */ +extern GTY(()) int alpha_next_sequence_number; int alpha_next_sequence_number = 1; /* The literal and gpdisp sequence numbers for this insn, as printed by %# and %* respectively. */ +extern GTY(()) int alpha_this_literal_sequence_number; +extern GTY(()) int alpha_this_gpdisp_sequence_number; int alpha_this_literal_sequence_number; int alpha_this_gpdisp_sequence_number; -/* Declarations of static functions. */ -static int tls_symbolic_operand_1 - PARAMS ((rtx, enum machine_mode, int, int)); -static enum tls_model tls_symbolic_operand_type - PARAMS ((rtx)); -static bool decl_in_text_section - PARAMS ((tree)); -static bool alpha_in_small_data_p - PARAMS ((tree)); -static void alpha_encode_section_info - PARAMS ((tree, int)); -static const char *alpha_strip_name_encoding - PARAMS ((const char *)); -static int some_small_symbolic_operand_1 - PARAMS ((rtx *, void *)); -static int split_small_symbolic_operand_1 - PARAMS ((rtx *, void *)); -static void alpha_set_memflags_1 - PARAMS ((rtx, int, int, int)); -static rtx alpha_emit_set_const_1 - PARAMS ((rtx, enum machine_mode, HOST_WIDE_INT, int)); -static void alpha_expand_unaligned_load_words - PARAMS ((rtx *out_regs, rtx smem, HOST_WIDE_INT words, HOST_WIDE_INT ofs)); -static void alpha_expand_unaligned_store_words - PARAMS ((rtx *out_regs, rtx smem, HOST_WIDE_INT words, HOST_WIDE_INT ofs)); -static void alpha_init_builtins - PARAMS ((void)); -static rtx alpha_expand_builtin - PARAMS ((tree, rtx, rtx, enum machine_mode, int)); -static void alpha_sa_mask - PARAMS ((unsigned long *imaskP, unsigned long *fmaskP)); -static int find_lo_sum_using_gp - PARAMS ((rtx *, void *)); -static int alpha_does_function_need_gp - PARAMS ((void)); -static int alpha_ra_ever_killed - PARAMS ((void)); -static const char *get_trap_mode_suffix - PARAMS ((void)); -static const char *get_round_mode_suffix - PARAMS ((void)); -static const char *get_some_local_dynamic_name - PARAMS ((void)); -static int get_some_local_dynamic_name_1 - PARAMS ((rtx *, void *)); -static rtx set_frame_related_p - PARAMS ((void)); -static const char *alpha_lookup_xfloating_lib_func - PARAMS ((enum rtx_code)); -static int alpha_compute_xfloating_mode_arg - PARAMS ((enum rtx_code, enum alpha_fp_rounding_mode)); -static void alpha_emit_xfloating_libcall - PARAMS ((const char *, rtx, rtx[], int, rtx)); -static rtx alpha_emit_xfloating_compare - PARAMS ((enum rtx_code, rtx, rtx)); -static void alpha_output_function_end_prologue - PARAMS ((FILE *)); -static int alpha_adjust_cost - PARAMS ((rtx, rtx, rtx, int)); -static int alpha_issue_rate - PARAMS ((void)); -static int alpha_use_dfa_pipeline_interface - PARAMS ((void)); -static int alpha_multipass_dfa_lookahead - PARAMS ((void)); - -#ifdef OBJECT_FORMAT_ELF -static void alpha_elf_select_rtx_section - PARAMS ((enum machine_mode, rtx, unsigned HOST_WIDE_INT)); -#endif - -#if TARGET_ABI_OPEN_VMS -static bool alpha_linkage_symbol_p - PARAMS ((const char *symname)); -static void alpha_write_linkage - PARAMS ((FILE *, const char *, tree)); -#endif - -#if TARGET_ABI_OSF -static void alpha_output_mi_thunk_osf - PARAMS ((FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree)); -#endif +/* Costs of various operations on the different architectures. */ -static struct machine_function * alpha_init_machine_status - PARAMS ((void)); +struct alpha_rtx_cost_data +{ + unsigned char fp_add; + unsigned char fp_mult; + unsigned char fp_div_sf; + unsigned char fp_div_df; + unsigned char int_mult_si; + unsigned char int_mult_di; + unsigned char int_shift; + unsigned char int_cmov; +}; -static void unicosmk_output_deferred_case_vectors PARAMS ((FILE *)); -static void unicosmk_gen_dsib PARAMS ((unsigned long *imaskP)); -static void unicosmk_output_ssib PARAMS ((FILE *, const char *)); -static int unicosmk_need_dex PARAMS ((rtx)); +static struct alpha_rtx_cost_data const alpha_rtx_cost_data[PROCESSOR_MAX] = +{ + { /* EV4 */ + COSTS_N_INSNS (6), /* fp_add */ + COSTS_N_INSNS (6), /* fp_mult */ + COSTS_N_INSNS (34), /* fp_div_sf */ + COSTS_N_INSNS (63), /* fp_div_df */ + COSTS_N_INSNS (23), /* int_mult_si */ + COSTS_N_INSNS (23), /* int_mult_di */ + COSTS_N_INSNS (2), /* int_shift */ + COSTS_N_INSNS (2), /* int_cmov */ + }, + { /* EV5 */ + COSTS_N_INSNS (4), /* fp_add */ + COSTS_N_INSNS (4), /* fp_mult */ + COSTS_N_INSNS (15), /* fp_div_sf */ + COSTS_N_INSNS (22), /* fp_div_df */ + COSTS_N_INSNS (8), /* int_mult_si */ + COSTS_N_INSNS (12), /* int_mult_di */ + COSTS_N_INSNS (1) + 1, /* int_shift */ + COSTS_N_INSNS (1), /* int_cmov */ + }, + { /* EV6 */ + COSTS_N_INSNS (4), /* fp_add */ + COSTS_N_INSNS (4), /* fp_mult */ + COSTS_N_INSNS (12), /* fp_div_sf */ + COSTS_N_INSNS (15), /* fp_div_df */ + COSTS_N_INSNS (7), /* int_mult_si */ + COSTS_N_INSNS (7), /* int_mult_di */ + COSTS_N_INSNS (1), /* int_shift */ + COSTS_N_INSNS (2), /* int_cmov */ + }, +}; /* Get the number of args of a function in one of two ways. */ #if TARGET_ABI_OPEN_VMS || TARGET_ABI_UNICOSMK @@ -217,99 +181,24 @@ static int unicosmk_need_dex PARAMS ((rtx)); #define REG_PV 27 #define REG_RA 26 - -/* Initialize the GCC target structure. */ -#if TARGET_ABI_OPEN_VMS -const struct attribute_spec vms_attribute_table[]; -static unsigned int vms_section_type_flags PARAMS ((tree, const char *, int)); -static void vms_asm_named_section PARAMS ((const char *, unsigned int)); -static void vms_asm_out_constructor PARAMS ((rtx, int)); -static void vms_asm_out_destructor PARAMS ((rtx, int)); -# undef TARGET_ATTRIBUTE_TABLE -# define TARGET_ATTRIBUTE_TABLE vms_attribute_table -# undef TARGET_SECTION_TYPE_FLAGS -# define TARGET_SECTION_TYPE_FLAGS vms_section_type_flags -#endif - -#undef TARGET_IN_SMALL_DATA_P -#define TARGET_IN_SMALL_DATA_P alpha_in_small_data_p -#undef TARGET_ENCODE_SECTION_INFO -#define TARGET_ENCODE_SECTION_INFO alpha_encode_section_info -#undef TARGET_STRIP_NAME_ENCODING -#define TARGET_STRIP_NAME_ENCODING alpha_strip_name_encoding - -#if TARGET_ABI_UNICOSMK -static void unicosmk_asm_named_section PARAMS ((const char *, unsigned int)); -static void unicosmk_insert_attributes PARAMS ((tree, tree *)); -static unsigned int unicosmk_section_type_flags PARAMS ((tree, const char *, - int)); -static void unicosmk_unique_section PARAMS ((tree, int)); -# undef TARGET_INSERT_ATTRIBUTES -# define TARGET_INSERT_ATTRIBUTES unicosmk_insert_attributes -# undef TARGET_SECTION_TYPE_FLAGS -# define TARGET_SECTION_TYPE_FLAGS unicosmk_section_type_flags -# undef TARGET_ASM_UNIQUE_SECTION -# define TARGET_ASM_UNIQUE_SECTION unicosmk_unique_section -# undef TARGET_ASM_GLOBALIZE_LABEL -# define TARGET_ASM_GLOBALIZE_LABEL hook_FILEptr_constcharptr_void -#endif - -#undef TARGET_ASM_ALIGNED_HI_OP -#define TARGET_ASM_ALIGNED_HI_OP "\t.word\t" -#undef TARGET_ASM_ALIGNED_DI_OP -#define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t" -/* Default unaligned ops are provided for ELF systems. To get unaligned - data for non-ELF systems, we have to turn off auto alignment. */ -#ifndef OBJECT_FORMAT_ELF -#undef TARGET_ASM_UNALIGNED_HI_OP -#define TARGET_ASM_UNALIGNED_HI_OP "\t.align 0\n\t.word\t" -#undef TARGET_ASM_UNALIGNED_SI_OP -#define TARGET_ASM_UNALIGNED_SI_OP "\t.align 0\n\t.long\t" -#undef TARGET_ASM_UNALIGNED_DI_OP -#define TARGET_ASM_UNALIGNED_DI_OP "\t.align 0\n\t.quad\t" -#endif - -#ifdef OBJECT_FORMAT_ELF -#undef TARGET_ASM_SELECT_RTX_SECTION -#define TARGET_ASM_SELECT_RTX_SECTION alpha_elf_select_rtx_section -#endif - -#undef TARGET_ASM_FUNCTION_END_PROLOGUE -#define TARGET_ASM_FUNCTION_END_PROLOGUE alpha_output_function_end_prologue - -#undef TARGET_SCHED_ADJUST_COST -#define TARGET_SCHED_ADJUST_COST alpha_adjust_cost -#undef TARGET_SCHED_ISSUE_RATE -#define TARGET_SCHED_ISSUE_RATE alpha_issue_rate -#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE -#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE \ - alpha_use_dfa_pipeline_interface -#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD -#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \ - alpha_multipass_dfa_lookahead - -#undef TARGET_HAVE_TLS -#define TARGET_HAVE_TLS HAVE_AS_TLS - -#undef TARGET_INIT_BUILTINS -#define TARGET_INIT_BUILTINS alpha_init_builtins -#undef TARGET_EXPAND_BUILTIN -#define TARGET_EXPAND_BUILTIN alpha_expand_builtin +/* Declarations of static functions. */ +static struct machine_function *alpha_init_machine_status (void); +static rtx alpha_emit_xfloating_compare (enum rtx_code, rtx, rtx); -#if TARGET_ABI_OSF -#undef TARGET_ASM_OUTPUT_MI_THUNK -#define TARGET_ASM_OUTPUT_MI_THUNK alpha_output_mi_thunk_osf -#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK -#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true +#if TARGET_ABI_OPEN_VMS +static void alpha_write_linkage (FILE *, const char *, tree); #endif -struct gcc_target targetm = TARGET_INITIALIZER; +static void unicosmk_output_deferred_case_vectors (FILE *); +static void unicosmk_gen_dsib (unsigned long *); +static void unicosmk_output_ssib (FILE *, const char *); +static int unicosmk_need_dex (rtx); /* Parse target option strings. */ void -override_options () +override_options (void) { int i; static const struct cpu_table { @@ -344,7 +233,7 @@ override_options () flag_pic = 0; } - /* On Unicos/Mk, the native compiler consistenly generates /d suffices for + /* On Unicos/Mk, the native compiler consistently generates /d suffices for floating-point instructions. Make that the default for this target. */ if (TARGET_ABI_UNICOSMK) alpha_fprm = ALPHA_FPRM_DYN; @@ -501,6 +390,9 @@ override_options () warning ("trap mode not supported for VAX floats"); alpha_fptm = ALPHA_FPTM_SU; } + if (target_flags_explicit & MASK_LONG_DOUBLE_128) + warning ("128-bit long double not supported for VAX floats"); + target_flags &= ~MASK_LONG_DOUBLE_128; } { @@ -583,17 +475,16 @@ override_options () /* Tell the compiler when we're using VAX floating point. */ if (TARGET_FLOAT_VAX) { - real_format_for_mode[SFmode - QFmode] = &vax_f_format; - real_format_for_mode[DFmode - QFmode] = &vax_g_format; - real_format_for_mode[TFmode - QFmode] = NULL; + REAL_MODE_FORMAT (SFmode) = &vax_f_format; + REAL_MODE_FORMAT (DFmode) = &vax_g_format; + REAL_MODE_FORMAT (TFmode) = NULL; } } /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */ int -zap_mask (value) - HOST_WIDE_INT value; +zap_mask (HOST_WIDE_INT value) { int i; @@ -609,9 +500,7 @@ zap_mask (value) register, it must be in the proper mode unless MODE is VOIDmode. */ int -reg_or_0_operand (op, mode) - register rtx op; - enum machine_mode mode; +reg_or_0_operand (rtx op, enum machine_mode mode) { return op == CONST0_RTX (mode) || register_operand (op, mode); } @@ -620,9 +509,7 @@ reg_or_0_operand (op, mode) any register. */ int -reg_or_6bit_operand (op, mode) - register rtx op; - enum machine_mode mode; +reg_or_6bit_operand (rtx op, enum machine_mode mode) { return ((GET_CODE (op) == CONST_INT && (unsigned HOST_WIDE_INT) INTVAL (op) < 64) @@ -633,9 +520,7 @@ reg_or_6bit_operand (op, mode) /* Return 1 if OP is an 8-bit constant or any register. */ int -reg_or_8bit_operand (op, mode) - register rtx op; - enum machine_mode mode; +reg_or_8bit_operand (rtx op, enum machine_mode mode) { return ((GET_CODE (op) == CONST_INT && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100) @@ -645,9 +530,7 @@ reg_or_8bit_operand (op, mode) /* Return 1 if OP is a constant or any register. */ int -reg_or_const_int_operand (op, mode) - register rtx op; - enum machine_mode mode; +reg_or_const_int_operand (rtx op, enum machine_mode mode) { return GET_CODE (op) == CONST_INT || register_operand (op, mode); } @@ -655,9 +538,7 @@ reg_or_const_int_operand (op, mode) /* Return 1 if OP is an 8-bit constant. */ int -cint8_operand (op, mode) - register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; +cint8_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { return ((GET_CODE (op) == CONST_INT && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100)); @@ -666,9 +547,7 @@ cint8_operand (op, mode) /* Return 1 if the operand is a valid second operand to an add insn. */ int -add_operand (op, mode) - register rtx op; - enum machine_mode mode; +add_operand (rtx op, enum machine_mode mode) { if (GET_CODE (op) == CONST_INT) /* Constraints I, J, O and P are covered by K. */ @@ -682,9 +561,7 @@ add_operand (op, mode) add insn. */ int -sext_add_operand (op, mode) - register rtx op; - enum machine_mode mode; +sext_add_operand (rtx op, enum machine_mode mode) { if (GET_CODE (op) == CONST_INT) return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'I') @@ -696,9 +573,7 @@ sext_add_operand (op, mode) /* Return 1 if OP is the constant 4 or 8. */ int -const48_operand (op, mode) - register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; +const48_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { return (GET_CODE (op) == CONST_INT && (INTVAL (op) == 4 || INTVAL (op) == 8)); @@ -707,9 +582,7 @@ const48_operand (op, mode) /* Return 1 if OP is a valid first operand to an AND insn. */ int -and_operand (op, mode) - register rtx op; - enum machine_mode mode; +and_operand (rtx op, enum machine_mode mode) { if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == VOIDmode) return (zap_mask (CONST_DOUBLE_LOW (op)) @@ -726,9 +599,7 @@ and_operand (op, mode) /* Return 1 if OP is a valid first operand to an IOR or XOR insn. */ int -or_operand (op, mode) - register rtx op; - enum machine_mode mode; +or_operand (rtx op, enum machine_mode mode) { if (GET_CODE (op) == CONST_INT) return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100 @@ -741,9 +612,7 @@ or_operand (op, mode) mode smaller than DImode. */ int -mode_width_operand (op, mode) - register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; +mode_width_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { return (GET_CODE (op) == CONST_INT && (INTVAL (op) == 8 || INTVAL (op) == 16 @@ -754,9 +623,7 @@ mode_width_operand (op, mode) smaller than an integer. */ int -mode_mask_operand (op, mode) - register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; +mode_mask_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { if (GET_CODE (op) == CONST_INT) { @@ -783,9 +650,7 @@ mode_mask_operand (op, mode) /* Return 1 if OP is a multiple of 8 less than 64. */ int -mul8_operand (op, mode) - register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; +mul8_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { return (GET_CODE (op) == CONST_INT && (unsigned HOST_WIDE_INT) INTVAL (op) < 64 @@ -795,9 +660,7 @@ mul8_operand (op, mode) /* Return 1 if OP is the zero constant for MODE. */ int -const0_operand (op, mode) - register rtx op; - enum machine_mode mode; +const0_operand (rtx op, enum machine_mode mode) { return op == CONST0_RTX (mode); } @@ -805,9 +668,7 @@ const0_operand (op, mode) /* Return 1 if OP is a hard floating-point register. */ int -hard_fp_register_operand (op, mode) - register rtx op; - enum machine_mode mode; +hard_fp_register_operand (rtx op, enum machine_mode mode) { if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) return 0; @@ -820,9 +681,7 @@ hard_fp_register_operand (op, mode) /* Return 1 if OP is a hard general register. */ int -hard_int_register_operand (op, mode) - register rtx op; - enum machine_mode mode; +hard_int_register_operand (rtx op, enum machine_mode mode) { if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) return 0; @@ -836,9 +695,7 @@ hard_int_register_operand (op, mode) int -reg_or_cint_operand (op, mode) - register rtx op; - enum machine_mode mode; +reg_or_cint_operand (rtx op, enum machine_mode mode) { return (GET_CODE (op) == CONST_INT || register_operand (op, mode)); @@ -848,9 +705,7 @@ reg_or_cint_operand (op, mode) if it is a MEM, it need not be valid. */ int -some_operand (op, mode) - register rtx op; - enum machine_mode mode; +some_operand (rtx op, enum machine_mode mode) { if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) return 0; @@ -881,9 +736,7 @@ some_operand (op, mode) /* Likewise, but don't accept constants. */ int -some_ni_operand (op, mode) - register rtx op; - enum machine_mode mode; +some_ni_operand (rtx op, enum machine_mode mode) { if (GET_MODE (op) != mode && mode != VOIDmode) return 0; @@ -897,9 +750,7 @@ some_ni_operand (op, mode) /* Return 1 if OP is a valid operand for the source of a move insn. */ int -input_operand (op, mode) - register rtx op; - enum machine_mode mode; +input_operand (rtx op, enum machine_mode mode) { if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) return 0; @@ -964,60 +815,89 @@ input_operand (op, mode) file, and in the same section as the current function. */ int -current_file_function_operand (op, mode) - rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; +samegp_function_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { if (GET_CODE (op) != SYMBOL_REF) - return 0; + return false; /* Easy test for recursion. */ if (op == XEXP (DECL_RTL (current_function_decl), 0)) - return 1; + return true; - /* Otherwise, we need the DECL for the SYMBOL_REF, which we can't get. - So SYMBOL_REF_FLAG has been declared to imply that the function is - in the default text section. So we must also check that the current - function is also in the text section. */ - if (SYMBOL_REF_FLAG (op) && decl_in_text_section (current_function_decl)) - return 1; + /* Functions that are not local can be overridden, and thus may + not share the same gp. */ + if (! SYMBOL_REF_LOCAL_P (op)) + return false; - return 0; + /* If -msmall-data is in effect, assume that there is only one GP + for the module, and so any local symbol has this property. We + need explicit relocations to be able to enforce this for symbols + not defined in this unit of translation, however. */ + if (TARGET_EXPLICIT_RELOCS && TARGET_SMALL_DATA) + return true; + + /* Functions that are not external are defined in this UoT, + and thus must share the same gp. */ + return ! SYMBOL_REF_EXTERNAL_P (op); } /* Return 1 if OP is a SYMBOL_REF for which we can make a call via bsr. */ int -direct_call_operand (op, mode) - rtx op; - enum machine_mode mode; +direct_call_operand (rtx op, enum machine_mode mode) { - /* Must be defined in this file. */ - if (! current_file_function_operand (op, mode)) - return 0; + tree op_decl, cfun_sec, op_sec; + + /* Must share the same GP. */ + if (!samegp_function_operand (op, mode)) + return false; /* If profiling is implemented via linker tricks, we can't jump - to the nogp alternate entry point. */ + to the nogp alternate entry point. Note that current_function_profile + would not be correct, since that doesn't indicate if the target + function uses profiling. */ /* ??? TARGET_PROFILING_NEEDS_GP isn't really the right test, but is approximately correct for the OSF ABIs. Don't know what to do for VMS, NT, or UMK. */ - if (! TARGET_PROFILING_NEEDS_GP - && ! current_function_profile) - return 0; + if (!TARGET_PROFILING_NEEDS_GP && profile_flag) + return false; - return 1; + /* Must be a function. In some cases folks create thunks in static + data structures and then make calls to them. If we allow the + direct call, we'll get an error from the linker about !samegp reloc + against a symbol without a .prologue directive. */ + if (!SYMBOL_REF_FUNCTION_P (op)) + return false; + + /* Must be "near" so that the branch is assumed to reach. With + -msmall-text, this is assumed true of all local symbols. Since + we've already checked samegp, locality is already assured. */ + if (TARGET_SMALL_TEXT) + return true; + + /* Otherwise, a decl is "near" if it is defined in the same section. */ + if (flag_function_sections) + return false; + + op_decl = SYMBOL_REF_DECL (op); + if (DECL_ONE_ONLY (current_function_decl) + || (op_decl && DECL_ONE_ONLY (op_decl))) + return false; + + cfun_sec = DECL_SECTION_NAME (current_function_decl); + op_sec = op_decl ? DECL_SECTION_NAME (op_decl) : NULL; + return ((!cfun_sec && !op_sec) + || (cfun_sec && op_sec + && strcmp (TREE_STRING_POINTER (cfun_sec), + TREE_STRING_POINTER (op_sec)) == 0)); } /* Return true if OP is a LABEL_REF, or SYMBOL_REF or CONST referencing a (non-tls) variable known to be defined in this file. */ int -local_symbolic_operand (op, mode) - rtx op; - enum machine_mode mode; +local_symbolic_operand (rtx op, enum machine_mode mode) { - const char *str; - if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) return 0; @@ -1032,38 +912,15 @@ local_symbolic_operand (op, mode) if (GET_CODE (op) != SYMBOL_REF) return 0; - /* Easy pickings. */ - if (CONSTANT_POOL_ADDRESS_P (op) || STRING_POOL_ADDRESS_P (op)) - return 1; - - /* ??? SYMBOL_REF_FLAG is set for local function symbols, but we - run into problems with the rtl inliner in that the symbol was - once external, but is local after inlining, which results in - unrecognizable insns. */ - - str = XSTR (op, 0); - - /* If @[LS], then alpha_encode_section_info sez it's local. */ - if (str[0] == '@' && (str[1] == 'L' || str[1] == 'S')) - return 1; - - /* If *$, then ASM_GENERATE_INTERNAL_LABEL sez it's local. */ - if (str[0] == '*' && str[1] == '$') - return 1; - - return 0; + return SYMBOL_REF_LOCAL_P (op) && !SYMBOL_REF_TLS_MODEL (op); } /* Return true if OP is a SYMBOL_REF or CONST referencing a variable known to be defined in this file in the small data area. */ int -small_symbolic_operand (op, mode) - rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; +small_symbolic_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { - const char *str; - if (! TARGET_SMALL_DATA) return 0; @@ -1078,25 +935,22 @@ small_symbolic_operand (op, mode) if (GET_CODE (op) != SYMBOL_REF) return 0; + /* ??? There's no encode_section_info equivalent for the rtl + constant pool, so SYMBOL_FLAG_SMALL never gets set. */ if (CONSTANT_POOL_ADDRESS_P (op)) - return GET_MODE_SIZE (get_pool_mode (op)) <= (unsigned) g_switch_value; - else - { - str = XSTR (op, 0); - return str[0] == '@' && str[1] == 'S'; - } + return GET_MODE_SIZE (get_pool_mode (op)) <= g_switch_value; + + return (SYMBOL_REF_LOCAL_P (op) + && SYMBOL_REF_SMALL_P (op) + && SYMBOL_REF_TLS_MODEL (op) == 0); } /* Return true if OP is a SYMBOL_REF or CONST referencing a variable not known (or known not) to be defined in this file. */ int -global_symbolic_operand (op, mode) - rtx op; - enum machine_mode mode; +global_symbolic_operand (rtx op, enum machine_mode mode) { - const char *str; - if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) return 0; @@ -1108,20 +962,13 @@ global_symbolic_operand (op, mode) if (GET_CODE (op) != SYMBOL_REF) return 0; - if (local_symbolic_operand (op, mode)) - return 0; - - /* Also verify that it's not a TLS symbol. */ - str = XSTR (op, 0); - return str[0] != '%' && str[0] != '@'; + return !SYMBOL_REF_LOCAL_P (op) && !SYMBOL_REF_TLS_MODEL (op); } /* Return 1 if OP is a valid operand for the MEM of a CALL insn. */ int -call_operand (op, mode) - rtx op; - enum machine_mode mode; +call_operand (rtx op, enum machine_mode mode) { if (mode != Pmode) return 0; @@ -1130,7 +977,7 @@ call_operand (op, mode) { if (TARGET_ABI_OSF) { - /* Disallow virtual registers to cope with pathalogical test cases + /* Disallow virtual registers to cope with pathological test cases such as compile/930117-1.c in which the virtual reg decomposes to the frame pointer. Which is a hard reg that is not $27. */ return (REGNO (op) == 27 || REGNO (op) > LAST_VIRTUAL_REGISTER); @@ -1150,9 +997,7 @@ call_operand (op, mode) possibly with an offset. */ int -symbolic_operand (op, mode) - register rtx op; - enum machine_mode mode; +symbolic_operand (rtx op, enum machine_mode mode) { if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) return 0; @@ -1169,14 +1014,8 @@ symbolic_operand (op, mode) /* Return true if OP is valid for a particular TLS relocation. */ static int -tls_symbolic_operand_1 (op, mode, size, unspec) - rtx op; - enum machine_mode mode; - int size, unspec; +tls_symbolic_operand_1 (rtx op, enum machine_mode mode, int size, int unspec) { - const char *str; - int letter; - if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) return 0; @@ -1190,32 +1029,35 @@ tls_symbolic_operand_1 (op, mode, size, unspec) if (GET_CODE (op) != SYMBOL_REF) return 0; - str = XSTR (op, 0); - if (str[0] == '%') + if (SYMBOL_REF_LOCAL_P (op)) { - if (size != 64) + if (alpha_tls_size > size) return 0; } - else if (str[0] == '@') + else { - if (alpha_tls_size > size) + if (size != 64) return 0; } - else - return 0; - - letter = (unspec == UNSPEC_DTPREL ? 'D' : 'T'); - return str[1] == letter; + switch (SYMBOL_REF_TLS_MODEL (op)) + { + case TLS_MODEL_LOCAL_DYNAMIC: + return unspec == UNSPEC_DTPREL; + case TLS_MODEL_INITIAL_EXEC: + return unspec == UNSPEC_TPREL && size == 64; + case TLS_MODEL_LOCAL_EXEC: + return unspec == UNSPEC_TPREL; + default: + abort (); + } } /* Return true if OP is valid for 16-bit DTP relative relocations. */ int -dtp16_symbolic_operand (op, mode) - rtx op; - enum machine_mode mode; +dtp16_symbolic_operand (rtx op, enum machine_mode mode) { return tls_symbolic_operand_1 (op, mode, 16, UNSPEC_DTPREL); } @@ -1223,9 +1065,7 @@ dtp16_symbolic_operand (op, mode) /* Return true if OP is valid for 32-bit DTP relative relocations. */ int -dtp32_symbolic_operand (op, mode) - rtx op; - enum machine_mode mode; +dtp32_symbolic_operand (rtx op, enum machine_mode mode) { return tls_symbolic_operand_1 (op, mode, 32, UNSPEC_DTPREL); } @@ -1233,9 +1073,7 @@ dtp32_symbolic_operand (op, mode) /* Return true if OP is valid for 64-bit DTP relative relocations. */ int -gotdtp_symbolic_operand (op, mode) - rtx op; - enum machine_mode mode; +gotdtp_symbolic_operand (rtx op, enum machine_mode mode) { return tls_symbolic_operand_1 (op, mode, 64, UNSPEC_DTPREL); } @@ -1243,9 +1081,7 @@ gotdtp_symbolic_operand (op, mode) /* Return true if OP is valid for 16-bit TP relative relocations. */ int -tp16_symbolic_operand (op, mode) - rtx op; - enum machine_mode mode; +tp16_symbolic_operand (rtx op, enum machine_mode mode) { return tls_symbolic_operand_1 (op, mode, 16, UNSPEC_TPREL); } @@ -1253,9 +1089,7 @@ tp16_symbolic_operand (op, mode) /* Return true if OP is valid for 32-bit TP relative relocations. */ int -tp32_symbolic_operand (op, mode) - rtx op; - enum machine_mode mode; +tp32_symbolic_operand (rtx op, enum machine_mode mode) { return tls_symbolic_operand_1 (op, mode, 32, UNSPEC_TPREL); } @@ -1263,9 +1097,7 @@ tp32_symbolic_operand (op, mode) /* Return true if OP is valid for 64-bit TP relative relocations. */ int -gottp_symbolic_operand (op, mode) - rtx op; - enum machine_mode mode; +gottp_symbolic_operand (rtx op, enum machine_mode mode) { return tls_symbolic_operand_1 (op, mode, 64, UNSPEC_TPREL); } @@ -1274,9 +1106,7 @@ gottp_symbolic_operand (op, mode) comparisons are valid in which insn. */ int -alpha_comparison_operator (op, mode) - register rtx op; - enum machine_mode mode; +alpha_comparison_operator (rtx op, enum machine_mode mode) { enum rtx_code code = GET_CODE (op); @@ -1291,9 +1121,7 @@ alpha_comparison_operator (op, mode) Here we know which comparisons are valid in which insn. */ int -alpha_zero_comparison_operator (op, mode) - register rtx op; - enum machine_mode mode; +alpha_zero_comparison_operator (rtx op, enum machine_mode mode) { enum rtx_code code = GET_CODE (op); @@ -1307,9 +1135,7 @@ alpha_zero_comparison_operator (op, mode) /* Return 1 if OP is a valid Alpha swapped comparison operator. */ int -alpha_swapped_comparison_operator (op, mode) - register rtx op; - enum machine_mode mode; +alpha_swapped_comparison_operator (rtx op, enum machine_mode mode) { enum rtx_code code = GET_CODE (op); @@ -1325,9 +1151,7 @@ alpha_swapped_comparison_operator (op, mode) /* Return 1 if OP is a signed comparison operation. */ int -signed_comparison_operator (op, mode) - register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; +signed_comparison_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { enum rtx_code code = GET_CODE (op); @@ -1343,9 +1167,7 @@ signed_comparison_operator (op, mode) Here we know which comparisons are valid in which insn. */ int -alpha_fp_comparison_operator (op, mode) - register rtx op; - enum machine_mode mode; +alpha_fp_comparison_operator (rtx op, enum machine_mode mode) { enum rtx_code code = GET_CODE (op); @@ -1358,20 +1180,21 @@ alpha_fp_comparison_operator (op, mode) /* Return 1 if this is a divide or modulus operator. */ int -divmod_operator (op, mode) - register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; +divmod_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { - switch (GET_CODE (op)) - { - case DIV: case MOD: case UDIV: case UMOD: - return 1; + enum rtx_code code = GET_CODE (op); - default: - break; - } + return (code == DIV || code == MOD || code == UDIV || code == UMOD); +} - return 0; +/* Return 1 if this is a float->int conversion operator. */ + +int +fix_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) +{ + enum rtx_code code = GET_CODE (op); + + return (code == FIX || code == UNSIGNED_FIX); } /* Return 1 if this memory address is a known aligned register plus @@ -1381,9 +1204,7 @@ divmod_operator (op, mode) Take into account what reload will do. */ int -aligned_memory_operand (op, mode) - register rtx op; - enum machine_mode mode; +aligned_memory_operand (rtx op, enum machine_mode mode) { rtx base; @@ -1401,9 +1222,10 @@ aligned_memory_operand (op, mode) } } - if (GET_CODE (op) != MEM - || GET_MODE (op) != mode) + if (GET_CODE (op) != MEM) return 0; + if (MEM_ALIGN (op) >= 32) + return 1; op = XEXP (op, 0); /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo) @@ -1425,9 +1247,7 @@ aligned_memory_operand (op, mode) /* Similar, but return 1 if OP is a MEM which is not alignable. */ int -unaligned_memory_operand (op, mode) - register rtx op; - enum machine_mode mode; +unaligned_memory_operand (rtx op, enum machine_mode mode) { rtx base; @@ -1445,8 +1265,9 @@ unaligned_memory_operand (op, mode) } } - if (GET_CODE (op) != MEM - || GET_MODE (op) != mode) + if (GET_CODE (op) != MEM) + return 0; + if (MEM_ALIGN (op) >= 32) return 0; op = XEXP (op, 0); @@ -1469,9 +1290,7 @@ unaligned_memory_operand (op, mode) /* Return 1 if OP is either a register or an unaligned memory location. */ int -reg_or_unaligned_mem_operand (op, mode) - rtx op; - enum machine_mode mode; +reg_or_unaligned_mem_operand (rtx op, enum machine_mode mode) { return register_operand (op, mode) || unaligned_memory_operand (op, mode); } @@ -1479,9 +1298,7 @@ reg_or_unaligned_mem_operand (op, mode) /* Return 1 if OP is any memory location. During reload a pseudo matches. */ int -any_memory_operand (op, mode) - register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; +any_memory_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { return (GET_CODE (op) == MEM || (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG) @@ -1504,9 +1321,7 @@ any_memory_operand (op, mode) preventing combine from making the optimization. */ int -reg_not_elim_operand (op, mode) - register rtx op; - enum machine_mode mode; +reg_not_elim_operand (rtx op, enum machine_mode mode) { rtx inner = op; if (GET_CODE (op) == SUBREG) @@ -1522,9 +1337,7 @@ reg_not_elim_operand (op, mode) will do. */ int -normal_memory_operand (op, mode) - register rtx op; - enum machine_mode mode ATTRIBUTE_UNUSED; +normal_memory_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { if (reload_in_progress) { @@ -1551,9 +1364,7 @@ normal_memory_operand (op, mode) int->fp conversion. */ int -reg_no_subreg_operand (op, mode) - register rtx op; - enum machine_mode mode; +reg_no_subreg_operand (rtx op, enum machine_mode mode) { if (GET_CODE (op) != REG) return 0; @@ -1565,9 +1376,7 @@ reg_no_subreg_operand (op, mode) elimination. */ int -addition_operation (op, mode) - register rtx op; - enum machine_mode mode; +addition_operation (rtx op, enum machine_mode mode) { if (GET_MODE (op) != mode && mode != VOIDmode) return 0; @@ -1583,9 +1392,7 @@ addition_operation (op, mode) the range defined for C in [I-P]. */ bool -alpha_const_ok_for_letter_p (value, c) - HOST_WIDE_INT value; - int c; +alpha_const_ok_for_letter_p (HOST_WIDE_INT value, int c) { switch (c) { @@ -1624,9 +1431,7 @@ alpha_const_ok_for_letter_p (value, c) matches for C in [GH]. */ bool -alpha_const_double_ok_for_letter_p (value, c) - rtx value; - int c; +alpha_const_double_ok_for_letter_p (rtx value, int c) { switch (c) { @@ -1650,9 +1455,7 @@ alpha_const_double_ok_for_letter_p (value, c) matches for C. */ bool -alpha_extra_constraint (value, c) - rtx value; - int c; +alpha_extra_constraint (rtx value, int c) { switch (c) { @@ -1678,7 +1481,7 @@ alpha_extra_constraint (value, c) /* Return 1 if this function can directly return via $26. */ int -direct_return () +direct_return (void) { return (! TARGET_ABI_OPEN_VMS && ! TARGET_ABI_UNICOSMK && reload_completed @@ -1691,8 +1494,7 @@ direct_return () /* Return the ADDR_VEC associated with a tablejump insn. */ rtx -alpha_tablejump_addr_vec (insn) - rtx insn; +alpha_tablejump_addr_vec (rtx insn) { rtx tmp; @@ -1711,8 +1513,7 @@ alpha_tablejump_addr_vec (insn) /* Return the label of the predicted edge, or CONST0_RTX if we don't know. */ rtx -alpha_tablejump_best_label (insn) - rtx insn; +alpha_tablejump_best_label (rtx insn) { rtx jump_table = alpha_tablejump_addr_vec (insn); rtx best_label = NULL_RTX; @@ -1746,77 +1547,58 @@ alpha_tablejump_best_label (insn) /* Return the TLS model to use for SYMBOL. */ static enum tls_model -tls_symbolic_operand_type (symbol) - rtx symbol; +tls_symbolic_operand_type (rtx symbol) { - const char *str; + enum tls_model model; if (GET_CODE (symbol) != SYMBOL_REF) return 0; - str = XSTR (symbol, 0); + model = SYMBOL_REF_TLS_MODEL (symbol); - if (str[0] == '%') - { - /* ??? Be prepared for -ftls-model=local-dynamic. Perhaps we shouldn't - have separately encoded local-ness. On well, maybe the user will use - attribute visibility next time. At least we don't crash... */ - if (str[1] == 'G' || str[1] == 'D') - return TLS_MODEL_GLOBAL_DYNAMIC; - if (str[1] == 'T') - return TLS_MODEL_INITIAL_EXEC; - } - else if (str[0] == '@') - { - if (str[1] == 'D') - { - /* Local dynamic is a waste if we're not going to combine - the __tls_get_addr calls. So avoid it if not optimizing. */ - if (optimize) - return TLS_MODEL_LOCAL_DYNAMIC; - else - return TLS_MODEL_GLOBAL_DYNAMIC; - } - if (str[1] == 'T') - { - /* 64-bit local exec is the same as initial exec except without - the dynamic relocation. In either case we use a got entry. */ - if (alpha_tls_size == 64) - return TLS_MODEL_INITIAL_EXEC; - else - return TLS_MODEL_LOCAL_EXEC; - } - } + /* Local-exec with a 64-bit size is the same code as initial-exec. */ + if (model == TLS_MODEL_LOCAL_EXEC && alpha_tls_size == 64) + model = TLS_MODEL_INITIAL_EXEC; - return 0; + return model; } - -/* Return true if the function DECL will be placed in the default text - section. */ -/* ??? Ideally we'd be able to always move from a SYMBOL_REF back to the - decl, as that would allow us to determine if two functions are in the - same section, which is what we really want to know. */ +/* Return true if the function DECL will share the same GP as any + function in the current unit of translation. */ static bool -decl_in_text_section (decl) - tree decl; +decl_has_samegp (tree decl) { - return (DECL_SECTION_NAME (decl) == NULL_TREE - && ! (flag_function_sections - || (targetm.have_named_sections - && DECL_ONE_ONLY (decl)))); + /* Functions that are not local can be overridden, and thus may + not share the same gp. */ + if (!(*targetm.binds_local_p) (decl)) + return false; + + /* If -msmall-data is in effect, assume that there is only one GP + for the module, and so any local symbol has this property. We + need explicit relocations to be able to enforce this for symbols + not defined in this unit of translation, however. */ + if (TARGET_EXPLICIT_RELOCS && TARGET_SMALL_DATA) + return true; + + /* Functions that are not external are defined in this UoT. */ + /* ??? Irritatingly, static functions not yet emitted are still + marked "external". Apply this to non-static functions only. */ + return !TREE_PUBLIC (decl) || !DECL_EXTERNAL (decl); } /* Return true if EXP should be placed in the small data section. */ static bool -alpha_in_small_data_p (exp) - tree exp; +alpha_in_small_data_p (tree exp) { /* We want to merge strings, so we never consider them small data. */ if (TREE_CODE (exp) == STRING_CST) return false; + /* Functions are never in the small data area. Duh. */ + if (TREE_CODE (exp) == FUNCTION_DECL) + return false; + if (TREE_CODE (exp) == VAR_DECL && DECL_SECTION_NAME (exp)) { const char *section = TREE_STRING_POINTER (DECL_SECTION_NAME (exp)); @@ -1830,136 +1612,16 @@ alpha_in_small_data_p (exp) /* If this is an incomplete type with size 0, then we can't put it in sdata because it might be too big when completed. */ - if (size > 0 && size <= g_switch_value) + if (size > 0 && (unsigned HOST_WIDE_INT) size <= g_switch_value) return true; } return false; } -/* If we are referencing a function that is static, make the SYMBOL_REF - special. We use this to see indicate we can branch to this function - without setting PV or restoring GP. - - If this is a variable that is known to be defined locally, add "@v" - to the name. If in addition the variable is to go in .sdata/.sbss, - then add "@s" instead. */ - -static void -alpha_encode_section_info (decl, first) - tree decl; - int first ATTRIBUTE_UNUSED; -{ - const char *symbol_str; - bool is_local; - char encoding = 0; - rtx rtl, symbol; - - rtl = DECL_P (decl) ? DECL_RTL (decl) : TREE_CST_RTL (decl); - - /* Careful not to prod global register variables. */ - if (GET_CODE (rtl) != MEM) - return; - symbol = XEXP (rtl, 0); - if (GET_CODE (symbol) != SYMBOL_REF) - return; - - if (TREE_CODE (decl) == FUNCTION_DECL) - { - /* We mark public functions once they are emitted; otherwise we - don't know that they exist in this unit of translation. */ - if (TREE_PUBLIC (decl)) - return; - - /* Do not mark functions that are not in .text; otherwise we - don't know that they are near enough for a direct branch. */ - if (! decl_in_text_section (decl)) - return; - - SYMBOL_REF_FLAG (symbol) = 1; - return; - } - - /* Early out if we're not going to do anything with this data. */ - if (! TARGET_EXPLICIT_RELOCS) - return; - - symbol_str = XSTR (symbol, 0); - - /* A variable is considered "local" if it is defined in this module. */ - is_local = (*targetm.binds_local_p) (decl); - - /* Care for TLS variables. */ - if (TREE_CODE (decl) == VAR_DECL && DECL_THREAD_LOCAL (decl)) - { - switch (decl_tls_model (decl)) - { - case TLS_MODEL_GLOBAL_DYNAMIC: - encoding = 'G'; - break; - case TLS_MODEL_LOCAL_DYNAMIC: - encoding = 'D'; - break; - case TLS_MODEL_INITIAL_EXEC: - case TLS_MODEL_LOCAL_EXEC: - encoding = 'T'; - break; - } - } - else if (is_local) - { - /* Determine if DECL will wind up in .sdata/.sbss. */ - if (alpha_in_small_data_p (decl)) - encoding = 'S'; - else - encoding = 'L'; - } - - /* Finally, encode this into the symbol string. */ - if (encoding) - { - char *newstr; - size_t len; - char want_prefix = (is_local ? '@' : '%'); - char other_prefix = (is_local ? '%' : '@'); - - if (symbol_str[0] == want_prefix) - { - if (symbol_str[1] == encoding) - return; - symbol_str += 2; - } - else if (symbol_str[0] == other_prefix) - symbol_str += 2; - - len = strlen (symbol_str) + 1; - newstr = alloca (len + 2); - - newstr[0] = want_prefix; - newstr[1] = encoding; - memcpy (newstr + 2, symbol_str, len); - - XSTR (symbol, 0) = ggc_alloc_string (newstr, len + 2 - 1); - } -} - -/* Undo the effects of the above. */ - -static const char * -alpha_strip_name_encoding (str) - const char *str; -{ - if (str[0] == '@' || str[0] == '%') - str += 2; - if (str[0] == '*') - str++; - return str; -} - #if TARGET_ABI_OPEN_VMS static bool -alpha_linkage_symbol_p (symname) - const char *symname; +alpha_linkage_symbol_p (const char *symname) { int symlen = strlen (symname); @@ -1988,10 +1650,7 @@ alpha_linkage_symbol_p (symname) low-order three bits; this is an "unaligned" access. */ bool -alpha_legitimate_address_p (mode, x, strict) - enum machine_mode mode; - rtx x; - int strict; +alpha_legitimate_address_p (enum machine_mode mode, rtx x, int strict) { /* If this is an ldq_u type address, discard the outer AND. */ if (mode == DImode @@ -2087,14 +1746,24 @@ alpha_legitimate_address_p (mode, x, strict) return false; } +/* Build the SYMBOL_REF for __tls_get_addr. */ + +static GTY(()) rtx tls_get_addr_libfunc; + +static rtx +get_tls_get_addr (void) +{ + if (!tls_get_addr_libfunc) + tls_get_addr_libfunc = init_one_libfunc ("__tls_get_addr"); + return tls_get_addr_libfunc; +} + /* Try machine-dependent ways of modifying an illegitimate address to be legitimate. If we find one, return the new, valid address. */ rtx -alpha_legitimize_address (x, scratch, mode) - rtx x; - rtx scratch; - enum machine_mode mode ATTRIBUTE_UNUSED; +alpha_legitimize_address (rtx x, rtx scratch, + enum machine_mode mode ATTRIBUTE_UNUSED) { HOST_WIDE_INT addend; @@ -2154,7 +1823,7 @@ alpha_legitimize_address (x, scratch, mode) r0 = gen_rtx_REG (Pmode, 0); r16 = gen_rtx_REG (Pmode, 16); - tga = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_addr"); + tga = get_tls_get_addr (); dest = gen_reg_rtx (Pmode); seq = GEN_INT (alpha_next_sequence_number++); @@ -2175,7 +1844,7 @@ alpha_legitimize_address (x, scratch, mode) r0 = gen_rtx_REG (Pmode, 0); r16 = gen_rtx_REG (Pmode, 16); - tga = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_addr"); + tga = get_tls_get_addr (); scratch = gen_reg_rtx (Pmode); seq = GEN_INT (alpha_next_sequence_number++); @@ -2278,23 +1947,30 @@ alpha_legitimize_address (x, scratch, mode) } } +/* We do not allow indirect calls to be optimized into sibling calls, nor + can we allow a call to a function with a different GP to be optimized + into a sibcall. */ + +static bool +alpha_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED) +{ + /* Can't do indirect tail calls, since we don't know if the target + uses the same GP. */ + if (!decl) + return false; + + /* Otherwise, we can make a tail call if the target function shares + the same GP. */ + return decl_has_samegp (decl); +} + /* For TARGET_EXPLICIT_RELOCS, we don't obfuscate a SYMBOL_REF to a small symbolic operand until after reload. At which point we need to replace (mem (symbol_ref)) with (mem (lo_sum $29 symbol_ref)) so that sched2 has the proper dependency information. */ -int -some_small_symbolic_operand (x, mode) - rtx x; - enum machine_mode mode ATTRIBUTE_UNUSED; -{ - return for_each_rtx (&x, some_small_symbolic_operand_1, NULL); -} - static int -some_small_symbolic_operand_1 (px, data) - rtx *px; - void *data ATTRIBUTE_UNUSED; +some_small_symbolic_operand_1 (rtx *px, void *data ATTRIBUTE_UNUSED) { rtx x = *px; @@ -2305,19 +1981,14 @@ some_small_symbolic_operand_1 (px, data) return small_symbolic_operand (x, Pmode) != 0; } -rtx -split_small_symbolic_operand (x) - rtx x; +int +some_small_symbolic_operand (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED) { - x = copy_insn (x); - for_each_rtx (&x, split_small_symbolic_operand_1, NULL); - return x; + return for_each_rtx (&x, some_small_symbolic_operand_1, NULL); } static int -split_small_symbolic_operand_1 (px, data) - rtx *px; - void *data ATTRIBUTE_UNUSED; +split_small_symbolic_operand_1 (rtx *px, void *data ATTRIBUTE_UNUSED) { rtx x = *px; @@ -2335,16 +2006,48 @@ split_small_symbolic_operand_1 (px, data) return 0; } +rtx +split_small_symbolic_operand (rtx x) +{ + x = copy_insn (x); + for_each_rtx (&x, split_small_symbolic_operand_1, NULL); + return x; +} + +/* Indicate that INSN cannot be duplicated. This is true for any insn + that we've marked with gpdisp relocs, since those have to stay in + 1-1 correspondence with one another. + + Technically we could copy them if we could set up a mapping from one + sequence number to another, across the set of insns to be duplicated. + This seems overly complicated and error-prone since interblock motion + from sched-ebb could move one of the pair of insns to a different block. + + Also cannot allow jsr insns to be duplicated. If they throw exceptions, + then they'll be in a different block from their ldgp. Which could lead + the bb reorder code to think that it would be ok to copy just the block + containing the call and branch to the block containing the ldgp. */ + +static bool +alpha_cannot_copy_insn_p (rtx insn) +{ + if (!reload_completed || !TARGET_EXPLICIT_RELOCS) + return false; + if (recog_memoized (insn) >= 0) + return get_attr_cannot_copy (insn); + else + return false; +} + + /* Try a machine-dependent way of reloading an illegitimate address operand. If we find one, push the reload and return the new rtx. */ rtx -alpha_legitimize_reload_address (x, mode, opnum, type, ind_levels) - rtx x; - enum machine_mode mode ATTRIBUTE_UNUSED; - int opnum; - int type; - int ind_levels ATTRIBUTE_UNUSED; +alpha_legitimize_reload_address (rtx x, + enum machine_mode mode ATTRIBUTE_UNUSED, + int opnum, int type, + int ind_levels ATTRIBUTE_UNUSED) { /* We must recognize output that we have already generated ourselves. */ if (GET_CODE (x) == PLUS @@ -2393,15 +2096,154 @@ alpha_legitimize_reload_address (x, mode, opnum, type, ind_levels) return NULL_RTX; } +/* Compute a (partial) cost for rtx X. Return true if the complete + cost has been computed, and false if subexpressions should be + scanned. In either case, *TOTAL contains the cost result. */ + +static bool +alpha_rtx_costs (rtx x, int code, int outer_code, int *total) +{ + enum machine_mode mode = GET_MODE (x); + bool float_mode_p = FLOAT_MODE_P (mode); + + switch (code) + { + /* If this is an 8-bit constant, return zero since it can be used + nearly anywhere with no cost. If it is a valid operand for an + ADD or AND, likewise return 0 if we know it will be used in that + context. Otherwise, return 2 since it might be used there later. + All other constants take at least two insns. */ + case CONST_INT: + if (INTVAL (x) >= 0 && INTVAL (x) < 256) + { + *total = 0; + return true; + } + /* FALLTHRU */ + + case CONST_DOUBLE: + if (x == CONST0_RTX (mode)) + *total = 0; + else if ((outer_code == PLUS && add_operand (x, VOIDmode)) + || (outer_code == AND && and_operand (x, VOIDmode))) + *total = 0; + else if (add_operand (x, VOIDmode) || and_operand (x, VOIDmode)) + *total = 2; + else + *total = COSTS_N_INSNS (2); + return true; + + case CONST: + case SYMBOL_REF: + case LABEL_REF: + if (TARGET_EXPLICIT_RELOCS && small_symbolic_operand (x, VOIDmode)) + *total = COSTS_N_INSNS (outer_code != MEM); + else if (TARGET_EXPLICIT_RELOCS && local_symbolic_operand (x, VOIDmode)) + *total = COSTS_N_INSNS (1 + (outer_code != MEM)); + else if (tls_symbolic_operand_type (x)) + /* Estimate of cost for call_pal rduniq. */ + *total = COSTS_N_INSNS (15); + else + /* Otherwise we do a load from the GOT. */ + *total = COSTS_N_INSNS (alpha_memory_latency); + return true; + + case PLUS: + case MINUS: + if (float_mode_p) + *total = alpha_rtx_cost_data[alpha_cpu].fp_add; + else if (GET_CODE (XEXP (x, 0)) == MULT + && const48_operand (XEXP (XEXP (x, 0), 1), VOIDmode)) + { + *total = (rtx_cost (XEXP (XEXP (x, 0), 0), outer_code) + + rtx_cost (XEXP (x, 1), outer_code) + 2); + return true; + } + return false; + + case MULT: + if (float_mode_p) + *total = alpha_rtx_cost_data[alpha_cpu].fp_mult; + else if (mode == DImode) + *total = alpha_rtx_cost_data[alpha_cpu].int_mult_di; + else + *total = alpha_rtx_cost_data[alpha_cpu].int_mult_si; + return false; + + case ASHIFT: + if (GET_CODE (XEXP (x, 1)) == CONST_INT + && INTVAL (XEXP (x, 1)) <= 3) + { + *total = COSTS_N_INSNS (1); + return false; + } + /* FALLTHRU */ + + case ASHIFTRT: + case LSHIFTRT: + *total = alpha_rtx_cost_data[alpha_cpu].int_shift; + return false; + + case IF_THEN_ELSE: + if (float_mode_p) + *total = alpha_rtx_cost_data[alpha_cpu].fp_add; + else + *total = alpha_rtx_cost_data[alpha_cpu].int_cmov; + return false; + + case DIV: + case UDIV: + case MOD: + case UMOD: + if (!float_mode_p) + *total = COSTS_N_INSNS (70); /* ??? */ + else if (mode == SFmode) + *total = alpha_rtx_cost_data[alpha_cpu].fp_div_sf; + else + *total = alpha_rtx_cost_data[alpha_cpu].fp_div_df; + return false; + + case MEM: + *total = COSTS_N_INSNS (alpha_memory_latency); + return true; + + case NEG: + if (! float_mode_p) + { + *total = COSTS_N_INSNS (1); + return false; + } + /* FALLTHRU */ + + case ABS: + if (! float_mode_p) + { + *total = COSTS_N_INSNS (1) + alpha_rtx_cost_data[alpha_cpu].int_cmov; + return false; + } + /* FALLTHRU */ + + case FLOAT: + case UNSIGNED_FLOAT: + case FIX: + case UNSIGNED_FIX: + case FLOAT_EXTEND: + case FLOAT_TRUNCATE: + *total = alpha_rtx_cost_data[alpha_cpu].fp_add; + return false; + + default: + return false; + } +} + /* REF is an alignable memory location. Place an aligned SImode reference into *PALIGNED_MEM and the number of bits to shift into *PBITNUM. SCRATCH is a free register for use in reloading out of range stack slots. */ void -get_aligned_mem (ref, paligned_mem, pbitnum) - rtx ref; - rtx *paligned_mem, *pbitnum; +get_aligned_mem (rtx ref, rtx *paligned_mem, rtx *pbitnum) { rtx base; HOST_WIDE_INT offset = 0; @@ -2439,9 +2281,7 @@ get_aligned_mem (ref, paligned_mem, pbitnum) Add EXTRA_OFFSET to the address we return. */ rtx -get_unaligned_address (ref, extra_offset) - rtx ref; - int extra_offset; +get_unaligned_address (rtx ref, int extra_offset) { rtx base; HOST_WIDE_INT offset = 0; @@ -2474,9 +2314,7 @@ get_unaligned_address (ref, extra_offset) symbolic constants cannot be dropped to memory. */ enum reg_class -alpha_preferred_reload_class(x, class) - rtx x; - enum reg_class class; +alpha_preferred_reload_class(rtx x, enum reg_class class) { /* Zero is present in any register class. */ if (x == CONST0_RTX (GET_MODE (x))) @@ -2513,11 +2351,8 @@ alpha_preferred_reload_class(x, class) from register elimination into a DImode fp register. */ enum reg_class -secondary_reload_class (class, mode, x, in) - enum reg_class class; - enum machine_mode mode; - rtx x; - int in; +secondary_reload_class (enum reg_class class, enum machine_mode mode, + rtx x, int in) { if ((mode == QImode || mode == HImode) && ! TARGET_BWX) { @@ -2555,9 +2390,7 @@ secondary_reload_class (class, mode, x, in) found in part of X. */ static void -alpha_set_memflags_1 (x, in_struct_p, volatile_p, unchanging_p) - rtx x; - int in_struct_p, volatile_p, unchanging_p; +alpha_set_memflags_1 (rtx x, int in_struct_p, int volatile_p, int unchanging_p) { int i; @@ -2607,9 +2440,7 @@ alpha_set_memflags_1 (x, in_struct_p, volatile_p, unchanging_p) a MEM, don't do anything. */ void -alpha_set_memflags (insn, ref) - rtx insn; - rtx ref; +alpha_set_memflags (rtx insn, rtx ref) { int in_struct_p, volatile_p, unchanging_p; @@ -2629,62 +2460,11 @@ alpha_set_memflags (insn, ref) alpha_set_memflags_1 (insn, in_struct_p, volatile_p, unchanging_p); } -/* Try to output insns to set TARGET equal to the constant C if it can be - done in less than N insns. Do all computations in MODE. Returns the place - where the output has been placed if it can be done and the insns have been - emitted. If it would take more than N insns, zero is returned and no - insns and emitted. */ - -rtx -alpha_emit_set_const (target, mode, c, n) - rtx target; - enum machine_mode mode; - HOST_WIDE_INT c; - int n; -{ - rtx result = 0; - rtx orig_target = target; - int i; - - /* If we can't make any pseudos, TARGET is an SImode hard register, we - can't load this constant in one insn, do this in DImode. */ - if (no_new_pseudos && mode == SImode - && GET_CODE (target) == REG && REGNO (target) < FIRST_PSEUDO_REGISTER - && (result = alpha_emit_set_const_1 (target, mode, c, 1)) == 0) - { - target = gen_lowpart (DImode, target); - mode = DImode; - } - - /* Try 1 insn, then 2, then up to N. */ - for (i = 1; i <= n; i++) - { - result = alpha_emit_set_const_1 (target, mode, c, i); - if (result) - { - rtx insn = get_last_insn (); - rtx set = single_set (insn); - if (! CONSTANT_P (SET_SRC (set))) - set_unique_reg_note (get_last_insn (), REG_EQUAL, GEN_INT (c)); - break; - } - } - - /* Allow for the case where we changed the mode of TARGET. */ - if (result == target) - result = orig_target; - - return result; -} - -/* Internal routine for the above to check for N or below insns. */ +/* Internal routine for alpha_emit_set_const to check for N or below insns. */ static rtx -alpha_emit_set_const_1 (target, mode, c, n) - rtx target; - enum machine_mode mode; - HOST_WIDE_INT c; - int n; +alpha_emit_set_const_1 (rtx target, enum machine_mode mode, + HOST_WIDE_INT c, int n) { HOST_WIDE_INT new; int i, bits; @@ -2730,7 +2510,14 @@ alpha_emit_set_const_1 (target, mode, c, n) } else if (n >= 2 + (extra != 0)) { - temp = copy_to_suggested_reg (GEN_INT (high << 16), subtarget, mode); + if (no_new_pseudos) + { + emit_insn (gen_rtx_SET (VOIDmode, target, GEN_INT (high << 16))); + temp = target; + } + else + temp = copy_to_suggested_reg (GEN_INT (high << 16), + subtarget, mode); /* As of 2002-02-23, addsi3 is only available when not optimizing. This means that if we go through expand_binop, we'll try to @@ -2866,15 +2653,58 @@ alpha_emit_set_const_1 (target, mode, c, n) return 0; } +/* Try to output insns to set TARGET equal to the constant C if it can be + done in less than N insns. Do all computations in MODE. Returns the place + where the output has been placed if it can be done and the insns have been + emitted. If it would take more than N insns, zero is returned and no + insns and emitted. */ + +rtx +alpha_emit_set_const (rtx target, enum machine_mode mode, + HOST_WIDE_INT c, int n) +{ + rtx result = 0; + rtx orig_target = target; + int i; + + /* If we can't make any pseudos, TARGET is an SImode hard register, we + can't load this constant in one insn, do this in DImode. */ + if (no_new_pseudos && mode == SImode + && GET_CODE (target) == REG && REGNO (target) < FIRST_PSEUDO_REGISTER + && (result = alpha_emit_set_const_1 (target, mode, c, 1)) == 0) + { + target = gen_lowpart (DImode, target); + mode = DImode; + } + + /* Try 1 insn, then 2, then up to N. */ + for (i = 1; i <= n; i++) + { + result = alpha_emit_set_const_1 (target, mode, c, i); + if (result) + { + rtx insn = get_last_insn (); + rtx set = single_set (insn); + if (! CONSTANT_P (SET_SRC (set))) + set_unique_reg_note (get_last_insn (), REG_EQUAL, GEN_INT (c)); + break; + } + } + + /* Allow for the case where we changed the mode of TARGET. */ + if (result == target) + result = orig_target; + + return result; +} + /* Having failed to find a 3 insn sequence in alpha_emit_set_const, fall back to a straight forward decomposition. We do this to avoid exponential run times encountered when looking for longer sequences with alpha_emit_set_const. */ rtx -alpha_emit_set_long_const (target, c1, c2) - rtx target; - HOST_WIDE_INT c1, c2; +alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1, HOST_WIDE_INT c2) { HOST_WIDE_INT d1, d2, d3, d4; @@ -2931,9 +2761,7 @@ alpha_emit_set_long_const (target, c1, c2) We don't handle non-bwx subword loads here. */ bool -alpha_expand_mov (mode, operands) - enum machine_mode mode; - rtx *operands; +alpha_expand_mov (enum machine_mode mode, rtx *operands) { /* If the output is not a register, the input must be. */ if (GET_CODE (operands[0]) == MEM @@ -2949,8 +2777,12 @@ alpha_expand_mov (mode, operands) compiled at the end of compilation. In the meantime, someone can re-encode-section-info on some symbol changing it e.g. from global to local-not-small. If this happens, we'd have emitted a plain - load rather than a high+losum load and not recognize the insn. */ - if (TARGET_EXPLICIT_RELOCS + load rather than a high+losum load and not recognize the insn. + + So if rtl inlining is in effect, we delay the global/not-global + decision until rest_of_compilation by wrapping it in an + UNSPEC_SYMBOL. */ + if (TARGET_EXPLICIT_RELOCS && flag_inline_functions && rtx_equal_function_value_matters && global_symbolic_operand (operands[1], mode)) { @@ -3027,9 +2859,7 @@ alpha_expand_mov (mode, operands) return true if all work is done. */ bool -alpha_expand_mov_nobwx (mode, operands) - enum machine_mode mode; - rtx *operands; +alpha_expand_mov_nobwx (enum machine_mode mode, rtx *operands) { /* If the output is not a register, the input must be. */ if (GET_CODE (operands[0]) == MEM) @@ -3062,13 +2892,24 @@ alpha_expand_mov_nobwx (mode, operands) { rtx aligned_mem, bitnum; rtx scratch = gen_reg_rtx (SImode); + rtx subtarget; + bool copyout; get_aligned_mem (operands[1], &aligned_mem, &bitnum); + subtarget = operands[0]; + if (GET_CODE (subtarget) == REG) + subtarget = gen_lowpart (DImode, subtarget), copyout = false; + else + subtarget = gen_reg_rtx (DImode), copyout = true; + emit_insn ((mode == QImode ? gen_aligned_loadqi : gen_aligned_loadhi) - (operands[0], aligned_mem, bitnum, scratch)); + (subtarget, aligned_mem, bitnum, scratch)); + + if (copyout) + emit_move_insn (operands[0], gen_lowpart (mode, subtarget)); } } else @@ -3077,16 +2918,28 @@ alpha_expand_mov_nobwx (mode, operands) code depend on parameter evaluation order which will cause bootstrap failures. */ - rtx temp1 = gen_reg_rtx (DImode); - rtx temp2 = gen_reg_rtx (DImode); - rtx seq = ((mode == QImode - ? gen_unaligned_loadqi - : gen_unaligned_loadhi) - (operands[0], get_unaligned_address (operands[1], 0), - temp1, temp2)); + rtx temp1, temp2, seq, subtarget; + bool copyout; + temp1 = gen_reg_rtx (DImode); + temp2 = gen_reg_rtx (DImode); + + subtarget = operands[0]; + if (GET_CODE (subtarget) == REG) + subtarget = gen_lowpart (DImode, subtarget), copyout = false; + else + subtarget = gen_reg_rtx (DImode), copyout = true; + + seq = ((mode == QImode + ? gen_unaligned_loadqi + : gen_unaligned_loadhi) + (subtarget, get_unaligned_address (operands[1], 0), + temp1, temp2)); alpha_set_memflags (seq, operands[1]); emit_insn (seq); + + if (copyout) + emit_move_insn (operands[0], gen_lowpart (mode, subtarget)); } return true; } @@ -3182,8 +3035,7 @@ alpha_expand_mov_nobwx (mode, operands) much lower minimum execution time. */ void -alpha_emit_floatuns (operands) - rtx operands[2]; +alpha_emit_floatuns (rtx operands[2]) { rtx neglab, donelab, i0, i1, f0, in, out; enum machine_mode mode; @@ -3217,8 +3069,7 @@ alpha_emit_floatuns (operands) /* Generate the comparison for a conditional branch. */ rtx -alpha_emit_conditional_branch (code) - enum rtx_code code; +alpha_emit_conditional_branch (enum rtx_code code) { enum rtx_code cmp_code, branch_code; enum machine_mode cmp_mode, branch_mode = VOIDmode; @@ -3374,8 +3225,7 @@ alpha_emit_conditional_branch (code) valid. Return the final comparison, or NULL if we can't work. */ rtx -alpha_emit_setcc (code) - enum rtx_code code; +alpha_emit_setcc (enum rtx_code code) { enum rtx_code cmp_code; rtx op0 = alpha_compare.op0, op1 = alpha_compare.op1; @@ -3486,10 +3336,9 @@ alpha_emit_setcc (code) If both of the operands that set cc0 are nonzero we must emit an insn to perform the compare (it can't be done within the conditional move). */ + rtx -alpha_emit_conditional_move (cmp, mode) - rtx cmp; - enum machine_mode mode; +alpha_emit_conditional_move (rtx cmp, enum machine_mode mode) { enum rtx_code code = GET_CODE (cmp); enum rtx_code cmov_code = NE; @@ -3624,9 +3473,8 @@ alpha_emit_conditional_move (cmp, mode) cases we wouldn't have before cse. */ int -alpha_split_conditional_move (code, dest, cond, t_rtx, f_rtx) - enum rtx_code code; - rtx dest, cond, t_rtx, f_rtx; +alpha_split_conditional_move (enum rtx_code code, rtx dest, rtx cond, + rtx t_rtx, rtx f_rtx) { HOST_WIDE_INT t, f, diff; enum machine_mode mode; @@ -3659,7 +3507,7 @@ alpha_split_conditional_move (code, dest, cond, t_rtx, f_rtx) be shared. */ if (f == 0 && exact_log2 (diff) > 0 - /* On EV6, we've got enough shifters to make non-arithmatic shifts + /* On EV6, we've got enough shifters to make non-arithmetic shifts viable over a longer latency cmove. On EV5, the E0 slot is a scarce resource, and on EV4 shift has the same latency as a cmove. */ && (diff <= 8 || alpha_cpu == PROCESSOR_EV6)) @@ -3711,8 +3559,7 @@ alpha_split_conditional_move (code, dest, cond, t_rtx, f_rtx) given operation. */ static const char * -alpha_lookup_xfloating_lib_func (code) - enum rtx_code code; +alpha_lookup_xfloating_lib_func (enum rtx_code code) { struct xfloating_op { @@ -3798,9 +3645,8 @@ alpha_lookup_xfloating_lib_func (code) Compute that here. */ static int -alpha_compute_xfloating_mode_arg (code, round) - enum rtx_code code; - enum alpha_fp_rounding_mode round; +alpha_compute_xfloating_mode_arg (enum rtx_code code, + enum alpha_fp_rounding_mode round) { int mode; @@ -3844,12 +3690,8 @@ alpha_compute_xfloating_mode_arg (code, round) */ static void -alpha_emit_xfloating_libcall (func, target, operands, noperands, equiv) - const char *func; - rtx target; - rtx operands[]; - int noperands; - rtx equiv; +alpha_emit_xfloating_libcall (const char *func, rtx target, rtx operands[], + int noperands, rtx equiv) { rtx usage = NULL_RTX, tmp, reg; int regno = 16, i; @@ -3902,7 +3744,7 @@ alpha_emit_xfloating_libcall (func, target, operands, noperands, equiv) abort (); } - tmp = gen_rtx_MEM (QImode, gen_rtx_SYMBOL_REF (Pmode, (char *) func)); + tmp = gen_rtx_MEM (QImode, init_one_libfunc (func)); tmp = emit_call_insn (GEN_CALL_VALUE (reg, tmp, const0_rtx, const0_rtx, const0_rtx)); CALL_INSN_FUNCTION_USAGE (tmp) = usage; @@ -3916,9 +3758,7 @@ alpha_emit_xfloating_libcall (func, target, operands, noperands, equiv) /* Emit an X_floating library function call for arithmetic (+,-,*,/). */ void -alpha_emit_xfloating_arith (code, operands) - enum rtx_code code; - rtx operands[]; +alpha_emit_xfloating_arith (enum rtx_code code, rtx operands[]) { const char *func; int mode; @@ -3938,9 +3778,7 @@ alpha_emit_xfloating_arith (code, operands) /* Emit an X_floating library function call for a comparison. */ static rtx -alpha_emit_xfloating_compare (code, op0, op1) - enum rtx_code code; - rtx op0, op1; +alpha_emit_xfloating_compare (enum rtx_code code, rtx op0, rtx op1) { const char *func; rtx out, operands[2]; @@ -3962,13 +3800,15 @@ alpha_emit_xfloating_compare (code, op0, op1) /* Emit an X_floating library function call for a conversion. */ void -alpha_emit_xfloating_cvt (code, operands) - enum rtx_code code; - rtx operands[]; +alpha_emit_xfloating_cvt (enum rtx_code orig_code, rtx operands[]) { int noperands = 1, mode; rtx out_operands[2]; const char *func; + enum rtx_code code = orig_code; + + if (code == UNSIGNED_FIX) + code = FIX; func = alpha_lookup_xfloating_lib_func (code); @@ -3991,7 +3831,8 @@ alpha_emit_xfloating_cvt (code, operands) } alpha_emit_xfloating_libcall (func, operands[0], out_operands, noperands, - gen_rtx_fmt_e (code, GET_MODE (operands[0]), + gen_rtx_fmt_e (orig_code, + GET_MODE (operands[0]), operands[1])); } @@ -4000,8 +3841,7 @@ alpha_emit_xfloating_cvt (code, operands) little-endian. */ void -alpha_split_tfmode_pair (operands) - rtx operands[4]; +alpha_split_tfmode_pair (rtx operands[4]) { if (GET_CODE (operands[1]) == REG) { @@ -4037,9 +3877,7 @@ alpha_split_tfmode_pair (operands) logical operation to be performed. */ void -alpha_split_tfmode_frobsign (operands, operation) - rtx operands[3]; - rtx (*operation) PARAMS ((rtx, rtx, rtx)); +alpha_split_tfmode_frobsign (rtx operands[3], rtx (*operation) (rtx, rtx, rtx)) { rtx high_bit = operands[2]; rtx scratch; @@ -4106,10 +3944,8 @@ alpha_split_tfmode_frobsign (operands, operation) */ void -alpha_expand_unaligned_load (tgt, mem, size, ofs, sign) - rtx tgt, mem; - HOST_WIDE_INT size, ofs; - int sign; +alpha_expand_unaligned_load (rtx tgt, rtx mem, HOST_WIDE_INT size, + HOST_WIDE_INT ofs, int sign) { rtx meml, memh, addr, extl, exth, tmp, mema; enum machine_mode mode; @@ -4232,9 +4068,8 @@ alpha_expand_unaligned_load (tgt, mem, size, ofs, sign) /* Similarly, use ins and msk instructions to perform unaligned stores. */ void -alpha_expand_unaligned_store (dst, src, size, ofs) - rtx dst, src; - HOST_WIDE_INT size, ofs; +alpha_expand_unaligned_store (rtx dst, rtx src, + HOST_WIDE_INT size, HOST_WIDE_INT ofs) { rtx dstl, dsth, addr, insl, insh, meml, memh, dsta; @@ -4377,10 +4212,8 @@ alpha_expand_unaligned_store (dst, src, size, ofs) /* Load an integral number of consecutive unaligned quadwords. */ static void -alpha_expand_unaligned_load_words (out_regs, smem, words, ofs) - rtx *out_regs; - rtx smem; - HOST_WIDE_INT words, ofs; +alpha_expand_unaligned_load_words (rtx *out_regs, rtx smem, + HOST_WIDE_INT words, HOST_WIDE_INT ofs) { rtx const im8 = GEN_INT (-8); rtx const i64 = GEN_INT (64); @@ -4461,10 +4294,8 @@ alpha_expand_unaligned_load_words (out_regs, smem, words, ofs) may be NULL to store zeros. */ static void -alpha_expand_unaligned_store_words (data_regs, dmem, words, ofs) - rtx *data_regs; - rtx dmem; - HOST_WIDE_INT words, ofs; +alpha_expand_unaligned_store_words (rtx *data_regs, rtx dmem, + HOST_WIDE_INT words, HOST_WIDE_INT ofs) { rtx const im8 = GEN_INT (-8); rtx const i64 = GEN_INT (64); @@ -4578,8 +4409,7 @@ alpha_expand_unaligned_store_words (data_regs, dmem, words, ofs) operands[3] is the alignment. */ int -alpha_expand_block_move (operands) - rtx operands[]; +alpha_expand_block_move (rtx operands[]) { rtx bytes_rtx = operands[2]; rtx align_rtx = operands[3]; @@ -4653,7 +4483,8 @@ alpha_expand_block_move (operands) is held in the register. Nor if there is not a mode that handles the exact size. */ mode = mode_for_size (bytes * BITS_PER_UNIT, MODE_INT, 1); - if (mode != BLKmode + if (GET_CODE (tmp) == REG + && mode != BLKmode && GET_MODE_SIZE (GET_MODE (tmp)) >= bytes) { if (mode == TImode) @@ -4773,7 +4604,7 @@ alpha_expand_block_move (operands) tmp = XEXP (XEXP (orig_dst, 0), 0); mode = mode_for_size (orig_bytes * BITS_PER_UNIT, MODE_INT, 1); - if (GET_MODE (tmp) == mode) + if (GET_CODE (tmp) == REG && GET_MODE (tmp) == mode) { if (nregs == 1) { @@ -4915,8 +4746,7 @@ alpha_expand_block_move (operands) } int -alpha_expand_block_clear (operands) - rtx operands[]; +alpha_expand_block_clear (rtx operands[]) { rtx bytes_rtx = operands[1]; rtx align_rtx = operands[2]; @@ -5206,8 +5036,7 @@ alpha_expand_block_clear (operands) /* Returns a mask so that zap(x, value) == x & mask. */ rtx -alpha_expand_zap_mask (value) - HOST_WIDE_INT value; +alpha_expand_zap_mask (HOST_WIDE_INT value) { rtx result; int i; @@ -5252,10 +5081,9 @@ alpha_expand_zap_mask (value) } void -alpha_expand_builtin_vector_binop (gen, mode, op0, op1, op2) - rtx (*gen) PARAMS ((rtx, rtx, rtx)); - enum machine_mode mode; - rtx op0, op1, op2; +alpha_expand_builtin_vector_binop (rtx (*gen) (rtx, rtx, rtx), + enum machine_mode mode, + rtx op0, rtx op1, rtx op2) { op0 = gen_lowpart (mode, op0); @@ -5276,11 +5104,7 @@ alpha_expand_builtin_vector_binop (gen, mode, op0, op1, op2) a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ static int -alpha_adjust_cost (insn, link, dep_insn, cost) - rtx insn; - rtx link; - rtx dep_insn; - int cost; +alpha_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost) { enum attr_type insn_type, dep_insn_type; @@ -5311,13 +5135,13 @@ alpha_adjust_cost (insn, link, dep_insn, cost) /* The number of instructions that can be issued per cycle. */ static int -alpha_issue_rate () +alpha_issue_rate (void) { return (alpha_cpu == PROCESSOR_EV4 ? 2 : 4); } static int -alpha_use_dfa_pipeline_interface () +alpha_use_dfa_pipeline_interface (void) { return true; } @@ -5328,10 +5152,10 @@ alpha_use_dfa_pipeline_interface () For EV4, loads can be issued to either IB0 or IB1, thus we have 2 alternative schedules. For EV5, we can choose between E0/E1 and - FA/FM. For EV6, an arithmatic insn can be issued to U0/U1/L0/L1. */ + FA/FM. For EV6, an arithmetic insn can be issued to U0/U1/L0/L1. */ static int -alpha_multipass_dfa_lookahead () +alpha_multipass_dfa_lookahead (void) { return (alpha_cpu == PROCESSOR_EV6 ? 4 : 2); } @@ -5340,7 +5164,7 @@ alpha_multipass_dfa_lookahead () struct machine_function GTY(()) { - /* For unicosmk. */ + /* For unicosmk. */ /* List of call information words for calls from this function. */ struct rtx_def *first_ciw; struct rtx_def *last_ciw; @@ -5349,14 +5173,14 @@ struct machine_function GTY(()) /* List of deferred case vectors. */ struct rtx_def *addr_list; - /* For OSF. */ + /* For OSF. */ const char *some_ld_name; }; /* How to allocate a 'struct machine_function'. */ static struct machine_function * -alpha_init_machine_status () +alpha_init_machine_status (void) { return ((struct machine_function *) ggc_alloc_cleared (sizeof (struct machine_function))); @@ -5367,9 +5191,7 @@ alpha_init_machine_status () /* Start the ball rolling with RETURN_ADDR_RTX. */ rtx -alpha_return_addr (count, frame) - int count; - rtx frame ATTRIBUTE_UNUSED; +alpha_return_addr (int count, rtx frame ATTRIBUTE_UNUSED) { if (count != 0) return const0_rtx; @@ -5381,7 +5203,7 @@ alpha_return_addr (count, frame) function. Needed only if TARGET_LD_BUGGY_LDGP. */ rtx -alpha_gp_save_rtx () +alpha_gp_save_rtx (void) { rtx r = get_hard_reg_initial_val (DImode, 29); if (GET_CODE (r) != MEM) @@ -5390,7 +5212,7 @@ alpha_gp_save_rtx () } static int -alpha_ra_ever_killed () +alpha_ra_ever_killed (void) { rtx top; @@ -5409,7 +5231,7 @@ alpha_ra_ever_killed () instruction, or NULL. */ static const char * -get_trap_mode_suffix () +get_trap_mode_suffix (void) { enum attr_trap_suffix s = get_attr_trap_suffix (current_output_insn); @@ -5476,7 +5298,7 @@ get_trap_mode_suffix () instruction, or NULL. */ static const char * -get_round_mode_suffix () +get_round_mode_suffix (void) { enum attr_round_suffix s = get_attr_round_suffix (current_output_insn); @@ -5507,8 +5329,23 @@ get_round_mode_suffix () /* Locate some local-dynamic symbol still in use by this function so that we can print its name in some movdi_er_tlsldm pattern. */ +static int +get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED) +{ + rtx x = *px; + + if (GET_CODE (x) == SYMBOL_REF + && SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC) + { + cfun->machine->some_ld_name = XSTR (x, 0); + return 1; + } + + return 0; +} + static const char * -get_some_local_dynamic_name () +get_some_local_dynamic_name (void) { rtx insn; @@ -5523,33 +5360,10 @@ get_some_local_dynamic_name () abort (); } -static int -get_some_local_dynamic_name_1 (px, data) - rtx *px; - void *data ATTRIBUTE_UNUSED; -{ - rtx x = *px; - - if (GET_CODE (x) == SYMBOL_REF) - { - const char *str = XSTR (x, 0); - if (str[0] == '@' && str[1] == 'D') - { - cfun->machine->some_ld_name = str; - return 1; - } - } - - return 0; -} - /* Print an operand. Recognize special options, documented below. */ void -print_operand (file, x, code) - FILE *file; - rtx x; - int code; +print_operand (FILE *file, rtx x, int code) { int i; @@ -5585,6 +5399,13 @@ print_operand (file, x, code) fputc ((TARGET_FLOAT_VAX ? 'g' : 't'), file); break; + case '+': + /* Generates a nop after a noreturn call at the very end of the + function. */ + if (next_real_insn (current_output_insn) == 0) + fprintf (file, "\n\tnop"); + break; + case '#': if (alpha_this_literal_sequence_number == 0) alpha_this_literal_sequence_number = alpha_next_sequence_number++; @@ -5894,9 +5715,7 @@ print_operand (file, x, code) } void -print_operand_address (file, addr) - FILE *file; - rtx addr; +print_operand_address (FILE *file, rtx addr) { int basereg = 31; HOST_WIDE_INT offset = 0; @@ -5944,10 +5763,7 @@ print_operand_address (file, addr) } if (offset) - { - fputc ('+', file); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset); - } + fprintf (file, "+" HOST_WIDE_INT_PRINT_DEC, offset); addr = XEXP (addr, 0); if (GET_CODE (addr) == REG) @@ -5981,7 +5797,7 @@ print_operand_address (file, addr) && GET_CODE (XEXP (addr, 0)) == PLUS && GET_CODE (XEXP (XEXP (addr, 0), 0)) == SYMBOL_REF) { - fprintf (file, "%s+%d", + fprintf (file, "%s+" HOST_WIDE_INT_PRINT_DEC, XSTR (XEXP (XEXP (addr, 0), 0), 0), INTVAL (XEXP (XEXP (addr, 0), 1))); return; @@ -5991,8 +5807,7 @@ print_operand_address (file, addr) else abort (); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset); - fprintf (file, "($%d)", basereg); + fprintf (file, HOST_WIDE_INT_PRINT_DEC "($%d)", offset, basereg); } /* Emit RTL insns to initialize the variable parts of a trampoline at @@ -6009,9 +5824,8 @@ print_operand_address (file, addr) Note that the hint field is PC (new) + 4 * bits 13:0. */ void -alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs) - rtx tramp, fnaddr, cxt; - int fnofs, cxtofs, jmpofs; +alpha_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt, + int fnofs, int cxtofs, int jmpofs) { rtx temp, temp1, addr; /* VMS really uses DImode pointers in memory at this point. */ @@ -6050,8 +5864,8 @@ alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs) emit_move_insn (gen_rtx_MEM (SImode, addr), temp1); } -#ifdef TRANSFER_FROM_TRAMPOLINE - emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"), +#ifdef ENABLE_EXECUTE_STACK + emit_library_call (init_one_libfunc ("__enable_execute_stack"), 0, VOIDmode, 1, tramp, Pmode); #endif @@ -6076,23 +5890,31 @@ alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs) and the rest are pushed. */ rtx -function_arg (cum, mode, type, named) - CUMULATIVE_ARGS cum; - enum machine_mode mode; - tree type; - int named ATTRIBUTE_UNUSED; +function_arg (CUMULATIVE_ARGS cum, enum machine_mode mode, tree type, + int named ATTRIBUTE_UNUSED) { int basereg; int num_args; - /* Set up defaults for FP operands passed in FP registers, and - integral operands passed in integer registers. */ - if (TARGET_FPREGS - && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT - || GET_MODE_CLASS (mode) == MODE_FLOAT)) - basereg = 32 + 16; - else + /* Don't get confused and pass small structures in FP registers. */ + if (type && AGGREGATE_TYPE_P (type)) basereg = 16; + else + { +#ifdef ENABLE_CHECKING + /* With alpha_split_complex_arg, we shouldn't see any raw complex + values here. */ + if (COMPLEX_MODE_P (mode)) + abort (); +#endif + + /* Set up defaults for FP operands passed in FP registers, and + integral operands passed in integer registers. */ + if (TARGET_FPREGS && GET_MODE_CLASS (mode) == MODE_FLOAT) + basereg = 32 + 16; + else + basereg = 16; + } /* ??? Irritatingly, the definition of CUMULATIVE_ARGS is different for the three platforms, so we can't avoid conditional compilation. */ @@ -6105,8 +5927,7 @@ function_arg (cum, mode, type, named) if (num_args >= 6 || MUST_PASS_IN_STACK (mode, type)) return NULL_RTX; } -#else -#if TARGET_ABI_UNICOSMK +#elif TARGET_ABI_UNICOSMK { int size; @@ -6170,7 +5991,7 @@ function_arg (cum, mode, type, named) } } } -#else +#elif TARGET_ABI_OSF { if (cum >= 6) return NULL_RTX; @@ -6184,16 +6005,133 @@ function_arg (cum, mode, type, named) else if (FUNCTION_ARG_PASS_BY_REFERENCE (cum, mode, type, named)) basereg = 16; } -#endif /* TARGET_ABI_UNICOSMK */ -#endif /* TARGET_ABI_OPEN_VMS */ +#else +#error Unhandled ABI +#endif return gen_rtx_REG (mode, num_args + basereg); } -tree -alpha_build_va_list () +/* Return true if TYPE must be returned in memory, instead of in registers. */ + +static bool +alpha_return_in_memory (tree type, tree fndecl ATTRIBUTE_UNUSED) +{ + enum machine_mode mode = VOIDmode; + int size; + + if (type) + { + mode = TYPE_MODE (type); + + /* All aggregates are returned in memory. */ + if (AGGREGATE_TYPE_P (type)) + return true; + } + + size = GET_MODE_SIZE (mode); + switch (GET_MODE_CLASS (mode)) + { + case MODE_VECTOR_FLOAT: + /* Pass all float vectors in memory, like an aggregate. */ + return true; + + case MODE_COMPLEX_FLOAT: + /* We judge complex floats on the size of their element, + not the size of the whole type. */ + size = GET_MODE_UNIT_SIZE (mode); + break; + + case MODE_INT: + case MODE_FLOAT: + case MODE_COMPLEX_INT: + case MODE_VECTOR_INT: + break; + + default: + /* ??? We get called on all sorts of random stuff from + aggregate_value_p. We can't abort, but it's not clear + what's safe to return. Pretend it's a struct I guess. */ + return true; + } + + /* Otherwise types must fit in one register. */ + return size > UNITS_PER_WORD; +} + +/* Define how to find the value returned by a function. VALTYPE is the + data type of the value (as a tree). If the precise function being + called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. + MODE is set instead of VALTYPE for libcalls. + + On Alpha the value is found in $0 for integer functions and + $f0 for floating-point functions. */ + +rtx +function_value (tree valtype, tree func ATTRIBUTE_UNUSED, + enum machine_mode mode) +{ + unsigned int regnum; + enum mode_class class; + +#ifdef ENABLE_CHECKING + if (valtype && alpha_return_in_memory (valtype, func)) + abort (); +#endif + + if (valtype) + mode = TYPE_MODE (valtype); + + class = GET_MODE_CLASS (mode); + switch (class) + { + case MODE_INT: + /* Do the same thing as PROMOTE_MODE. */ + mode = DImode; + /* FALLTHRU */ + + case MODE_COMPLEX_INT: + case MODE_VECTOR_INT: + regnum = 0; + break; + + case MODE_FLOAT: + regnum = 32; + break; + + case MODE_COMPLEX_FLOAT: + { + enum machine_mode cmode = GET_MODE_INNER (mode); + + return gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_EXPR_LIST (VOIDmode, gen_rtx_REG (cmode, 32), + GEN_INT (0)), + gen_rtx_EXPR_LIST (VOIDmode, gen_rtx_REG (cmode, 33), + GEN_INT (GET_MODE_SIZE (cmode))))); + } + + default: + abort (); + } + + return gen_rtx_REG (mode, regnum); +} + +/* TCmode complex values are passed by invisible reference. We + should not split these values. */ + +static bool +alpha_split_complex_arg (tree type) { - tree base, ofs, record, type_decl; + return TYPE_MODE (type) != TCmode; +} + +static tree +alpha_build_builtin_va_list (void) +{ + tree base, ofs, space, record, type_decl; if (TARGET_ABI_OPEN_VMS || TARGET_ABI_UNICOSMK) return ptr_type_node; @@ -6205,9 +6143,16 @@ alpha_build_va_list () /* C++? SET_IS_AGGR_TYPE (record, 1); */ + /* Dummy field to prevent alignment warnings. */ + space = build_decl (FIELD_DECL, NULL_TREE, integer_type_node); + DECL_FIELD_CONTEXT (space) = record; + DECL_ARTIFICIAL (space) = 1; + DECL_IGNORED_P (space) = 1; + ofs = build_decl (FIELD_DECL, get_identifier ("__offset"), integer_type_node); DECL_FIELD_CONTEXT (ofs) = record; + TREE_CHAIN (ofs) = space; base = build_decl (FIELD_DECL, get_identifier ("__base"), ptr_type_node); @@ -6220,10 +6165,87 @@ alpha_build_va_list () return record; } +/* Perform any needed actions needed for a function that is receiving a + variable number of arguments. */ + +static void +alpha_setup_incoming_varargs (CUMULATIVE_ARGS *pcum, + enum machine_mode mode ATTRIBUTE_UNUSED, + tree type ATTRIBUTE_UNUSED, + int *pretend_size, int no_rtl) +{ +#if TARGET_ABI_UNICOSMK + /* On Unicos/Mk, the standard subroutine __T3E_MISMATCH stores all register + arguments on the stack. Unfortunately, it doesn't always store the first + one (i.e. the one that arrives in $16 or $f16). This is not a problem + with stdargs as we always have at least one named argument there. */ + int num_reg_words = pcum->num_reg_words; + if (num_reg_words < 6) + { + if (!no_rtl) + { + emit_insn (gen_umk_mismatch_args (GEN_INT (num_reg_words + 1))); + emit_insn (gen_arg_home_umk ()); + } + *pretend_size = 0; + } +#elif TARGET_ABI_OPEN_VMS + /* For VMS, we allocate space for all 6 arg registers plus a count. + + However, if NO registers need to be saved, don't allocate any space. + This is not only because we won't need the space, but because AP + includes the current_pretend_args_size and we don't want to mess up + any ap-relative addresses already made. */ + if (pcum->num_args < 6) + { + if (!no_rtl) + { + emit_move_insn (gen_rtx_REG (DImode, 1), virtual_incoming_args_rtx); + emit_insn (gen_arg_home ()); + } + *pretend_size = 7 * UNITS_PER_WORD; + } +#else + /* On OSF/1 and friends, we allocate space for all 12 arg registers, but + only push those that are remaining. However, if NO registers need to + be saved, don't allocate any space. This is not only because we won't + need the space, but because AP includes the current_pretend_args_size + and we don't want to mess up any ap-relative addresses already made. + + If we are not to use the floating-point registers, save the integer + registers where we would put the floating-point registers. This is + not the most efficient way to implement varargs with just one register + class, but it isn't worth doing anything more efficient in this rare + case. */ + CUMULATIVE_ARGS cum = *pcum; + + if (cum >= 6) + return; + + if (!no_rtl) + { + int set = get_varargs_alias_set (); + rtx tmp; + + tmp = gen_rtx_MEM (BLKmode, + plus_constant (virtual_incoming_args_rtx, + (cum + 6) * UNITS_PER_WORD)); + set_mem_alias_set (tmp, set); + move_block_from_reg (16 + cum, tmp, 6 - cum); + + tmp = gen_rtx_MEM (BLKmode, + plus_constant (virtual_incoming_args_rtx, + cum * UNITS_PER_WORD)); + set_mem_alias_set (tmp, set); + move_block_from_reg (16 + (TARGET_FPREGS ? 32 : 0) + cum, tmp, + 6 - cum); + } + *pretend_size = 12 * UNITS_PER_WORD; +#endif +} + void -alpha_va_start (valist, nextarg) - tree valist; - rtx nextarg ATTRIBUTE_UNUSED; +alpha_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED) { HOST_WIDE_INT offset; tree t, offset_field, base_field; @@ -6285,8 +6307,7 @@ alpha_va_start (valist, nextarg) } rtx -alpha_va_arg (valist, type) - tree valist, type; +alpha_va_arg (tree valist, tree type) { rtx addr; tree t, type_size, rounded_size; @@ -6339,7 +6360,27 @@ alpha_va_arg (valist, type) indirect = 1; rounded_size = size_int (UNITS_PER_WORD); } - else if (FLOAT_TYPE_P (type)) + else if (TREE_CODE (type) == COMPLEX_TYPE) + { + rtx real_part, imag_part, value, tmp; + + real_part = alpha_va_arg (valist, TREE_TYPE (type)); + imag_part = alpha_va_arg (valist, TREE_TYPE (type)); + + /* ??? Most irritatingly, we're not returning the value here, + but the address. Since real_part and imag_part are not + necessarily contiguous, we must copy to local storage. */ + + real_part = gen_rtx_MEM (TYPE_MODE (TREE_TYPE (type)), real_part); + imag_part = gen_rtx_MEM (TYPE_MODE (TREE_TYPE (type)), imag_part); + value = gen_rtx_CONCAT (TYPE_MODE (type), real_part, imag_part); + + tmp = assign_temp (type, 0, 1, 0); + emit_move_insn (tmp, value); + + return XEXP (tmp, 0); + } + else if (TREE_CODE (type) == REAL_TYPE) { tree fpaddend, cond; @@ -6546,7 +6587,7 @@ static struct alpha_builtin_def const two_arg_builtins[] = { }; static void -alpha_init_builtins () +alpha_init_builtins (void) { const struct alpha_builtin_def *p; tree ftype; @@ -6597,12 +6638,10 @@ alpha_init_builtins () IGNORE is nonzero if the value is to be ignored. */ static rtx -alpha_expand_builtin (exp, target, subtarget, mode, ignore) - tree exp; - rtx target; - rtx subtarget ATTRIBUTE_UNUSED; - enum machine_mode mode ATTRIBUTE_UNUSED; - int ignore ATTRIBUTE_UNUSED; +alpha_expand_builtin (tree exp, rtx target, + rtx subtarget ATTRIBUTE_UNUSED, + enum machine_mode mode ATTRIBUTE_UNUSED, + int ignore ATTRIBUTE_UNUSED) { #define MAX_ARGS 2 @@ -6686,7 +6725,7 @@ alpha_expand_builtin (exp, target, subtarget, mode, ignore) /* These variables are used for communication between the following functions. They indicate various things about the current function being compiled that are used to tell what kind of prologue, epilogue and procedure - descriptior to generate. */ + descriptor to generate. */ /* Nonzero if we need a stack procedure. */ enum alpha_procedure_types {PT_NULL = 0, PT_REGISTER = 1, PT_STACK = 2}; @@ -6706,21 +6745,16 @@ static int vms_base_regno; /* Compute register masks for saved registers. */ static void -alpha_sa_mask (imaskP, fmaskP) - unsigned long *imaskP; - unsigned long *fmaskP; +alpha_sa_mask (unsigned long *imaskP, unsigned long *fmaskP) { unsigned long imask = 0; unsigned long fmask = 0; unsigned int i; - /* Irritatingly, there are two kinds of thunks -- those created with - TARGET_ASM_OUTPUT_MI_THUNK and those with DECL_THUNK_P that go - through the regular part of the compiler. In the - TARGET_ASM_OUTPUT_MI_THUNK case we don't have valid register life - info, but assemble_start_function wants to output .frame and - .mask directives. */ - if (current_function_is_thunk && !no_new_pseudos) + /* When outputting a thunk, we don't have valid register life info, + but assemble_start_function wants to output .frame and .mask + directives. */ + if (current_function_is_thunk) { *imaskP = 0; *fmaskP = 0; @@ -6728,7 +6762,7 @@ alpha_sa_mask (imaskP, fmaskP) } if (TARGET_ABI_OPEN_VMS && alpha_procedure_type == PT_STACK) - imask |= (1L << HARD_FRAME_POINTER_REGNUM); + imask |= (1UL << HARD_FRAME_POINTER_REGNUM); /* One for every register we have to save. */ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) @@ -6737,9 +6771,9 @@ alpha_sa_mask (imaskP, fmaskP) && (!TARGET_ABI_UNICOSMK || i != HARD_FRAME_POINTER_REGNUM)) { if (i < 32) - imask |= (1L << i); + imask |= (1UL << i); else - fmask |= (1L << (i - 32)); + fmask |= (1UL << (i - 32)); } /* We need to restore these for the handler. */ @@ -6750,7 +6784,7 @@ alpha_sa_mask (imaskP, fmaskP) unsigned regno = EH_RETURN_DATA_REGNO (i); if (regno == INVALID_REGNUM) break; - imask |= 1L << regno; + imask |= 1UL << regno; } /* Glibc likes to use $31 as an unwind stopper for crt0. To @@ -6758,19 +6792,19 @@ alpha_sa_mask (imaskP, fmaskP) zero in the prologue of _Unwind_RaiseException et al. */ imask |= 1UL << 31; } - + /* If any register spilled, then spill the return address also. */ /* ??? This is required by the Digital stack unwind specification and isn't needed if we're doing Dwarf2 unwinding. */ if (imask || fmask || alpha_ra_ever_killed ()) - imask |= (1L << REG_RA); + imask |= (1UL << REG_RA); *imaskP = imask; *fmaskP = fmask; } int -alpha_sa_size () +alpha_sa_size (void) { unsigned long mask[2]; int sa_size = 0; @@ -6872,15 +6906,39 @@ alpha_sa_size () return sa_size * 8; } +/* Define the offset between two registers, one to be eliminated, + and the other its replacement, at the start of a routine. */ + +HOST_WIDE_INT +alpha_initial_elimination_offset (unsigned int from, + unsigned int to ATTRIBUTE_UNUSED) +{ + HOST_WIDE_INT ret; + + ret = alpha_sa_size (); + ret += ALPHA_ROUND (current_function_outgoing_args_size); + + if (from == FRAME_POINTER_REGNUM) + ; + else if (from == ARG_POINTER_REGNUM) + ret += (ALPHA_ROUND (get_frame_size () + + current_function_pretend_args_size) + - current_function_pretend_args_size); + else + abort (); + + return ret; +} + int -alpha_pv_save_size () +alpha_pv_save_size (void) { alpha_sa_size (); return alpha_procedure_type == PT_STACK ? 8 : 0; } int -alpha_using_fp () +alpha_using_fp (void) { alpha_sa_size (); return vms_unwind_regno == HARD_FRAME_POINTER_REGNUM; @@ -6900,22 +6958,19 @@ const struct attribute_spec vms_attribute_table[] = #endif static int -find_lo_sum_using_gp (px, data) - rtx *px; - void *data ATTRIBUTE_UNUSED; +find_lo_sum_using_gp (rtx *px, void *data ATTRIBUTE_UNUSED) { return GET_CODE (*px) == LO_SUM && XEXP (*px, 0) == pic_offset_table_rtx; } int -alpha_find_lo_sum_using_gp (insn) - rtx insn; +alpha_find_lo_sum_using_gp (rtx insn) { return for_each_rtx (&PATTERN (insn), find_lo_sum_using_gp, NULL) > 0; } static int -alpha_does_function_need_gp () +alpha_does_function_need_gp (void) { rtx insn; @@ -6923,12 +6978,21 @@ alpha_does_function_need_gp () if (! TARGET_ABI_OSF) return 0; + /* We need the gp to load the address of __mcount. */ if (TARGET_PROFILING_NEEDS_GP && current_function_profile) return 1; + /* The code emitted by alpha_output_mi_thunk_osf uses the gp. */ if (current_function_is_thunk) return 1; + /* The nonlocal receiver pattern assumes that the gp is valid for + the nested function. Reasonable because it's almost always set + correctly already. For the cases where that's wrong, make sure + the nested function loads its gp on entry. */ + if (current_function_has_nonlocal_goto) + return 1; + /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first. Even if we are a static function, we still need to do this in case our address is taken and passed to something like qsort. */ @@ -6947,27 +7011,12 @@ alpha_does_function_need_gp () return 0; } -/* Write a version stamp. Don't write anything if we are running as a - cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */ - -#ifdef HAVE_STAMP_H -#include <stamp.h> -#endif - -void -alpha_write_verstamp (file) - FILE *file ATTRIBUTE_UNUSED; -{ -#ifdef MS_STAMP - fprintf (file, "\t.verstamp %d %d\n", MS_STAMP, LS_STAMP); -#endif -} /* Helper function to set RTX_FRAME_RELATED_P on instructions, including sequences. */ static rtx -set_frame_related_p () +set_frame_related_p (void) { rtx seq = get_insns (); rtx insn; @@ -7015,7 +7064,7 @@ set_frame_related_p () simply allocate stack without saving registers. */ void -alpha_expand_prologue () +alpha_expand_prologue (void) { /* Registers to save. */ unsigned long imask = 0; @@ -7143,15 +7192,14 @@ alpha_expand_prologue () and subtract it to sp. Yes, that's correct -- we have to reload the whole constant - into a temporary via ldah+lda then subtract from sp. To - ensure we get ldah+lda, we use a special pattern. */ + into a temporary via ldah+lda then subtract from sp. */ HOST_WIDE_INT lo, hi; lo = ((frame_size & 0xffff) ^ 0x8000) - 0x8000; hi = frame_size - lo; emit_move_insn (ptr, GEN_INT (hi)); - emit_insn (gen_nt_lda (ptr, GEN_INT (lo))); + emit_insn (gen_adddi3 (ptr, ptr, GEN_INT (lo))); seq = emit_insn (gen_subdi3 (stack_pointer_rtx, stack_pointer_rtx, ptr)); } @@ -7203,18 +7251,18 @@ alpha_expand_prologue () } /* Save register RA next. */ - if (imask & (1L << REG_RA)) + if (imask & (1UL << REG_RA)) { mem = gen_rtx_MEM (DImode, plus_constant (sa_reg, reg_offset)); set_mem_alias_set (mem, alpha_sr_alias_set); FRP (emit_move_insn (mem, gen_rtx_REG (DImode, REG_RA))); - imask &= ~(1L << REG_RA); + imask &= ~(1UL << REG_RA); reg_offset += 8; } /* Now save any other registers required to be saved. */ for (i = 0; i < 31; i++) - if (imask & (1L << i)) + if (imask & (1UL << i)) { mem = gen_rtx_MEM (DImode, plus_constant (sa_reg, reg_offset)); set_mem_alias_set (mem, alpha_sr_alias_set); @@ -7224,24 +7272,24 @@ alpha_expand_prologue () /* Store a zero if requested for unwinding. */ if (imask & (1UL << 31)) - { - rtx insn, t; - - mem = gen_rtx_MEM (DImode, plus_constant (sa_reg, reg_offset)); - set_mem_alias_set (mem, alpha_sr_alias_set); - insn = emit_move_insn (mem, const0_rtx); - - RTX_FRAME_RELATED_P (insn) = 1; - t = gen_rtx_REG (Pmode, 31); - t = gen_rtx_SET (VOIDmode, mem, t); - t = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, t, REG_NOTES (insn)); - REG_NOTES (insn) = t; - - reg_offset += 8; - } - + { + rtx insn, t; + + mem = gen_rtx_MEM (DImode, plus_constant (sa_reg, reg_offset)); + set_mem_alias_set (mem, alpha_sr_alias_set); + insn = emit_move_insn (mem, const0_rtx); + + RTX_FRAME_RELATED_P (insn) = 1; + t = gen_rtx_REG (Pmode, 31); + t = gen_rtx_SET (VOIDmode, mem, t); + t = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, t, REG_NOTES (insn)); + REG_NOTES (insn) = t; + + reg_offset += 8; + } + for (i = 0; i < 31; i++) - if (fmask & (1L << i)) + if (fmask & (1UL << i)) { mem = gen_rtx_MEM (DFmode, plus_constant (sa_reg, reg_offset)); set_mem_alias_set (mem, alpha_sr_alias_set); @@ -7257,7 +7305,7 @@ alpha_expand_prologue () reg_offset = -56; for (i = 9; i < 15; i++) - if (imask & (1L << i)) + if (imask & (1UL << i)) { mem = gen_rtx_MEM (DImode, plus_constant(hard_frame_pointer_rtx, reg_offset)); @@ -7266,7 +7314,7 @@ alpha_expand_prologue () reg_offset -= 8; } for (i = 2; i < 10; i++) - if (fmask & (1L << i)) + if (fmask & (1UL << i)) { mem = gen_rtx_MEM (DFmode, plus_constant (hard_frame_pointer_rtx, reg_offset)); @@ -7294,11 +7342,31 @@ alpha_expand_prologue () /* If we have to allocate space for outgoing args, do it now. */ if (current_function_outgoing_args_size != 0) - FRP (emit_move_insn - (stack_pointer_rtx, - plus_constant (hard_frame_pointer_rtx, - - (ALPHA_ROUND - (current_function_outgoing_args_size))))); + { + rtx seq + = emit_move_insn (stack_pointer_rtx, + plus_constant + (hard_frame_pointer_rtx, + - (ALPHA_ROUND + (current_function_outgoing_args_size)))); + + /* Only set FRAME_RELATED_P on the stack adjustment we just emitted + if ! frame_pointer_needed. Setting the bit will change the CFA + computation rule to use sp again, which would be wrong if we had + frame_pointer_needed, as this means sp might move unpredictably + later on. + + Also, note that + frame_pointer_needed + => vms_unwind_regno == HARD_FRAME_POINTER_REGNUM + and + current_function_outgoing_args_size != 0 + => alpha_procedure_type != PT_NULL, + + so when we are not setting the bit here, we are guaranteed to + have emitted an FRP frame pointer update just before. */ + RTX_FRAME_RELATED_P (seq) = ! frame_pointer_needed; + } } else if (!TARGET_ABI_UNICOSMK) { @@ -7332,17 +7400,15 @@ alpha_expand_prologue () /* Output the textual info surrounding the prologue. */ void -alpha_start_function (file, fnname, decl) - FILE *file; - const char *fnname; - tree decl ATTRIBUTE_UNUSED; +alpha_start_function (FILE *file, const char *fnname, + tree decl ATTRIBUTE_UNUSED) { unsigned long imask = 0; unsigned long fmask = 0; /* Stack space needed for pushing registers clobbered by us. */ HOST_WIDE_INT sa_size; /* Complete stack size needed. */ - HOST_WIDE_INT frame_size; + unsigned HOST_WIDE_INT frame_size; /* Offset from base reg to register save area. */ HOST_WIDE_INT reg_offset; char *entry_label = (char *) alloca (strlen (fnname) + 6); @@ -7400,7 +7466,7 @@ alpha_start_function (file, fnname, decl) #ifdef ASM_OUTPUT_SOURCE_LINE if (debug_info_level != DINFO_LEVEL_TERSE) ASM_OUTPUT_SOURCE_LINE (file, - DECL_SOURCE_LINE (current_function_decl)); + DECL_SOURCE_LINE (current_function_decl), 0); #endif } @@ -7458,23 +7524,17 @@ alpha_start_function (file, fnname, decl) if (TARGET_ABI_UNICOSMK) ; else if (TARGET_ABI_OPEN_VMS) - { - fprintf (file, "\t.frame $%d,", vms_unwind_regno); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, - frame_size >= ((HOST_WIDE_INT) 1 << 31) ? 0 : frame_size); - fputs (",$26,", file); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, reg_offset); - fputs ("\n", file); - } + fprintf (file, "\t.frame $%d," HOST_WIDE_INT_PRINT_DEC ",$26," + HOST_WIDE_INT_PRINT_DEC "\n", + vms_unwind_regno, + frame_size >= (1UL << 31) ? 0 : frame_size, + reg_offset); else if (!flag_inhibit_size_directive) - { - fprintf (file, "\t.frame $%d,", - (frame_pointer_needed - ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM)); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, - frame_size >= (1l << 31) ? 0 : frame_size); - fprintf (file, ",$26,%d\n", current_function_pretend_args_size); - } + fprintf (file, "\t.frame $%d," HOST_WIDE_INT_PRINT_DEC ",$26,%d\n", + (frame_pointer_needed + ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM), + frame_size >= (1UL << 31) ? 0 : frame_size, + current_function_pretend_args_size); /* Describe which registers were spilled. */ if (TARGET_ABI_UNICOSMK) @@ -7484,7 +7544,7 @@ alpha_start_function (file, fnname, decl) if (imask) /* ??? Does VMS care if mask contains ra? The old code didn't set it, so I don't here. */ - fprintf (file, "\t.mask 0x%lx,0\n", imask & ~(1L << REG_RA)); + fprintf (file, "\t.mask 0x%lx,0\n", imask & ~(1UL << REG_RA)); if (fmask) fprintf (file, "\t.fmask 0x%lx,0\n", fmask); if (alpha_procedure_type == PT_REGISTER) @@ -7494,23 +7554,17 @@ alpha_start_function (file, fnname, decl) { if (imask) { - fprintf (file, "\t.mask 0x%lx,", imask); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, - frame_size >= (1l << 31) ? 0 : reg_offset - frame_size); - putc ('\n', file); + fprintf (file, "\t.mask 0x%lx," HOST_WIDE_INT_PRINT_DEC "\n", imask, + frame_size >= (1UL << 31) ? 0 : reg_offset - frame_size); for (i = 0; i < 32; ++i) - if (imask & (1L << i)) + if (imask & (1UL << i)) reg_offset += 8; } if (fmask) - { - fprintf (file, "\t.fmask 0x%lx,", fmask); - fprintf (file, HOST_WIDE_INT_PRINT_DEC, - frame_size >= (1l << 31) ? 0 : reg_offset - frame_size); - putc ('\n', file); - } + fprintf (file, "\t.fmask 0x%lx," HOST_WIDE_INT_PRINT_DEC "\n", fmask, + frame_size >= (1UL << 31) ? 0 : reg_offset - frame_size); } #if TARGET_ABI_OPEN_VMS @@ -7529,8 +7583,7 @@ alpha_start_function (file, fnname, decl) /* Emit the .prologue note at the scheduled end of the prologue. */ static void -alpha_output_function_end_prologue (file) - FILE *file; +alpha_output_function_end_prologue (FILE *file) { if (TARGET_ABI_UNICOSMK) ; @@ -7552,7 +7605,7 @@ alpha_output_function_end_prologue (file) #define FRP(exp) exp void -alpha_expand_epilogue () +alpha_expand_epilogue (void) { /* Registers to save. */ unsigned long imask = 0; @@ -7644,10 +7697,10 @@ alpha_expand_epilogue () FRP (emit_move_insn (gen_rtx_REG (DImode, REG_RA), mem)); reg_offset += 8; - imask &= ~(1L << REG_RA); + imask &= ~(1UL << REG_RA); for (i = 0; i < 31; ++i) - if (imask & (1L << i)) + if (imask & (1UL << i)) { if (i == HARD_FRAME_POINTER_REGNUM && fp_is_frame_pointer) fp_offset = reg_offset; @@ -7664,7 +7717,7 @@ alpha_expand_epilogue () reg_offset += 8; for (i = 0; i < 31; ++i) - if (fmask & (1L << i)) + if (fmask & (1UL << i)) { mem = gen_rtx_MEM (DFmode, plus_constant(sa_reg, reg_offset)); set_mem_alias_set (mem, alpha_sr_alias_set); @@ -7679,7 +7732,7 @@ alpha_expand_epilogue () reg_offset = -56; for (i = 9; i < 15; i++) - if (imask & (1L << i)) + if (imask & (1UL << i)) { mem = gen_rtx_MEM (DImode, plus_constant(hard_frame_pointer_rtx, reg_offset)); @@ -7689,7 +7742,7 @@ alpha_expand_epilogue () } for (i = 2; i < 10; i++) - if (fmask & (1L << i)) + if (fmask & (1UL << i)) { mem = gen_rtx_MEM (DFmode, plus_constant(hard_frame_pointer_rtx, reg_offset)); @@ -7810,46 +7863,10 @@ alpha_expand_epilogue () } } -#if TARGET_ABI_OPEN_VMS -#include <splay-tree.h> - -/* Structure to collect function names for final output - in link section. */ - -enum links_kind {KIND_UNUSED, KIND_LOCAL, KIND_EXTERN}; -enum reloc_kind {KIND_LINKAGE, KIND_CODEADDR}; - -struct alpha_funcs -{ - int num; - splay_tree links; -}; - -struct alpha_links -{ - int num; - rtx linkage; - enum links_kind lkind; - enum reloc_kind rkind; -}; - -static splay_tree alpha_funcs_tree; -static splay_tree alpha_links_tree; - -static int mark_alpha_links_node PARAMS ((splay_tree_node, void *)); -static void mark_alpha_links PARAMS ((void *)); -static int alpha_write_one_linkage PARAMS ((splay_tree_node, void *)); - -static int alpha_funcs_num; -#endif - /* Output the rest of the textual info surrounding the epilogue. */ void -alpha_end_function (file, fnname, decl) - FILE *file; - const char *fnname; - tree decl; +alpha_end_function (FILE *file, const char *fnname, tree decl ATTRIBUTE_UNUSED) { /* End the function. */ if (!TARGET_ABI_UNICOSMK && !flag_inhibit_size_directive) @@ -7864,17 +7881,6 @@ alpha_end_function (file, fnname, decl) alpha_write_linkage (file, fnname, decl); #endif - /* Show that we know this function if it is called again. - - Do this only for functions whose symbols bind locally. - - Don't do this for functions not defined in the .text section, as - otherwise it's not unlikely that the destination is out of range - for a direct branch. */ - - if ((*targetm.binds_local_p) (decl) && decl_in_text_section (decl)) - SYMBOL_REF_FLAG (XEXP (DECL_RTL (decl), 0)) = 1; - /* Output jump tables and the static subroutine information block. */ if (TARGET_ABI_UNICOSMK) { @@ -7894,23 +7900,20 @@ alpha_end_function (file, fnname, decl) Not sure why this idea hasn't been explored before... */ static void -alpha_output_mi_thunk_osf (file, thunk_fndecl, delta, vcall_offset, function) - FILE *file; - tree thunk_fndecl ATTRIBUTE_UNUSED; - HOST_WIDE_INT delta; - HOST_WIDE_INT vcall_offset; - tree function; +alpha_output_mi_thunk_osf (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, + HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset, + tree function) { HOST_WIDE_INT hi, lo; rtx this, insn, funexp; /* We always require a valid GP. */ emit_insn (gen_prologue_ldgp ()); - emit_note (NULL, NOTE_INSN_PROLOGUE_END); + emit_note (NOTE_INSN_PROLOGUE_END); /* Find the "this" pointer. If the function returns a structure, the structure return pointer is in $16. */ - if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)))) + if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function)) this = gen_rtx_REG (Pmode, 17); else this = gen_rtx_REG (Pmode, 16); @@ -7980,6 +7983,7 @@ alpha_output_mi_thunk_osf (file, thunk_fndecl, delta, vcall_offset, function) instruction scheduling worth while. Note that use_thunk calls assemble_start_function and assemble_end_function. */ insn = get_insns (); + insn_locators_initialize (); shorten_branches (insn); final_start_function (insn, file, 1); final (insn, file, 1, 0); @@ -8016,9 +8020,7 @@ long alpha_auto_offset; /* Emit a new filename to a stream. */ void -alpha_output_filename (stream, name) - FILE *stream; - const char *name; +alpha_output_filename (FILE *stream, const char *name) { static int first_time = TRUE; char ltext_label_name[100]; @@ -8059,13 +8061,11 @@ alpha_output_filename (stream, name) fprintf (stream, "\n"); } } - + /* Emit a linenumber to a stream. */ void -alpha_output_lineno (stream, line) - FILE *stream; - int line; +alpha_output_lineno (FILE *stream, int line) { if (write_symbols == DBX_DEBUG) { @@ -8089,18 +8089,12 @@ struct shadow_summary } used, defd; }; -static void summarize_insn PARAMS ((rtx, struct shadow_summary *, int)); -static void alpha_handle_trap_shadows PARAMS ((rtx)); - /* Summary the effects of expression X on the machine. Update SUM, a pointer to the summary structure. SET is nonzero if the insn is setting the object, otherwise zero. */ static void -summarize_insn (x, sum, set) - rtx x; - struct shadow_summary *sum; - int set; +summarize_insn (rtx x, struct shadow_summary *sum, int set) { const char *format_ptr; int i, j; @@ -8254,8 +8248,7 @@ summarize_insn (x, sum, set) (d) The trap shadow may not include any branch instructions. */ static void -alpha_handle_trap_shadows (insns) - rtx insns; +alpha_handle_trap_shadows (void) { struct shadow_summary shadow; int trap_pending, exception_nesting; @@ -8268,7 +8261,7 @@ alpha_handle_trap_shadows (insns) shadow.used.mem = 0; shadow.defd = shadow.used; - for (i = insns; i ; i = NEXT_INSN (i)) + for (i = get_insns (); i ; i = NEXT_INSN (i)) { if (GET_CODE (i) == NOTE) { @@ -8388,7 +8381,7 @@ alpha_handle_trap_shadows (insns) } /* Alpha can only issue instruction groups simultaneously if they are - suitibly aligned. This is very processor-specific. */ + suitably aligned. This is very processor-specific. */ enum alphaev4_pipe { EV4_STOP = 0, @@ -8408,19 +8401,8 @@ enum alphaev5_pipe { EV5_FM = 64 }; -static enum alphaev4_pipe alphaev4_insn_pipe PARAMS ((rtx)); -static enum alphaev5_pipe alphaev5_insn_pipe PARAMS ((rtx)); -static rtx alphaev4_next_group PARAMS ((rtx, int *, int *)); -static rtx alphaev5_next_group PARAMS ((rtx, int *, int *)); -static rtx alphaev4_next_nop PARAMS ((int *)); -static rtx alphaev5_next_nop PARAMS ((int *)); - -static void alpha_align_insns - PARAMS ((rtx, unsigned int, rtx (*)(rtx, int *, int *), rtx (*)(int *))); - static enum alphaev4_pipe -alphaev4_insn_pipe (insn) - rtx insn; +alphaev4_insn_pipe (rtx insn) { if (recog_memoized (insn) < 0) return EV4_STOP; @@ -8462,8 +8444,7 @@ alphaev4_insn_pipe (insn) } static enum alphaev5_pipe -alphaev5_insn_pipe (insn) - rtx insn; +alphaev5_insn_pipe (rtx insn) { if (recog_memoized (insn) < 0) return EV5_STOP; @@ -8518,9 +8499,7 @@ alphaev5_insn_pipe (insn) LEN is, of course, the length of the group in bytes. */ static rtx -alphaev4_next_group (insn, pin_use, plen) - rtx insn; - int *pin_use, *plen; +alphaev4_next_group (rtx insn, int *pin_use, int *plen) { int len, in_use; @@ -8618,9 +8597,7 @@ alphaev4_next_group (insn, pin_use, plen) LEN is, of course, the length of the group in bytes. */ static rtx -alphaev5_next_group (insn, pin_use, plen) - rtx insn; - int *pin_use, *plen; +alphaev5_next_group (rtx insn, int *pin_use, int *plen) { int len, in_use; @@ -8745,8 +8722,7 @@ alphaev5_next_group (insn, pin_use, plen) } static rtx -alphaev4_next_nop (pin_use) - int *pin_use; +alphaev4_next_nop (int *pin_use) { int in_use = *pin_use; rtx nop; @@ -8774,8 +8750,7 @@ alphaev4_next_nop (pin_use) } static rtx -alphaev5_next_nop (pin_use) - int *pin_use; +alphaev5_next_nop (int *pin_use) { int in_use = *pin_use; rtx nop; @@ -8805,11 +8780,9 @@ alphaev5_next_nop (pin_use) /* The instruction group alignment main loop. */ static void -alpha_align_insns (insns, max_align, next_group, next_nop) - rtx insns; - unsigned int max_align; - rtx (*next_group) PARAMS ((rtx, int *, int *)); - rtx (*next_nop) PARAMS ((int *)); +alpha_align_insns (unsigned int max_align, + rtx (*next_group) (rtx, int *, int *), + rtx (*next_nop) (int *)) { /* ALIGN is the known alignment for the insn group. */ unsigned int align; @@ -8819,7 +8792,7 @@ alpha_align_insns (insns, max_align, next_group, next_nop) rtx i, next; /* Let shorten branches care for assigning alignments to code labels. */ - shorten_branches (insns); + shorten_branches (get_insns ()); if (align_functions < 4) align = 4; @@ -8829,7 +8802,7 @@ alpha_align_insns (insns, max_align, next_group, next_nop) align = max_align; ofs = prev_in_use = 0; - i = insns; + i = get_insns (); if (GET_CODE (i) == NOTE) i = next_nonnote_insn (i); @@ -8900,7 +8873,7 @@ alpha_align_insns (insns, max_align, next_group, next_nop) int nop_count = (align - ofs) / 4; rtx where; - /* Insert nops before labels, branches, and calls to truely merge + /* Insert nops before labels, branches, and calls to truly merge the execution of the nops with the previous instruction group. */ where = prev_nonnote_insn (i); if (where) @@ -8931,12 +8904,11 @@ alpha_align_insns (insns, max_align, next_group, next_nop) /* Machine dependent reorg pass. */ -void -alpha_reorg (insns) - rtx insns; +static void +alpha_reorg (void) { if (alpha_tp != ALPHA_TP_PROG || flag_exceptions) - alpha_handle_trap_shadows (insns); + alpha_handle_trap_shadows (); /* Due to the number of extra trapb insns, don't bother fixing up alignment when trap precision is instruction. Moreover, we can @@ -8946,25 +8918,60 @@ alpha_reorg (insns) && flag_schedule_insns_after_reload) { if (alpha_cpu == PROCESSOR_EV4) - alpha_align_insns (insns, 8, alphaev4_next_group, alphaev4_next_nop); + alpha_align_insns (8, alphaev4_next_group, alphaev4_next_nop); else if (alpha_cpu == PROCESSOR_EV5) - alpha_align_insns (insns, 16, alphaev5_next_group, alphaev5_next_nop); + alpha_align_insns (16, alphaev5_next_group, alphaev5_next_nop); } } +#if !TARGET_ABI_UNICOSMK + +#ifdef HAVE_STAMP_H +#include <stamp.h> +#endif + +static void +alpha_file_start (void) +{ +#ifdef OBJECT_FORMAT_ELF + /* If emitting dwarf2 debug information, we cannot generate a .file + directive to start the file, as it will conflict with dwarf2out + file numbers. So it's only useful when emitting mdebug output. */ + targetm.file_start_file_directive = (write_symbols == DBX_DEBUG); +#endif + + default_file_start (); +#ifdef MS_STAMP + fprintf (asm_out_file, "\t.verstamp %d %d\n", MS_STAMP, LS_STAMP); +#endif + + fputs ("\t.set noreorder\n", asm_out_file); + fputs ("\t.set volatile\n", asm_out_file); + if (!TARGET_ABI_OPEN_VMS) + fputs ("\t.set noat\n", asm_out_file); + if (TARGET_EXPLICIT_RELOCS) + fputs ("\t.set nomacro\n", asm_out_file); + if (TARGET_SUPPORT_ARCH | TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX) + fprintf (asm_out_file, + "\t.arch %s\n", + TARGET_CPU_EV6 ? "ev6" + : (TARGET_CPU_EV5 + ? (TARGET_MAX ? "pca56" : TARGET_BWX ? "ev56" : "ev5") + : "ev4")); +} +#endif + #ifdef OBJECT_FORMAT_ELF /* Switch to the section to which we should output X. The only thing special we do here is to honor small data. */ static void -alpha_elf_select_rtx_section (mode, x, align) - enum machine_mode mode; - rtx x; - unsigned HOST_WIDE_INT align; +alpha_elf_select_rtx_section (enum machine_mode mode, rtx x, + unsigned HOST_WIDE_INT align) { if (TARGET_SMALL_DATA && GET_MODE_SIZE (mode) <= g_switch_value) - /* ??? Consider using mergable sdata sections. */ + /* ??? Consider using mergeable sdata sections. */ sdata_section (); else default_elf_select_rtx_section (mode, x, align); @@ -8972,13 +8979,40 @@ alpha_elf_select_rtx_section (mode, x, align) #endif /* OBJECT_FORMAT_ELF */ +/* Structure to collect function names for final output in link section. */ +/* Note that items marked with GTY can't be ifdef'ed out. */ + +enum links_kind {KIND_UNUSED, KIND_LOCAL, KIND_EXTERN}; +enum reloc_kind {KIND_LINKAGE, KIND_CODEADDR}; + +struct alpha_links GTY(()) +{ + int num; + rtx linkage; + enum links_kind lkind; + enum reloc_kind rkind; +}; + +struct alpha_funcs GTY(()) +{ + int num; + splay_tree GTY ((param1_is (char *), param2_is (struct alpha_links *))) + links; +}; + +static GTY ((param1_is (char *), param2_is (struct alpha_links *))) + splay_tree alpha_links_tree; +static GTY ((param1_is (tree), param2_is (struct alpha_funcs *))) + splay_tree alpha_funcs_tree; + +static GTY(()) int alpha_funcs_num; + #if TARGET_ABI_OPEN_VMS /* Return the VMS argument type corresponding to MODE. */ enum avms_arg_type -alpha_arg_type (mode) - enum machine_mode mode; +alpha_arg_type (enum machine_mode mode) { switch (mode) { @@ -8995,8 +9029,7 @@ alpha_arg_type (mode) register value. */ rtx -alpha_arg_info_reg_val (cum) - CUMULATIVE_ARGS cum; +alpha_arg_info_reg_val (CUMULATIVE_ARGS cum) { unsigned HOST_WIDE_INT regval = cum.num_args; int i; @@ -9007,26 +9040,6 @@ alpha_arg_info_reg_val (cum) return GEN_INT (regval); } -/* Protect alpha_links from garbage collection. */ - -static int -mark_alpha_links_node (node, data) - splay_tree_node node; - void *data ATTRIBUTE_UNUSED; -{ - struct alpha_links *links = (struct alpha_links *) node->value; - ggc_mark_rtx (links->linkage); - return 0; -} - -static void -mark_alpha_links (ptr) - void *ptr; -{ - splay_tree tree = *(splay_tree *) ptr; - splay_tree_foreach (tree, mark_alpha_links_node, NULL); -} - /* Make (or fake) .linkage entry for function call. IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. @@ -9034,25 +9047,23 @@ mark_alpha_links (ptr) Return an SYMBOL_REF rtx for the linkage. */ rtx -alpha_need_linkage (name, is_local) - const char *name; - int is_local; +alpha_need_linkage (const char *name, int is_local) { splay_tree_node node; struct alpha_links *al; - struct alpha_funcs *cfaf; if (name[0] == '*') name++; if (is_local) { - alpha_funcs_tree = splay_tree_new - ((splay_tree_compare_fn) splay_tree_compare_pointers, - (splay_tree_delete_key_fn) free, - (splay_tree_delete_key_fn) free); + struct alpha_funcs *cfaf; + + if (!alpha_funcs_tree) + alpha_funcs_tree = splay_tree_new_ggc ((splay_tree_compare_fn) + splay_tree_compare_pointers); - cfaf = (struct alpha_funcs *) xmalloc (sizeof (struct alpha_funcs)); + cfaf = (struct alpha_funcs *) ggc_alloc (sizeof (struct alpha_funcs)); cfaf->links = 0; cfaf->num = ++alpha_funcs_num; @@ -9060,7 +9071,6 @@ alpha_need_linkage (name, is_local) splay_tree_insert (alpha_funcs_tree, (splay_tree_key) current_function_decl, (splay_tree_value) cfaf); - } if (alpha_links_tree) @@ -9087,17 +9097,10 @@ alpha_need_linkage (name, is_local) } } else - { - alpha_links_tree = splay_tree_new - ((splay_tree_compare_fn) strcmp, - (splay_tree_delete_key_fn) free, - (splay_tree_delete_key_fn) free); + alpha_links_tree = splay_tree_new_ggc ((splay_tree_compare_fn) strcmp); - ggc_add_root (&alpha_links_tree, 1, 1, mark_alpha_links); - } - - al = (struct alpha_links *) xmalloc (sizeof (struct alpha_links)); - name = xstrdup (name); + al = (struct alpha_links *) ggc_alloc (sizeof (struct alpha_links)); + name = ggc_strdup (name); /* Assume external if no definition. */ al->lkind = (is_local ? KIND_UNUSED : KIND_EXTERN); @@ -9123,11 +9126,7 @@ alpha_need_linkage (name, is_local) } rtx -alpha_use_linkage (linkage, cfundecl, lflag, rflag) - rtx linkage; - tree cfundecl; - int lflag; - int rflag; +alpha_use_linkage (rtx linkage, tree cfundecl, int lflag, int rflag) { splay_tree_node cfunnode; struct alpha_funcs *cfaf; @@ -9151,13 +9150,7 @@ alpha_use_linkage (linkage, cfundecl, lflag, rflag) al = (struct alpha_links *) lnode->value; } else - { - cfaf->links = splay_tree_new - ((splay_tree_compare_fn) strcmp, - (splay_tree_delete_key_fn) free, - (splay_tree_delete_key_fn) free); - ggc_add_root (&cfaf->links, 1, 1, mark_alpha_links); - } + cfaf->links = splay_tree_new_ggc ((splay_tree_compare_fn) strcmp); if (!al) { @@ -9173,7 +9166,7 @@ alpha_use_linkage (linkage, cfundecl, lflag, rflag) name_len = strlen (name); - al = (struct alpha_links *) xmalloc (sizeof (struct alpha_links)); + al = (struct alpha_links *) ggc_alloc (sizeof (struct alpha_links)); al->num = cfaf->num; node = splay_tree_lookup (alpha_links_tree, (splay_tree_key) name); @@ -9207,9 +9200,7 @@ alpha_use_linkage (linkage, cfundecl, lflag, rflag) } static int -alpha_write_one_linkage (node, data) - splay_tree_node node; - void *data; +alpha_write_one_linkage (splay_tree_node node, void *data) { const char *const name = (const char *) node->key; struct alpha_links *link = (struct alpha_links *) node->value; @@ -9248,10 +9239,7 @@ alpha_write_one_linkage (node, data) } static void -alpha_write_linkage (stream, funname, fundecl) - FILE *stream; - const char *funname; - tree fundecl; +alpha_write_linkage (FILE *stream, const char *funname, tree fundecl) { splay_tree_node node; struct alpha_funcs *func; @@ -9286,10 +9274,7 @@ alpha_write_linkage (stream, funname, fundecl) #define SECTION_VMS_INITIALIZE (SECTION_VMS_GLOBAL << 1) static unsigned int -vms_section_type_flags (decl, name, reloc) - tree decl; - const char *name; - int reloc; +vms_section_type_flags (tree decl, const char *name, int reloc) { unsigned int flags = default_section_type_flags (decl, name, reloc); @@ -9311,9 +9296,7 @@ vms_section_type_flags (decl, name, reloc) the section; 0 if the default should be used. */ static void -vms_asm_named_section (name, flags) - const char *name; - unsigned int flags; +vms_asm_named_section (const char *name, unsigned int flags) { fputc ('\n', asm_out_file); fprintf (asm_out_file, ".section\t%s", name); @@ -9339,9 +9322,7 @@ vms_asm_named_section (name, flags) used by a normal pointer. */ static void -vms_asm_out_constructor (symbol, priority) - rtx symbol; - int priority ATTRIBUTE_UNUSED; +vms_asm_out_constructor (rtx symbol, int priority ATTRIBUTE_UNUSED) { ctors_section (); assemble_align (BITS_PER_WORD); @@ -9349,9 +9330,7 @@ vms_asm_out_constructor (symbol, priority) } static void -vms_asm_out_destructor (symbol, priority) - rtx symbol; - int priority ATTRIBUTE_UNUSED; +vms_asm_out_destructor (rtx symbol, int priority ATTRIBUTE_UNUSED) { dtors_section (); assemble_align (BITS_PER_WORD); @@ -9360,19 +9339,17 @@ vms_asm_out_destructor (symbol, priority) #else rtx -alpha_need_linkage (name, is_local) - const char *name ATTRIBUTE_UNUSED; - int is_local ATTRIBUTE_UNUSED; +alpha_need_linkage (const char *name ATTRIBUTE_UNUSED, + int is_local ATTRIBUTE_UNUSED) { return NULL_RTX; } rtx -alpha_use_linkage (linkage, cfundecl, lflag, rflag) - rtx linkage ATTRIBUTE_UNUSED; - tree cfundecl ATTRIBUTE_UNUSED; - int lflag ATTRIBUTE_UNUSED; - int rflag ATTRIBUTE_UNUSED; +alpha_use_linkage (rtx linkage ATTRIBUTE_UNUSED, + tree cfundecl ATTRIBUTE_UNUSED, + int lflag ATTRIBUTE_UNUSED, + int rflag ATTRIBUTE_UNUSED) { return NULL_RTX; } @@ -9381,21 +9358,11 @@ alpha_use_linkage (linkage, cfundecl, lflag, rflag) #if TARGET_ABI_UNICOSMK -static void unicosmk_output_module_name PARAMS ((FILE *)); -static void unicosmk_output_default_externs PARAMS ((FILE *)); -static void unicosmk_output_dex PARAMS ((FILE *)); -static void unicosmk_output_externs PARAMS ((FILE *)); -static void unicosmk_output_addr_vec PARAMS ((FILE *, rtx)); -static const char *unicosmk_ssib_name PARAMS ((void)); -static int unicosmk_special_name PARAMS ((const char *)); - /* Define the offset between two registers, one to be eliminated, and the other its replacement, at the start of a routine. */ int -unicosmk_initial_elimination_offset (from, to) - int from; - int to; +unicosmk_initial_elimination_offset (int from, int to) { int fixed_size; @@ -9423,112 +9390,27 @@ unicosmk_initial_elimination_offset (from, to) or '$'. */ static void -unicosmk_output_module_name (file) - FILE *file; +unicosmk_output_module_name (FILE *file) { - const char *name; - - /* Strip directories. */ - - name = strrchr (main_input_filename, '/'); - if (name) - ++name; - else - name = main_input_filename; - + const char *name = lbasename (main_input_filename); + unsigned len = strlen (name); + char *clean_name = alloca (len + 2); + char *ptr = clean_name; + /* CAM only accepts module names that start with a letter or '$'. We prefix the module name with a '$' if necessary. */ if (!ISALPHA (*name)) - putc ('$', file); - output_clean_symbol_name (file, name); -} - -/* Output text that to appear at the beginning of an assembler file. */ - -void -unicosmk_asm_file_start (file) - FILE *file; -{ - int i; - - fputs ("\t.ident\t", file); - unicosmk_output_module_name (file); - fputs ("\n\n", file); - - /* The Unicos/Mk assembler uses different register names. Instead of trying - to support them, we simply use micro definitions. */ - - /* CAM has different register names: rN for the integer register N and fN - for the floating-point register N. Instead of trying to use these in - alpha.md, we define the symbols $N and $fN to refer to the appropriate - register. */ - - for (i = 0; i < 32; ++i) - fprintf (file, "$%d <- r%d\n", i, i); - - for (i = 0; i < 32; ++i) - fprintf (file, "$f%d <- f%d\n", i, i); - - putc ('\n', file); - - /* The .align directive fill unused space with zeroes which does not work - in code sections. We define the macro 'gcc@code@align' which uses nops - instead. Note that it assumes that code sections always have the - biggest possible alignment since . refers to the current offset from - the beginning of the section. */ - - fputs ("\t.macro gcc@code@align n\n", file); - fputs ("gcc@n@bytes = 1 << n\n", file); - fputs ("gcc@here = . % gcc@n@bytes\n", file); - fputs ("\t.if ne, gcc@here, 0\n", file); - fputs ("\t.repeat (gcc@n@bytes - gcc@here) / 4\n", file); - fputs ("\tbis r31,r31,r31\n", file); - fputs ("\t.endr\n", file); - fputs ("\t.endif\n", file); - fputs ("\t.endm gcc@code@align\n\n", file); - - /* Output extern declarations which should always be visible. */ - unicosmk_output_default_externs (file); - - /* Open a dummy section. We always need to be inside a section for the - section-switching code to work correctly. - ??? This should be a module id or something like that. I still have to - figure out what the rules for those are. */ - fputs ("\n\t.psect\t$SG00000,data\n", file); -} - -/* Output text to appear at the end of an assembler file. This includes all - pending extern declarations and DEX expressions. */ - -void -unicosmk_asm_file_end (file) - FILE *file; -{ - fputs ("\t.endp\n\n", file); - - /* Output all pending externs. */ - - unicosmk_output_externs (file); - - /* Output dex definitions used for functions whose names conflict with - register names. */ - - unicosmk_output_dex (file); - - fputs ("\t.end\t", file); - unicosmk_output_module_name (file); - putc ('\n', file); + *ptr++ = '$'; + memcpy (ptr, name, len + 1); + clean_symbol_name (clean_name); + fputs (clean_name, file); } /* Output the definition of a common variable. */ void -unicosmk_output_common (file, name, size, align) - FILE *file; - const char *name; - int size; - int align; +unicosmk_output_common (FILE *file, const char *name, int size, int align) { tree name_tree; printf ("T3E__: common %s\n", name); @@ -9549,10 +9431,8 @@ unicosmk_output_common (file, name, size, align) static int current_section_align; static unsigned int -unicosmk_section_type_flags (decl, name, reloc) - tree decl; - const char *name; - int reloc ATTRIBUTE_UNUSED; +unicosmk_section_type_flags (tree decl, const char *name, + int reloc ATTRIBUTE_UNUSED) { unsigned int flags = default_section_type_flags (decl, name, reloc); @@ -9581,9 +9461,7 @@ unicosmk_section_type_flags (decl, name, reloc) declaration. */ static void -unicosmk_unique_section (decl, reloc) - tree decl; - int reloc ATTRIBUTE_UNUSED; +unicosmk_unique_section (tree decl, int reloc ATTRIBUTE_UNUSED) { const char *name; int len; @@ -9592,7 +9470,7 @@ unicosmk_unique_section (decl, reloc) abort (); name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl)); - name = alpha_strip_name_encoding (name); + name = default_strip_name_encoding (name); len = strlen (name); if (TREE_CODE (decl) == FUNCTION_DECL) @@ -9624,9 +9502,7 @@ unicosmk_unique_section (decl, reloc) the section; 0 if the default should be used. */ static void -unicosmk_asm_named_section (name, flags) - const char *name; - unsigned int flags; +unicosmk_asm_named_section (const char *name, unsigned int flags) { const char *kind; @@ -9654,9 +9530,7 @@ unicosmk_asm_named_section (name, flags) } static void -unicosmk_insert_attributes (decl, attr_ptr) - tree decl; - tree *attr_ptr ATTRIBUTE_UNUSED; +unicosmk_insert_attributes (tree decl, tree *attr_ptr ATTRIBUTE_UNUSED) { if (DECL_P (decl) && (TREE_PUBLIC (decl) || TREE_CODE (decl) == FUNCTION_DECL)) @@ -9667,9 +9541,7 @@ unicosmk_insert_attributes (decl, attr_ptr) in code sections because .align fill unused space with zeroes. */ void -unicosmk_output_align (file, align) - FILE *file; - int align; +unicosmk_output_align (FILE *file, int align) { if (inside_function) fprintf (file, "\tgcc@code@align\t%d\n", align); @@ -9682,9 +9554,7 @@ unicosmk_output_align (file, align) does not allow data definitions in code sections. */ void -unicosmk_defer_case_vector (lab, vec) - rtx lab; - rtx vec; +unicosmk_defer_case_vector (rtx lab, rtx vec) { struct machine_function *machine = cfun->machine; @@ -9696,16 +9566,14 @@ unicosmk_defer_case_vector (lab, vec) /* Output a case vector. */ static void -unicosmk_output_addr_vec (file, vec) - FILE *file; - rtx vec; +unicosmk_output_addr_vec (FILE *file, rtx vec) { rtx lab = XEXP (vec, 0); rtx body = XEXP (vec, 1); int vlen = XVECLEN (body, 0); int idx; - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (lab)); + (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (lab)); for (idx = 0; idx < vlen; idx++) { @@ -9717,8 +9585,7 @@ unicosmk_output_addr_vec (file, vec) /* Output current function's deferred case vectors. */ static void -unicosmk_output_deferred_case_vectors (file) - FILE *file; +unicosmk_output_deferred_case_vectors (FILE *file) { struct machine_function *machine = cfun->machine; rtx t; @@ -9731,13 +9598,48 @@ unicosmk_output_deferred_case_vectors (file) unicosmk_output_addr_vec (file, XEXP (t, 0)); } +/* Generate the name of the SSIB section for the current function. */ + +#define SSIB_PREFIX "__SSIB_" +#define SSIB_PREFIX_LEN 7 + +static const char * +unicosmk_ssib_name (void) +{ + /* This is ok since CAM won't be able to deal with names longer than that + anyway. */ + + static char name[256]; + + rtx x; + const char *fnname; + int len; + + x = DECL_RTL (cfun->decl); + if (GET_CODE (x) != MEM) + abort (); + x = XEXP (x, 0); + if (GET_CODE (x) != SYMBOL_REF) + abort (); + fnname = XSTR (x, 0); + + len = strlen (fnname); + if (len + SSIB_PREFIX_LEN > 255) + len = 255 - SSIB_PREFIX_LEN; + + strcpy (name, SSIB_PREFIX); + strncpy (name + SSIB_PREFIX_LEN, fnname, len); + name[len + SSIB_PREFIX_LEN] = 0; + + return name; +} + /* Set up the dynamic subprogram information block (DSIB) and update the frame pointer register ($15) for subroutines which have a frame. If the subroutine doesn't have a frame, simply increment $15. */ static void -unicosmk_gen_dsib (imaskP) - unsigned long * imaskP; +unicosmk_gen_dsib (unsigned long *imaskP) { if (alpha_procedure_type == PT_STACK) { @@ -9755,14 +9657,14 @@ unicosmk_gen_dsib (imaskP) mem = gen_rtx_MEM (DImode, plus_constant (stack_pointer_rtx, 56)); set_mem_alias_set (mem, alpha_sr_alias_set); FRP (emit_move_insn (mem, gen_rtx_REG (DImode, REG_RA))); - (*imaskP) &= ~(1L << REG_RA); + (*imaskP) &= ~(1UL << REG_RA); /* Save the old frame pointer. */ mem = gen_rtx_MEM (DImode, plus_constant (stack_pointer_rtx, 48)); set_mem_alias_set (mem, alpha_sr_alias_set); FRP (emit_move_insn (mem, hard_frame_pointer_rtx)); - (*imaskP) &= ~(1L << HARD_FRAME_POINTER_REGNUM); + (*imaskP) &= ~(1UL << HARD_FRAME_POINTER_REGNUM); emit_insn (gen_blockage ()); @@ -9800,49 +9702,11 @@ unicosmk_gen_dsib (imaskP) } } -#define SSIB_PREFIX "__SSIB_" -#define SSIB_PREFIX_LEN 7 - -/* Generate the name of the SSIB section for the current function. */ - -static const char * -unicosmk_ssib_name () -{ - /* This is ok since CAM won't be able to deal with names longer than that - anyway. */ - - static char name[256]; - - rtx x; - const char *fnname; - int len; - - x = DECL_RTL (cfun->decl); - if (GET_CODE (x) != MEM) - abort (); - x = XEXP (x, 0); - if (GET_CODE (x) != SYMBOL_REF) - abort (); - fnname = alpha_strip_name_encoding (XSTR (x, 0)); - - len = strlen (fnname); - if (len + SSIB_PREFIX_LEN > 255) - len = 255 - SSIB_PREFIX_LEN; - - strcpy (name, SSIB_PREFIX); - strncpy (name + SSIB_PREFIX_LEN, fnname, len); - name[len + SSIB_PREFIX_LEN] = 0; - - return name; -} - /* Output the static subroutine information block for the current function. */ static void -unicosmk_output_ssib (file, fnname) - FILE *file; - const char *fnname; +unicosmk_output_ssib (FILE *file, const char *fnname) { int len; int i; @@ -9889,14 +9753,12 @@ unicosmk_output_ssib (file, fnname) for (x = machine->first_ciw; x; x = XEXP (x, 1)) { ciw = XEXP (x, 0); - fprintf (file, "\t.quad\t"); #if HOST_BITS_PER_WIDE_INT == 32 - fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, + fprintf (file, "\t.quad\t" HOST_WIDE_INT_PRINT_DOUBLE_HEX "\n", CONST_DOUBLE_HIGH (ciw), CONST_DOUBLE_LOW (ciw)); #else - fprintf (file, HOST_WIDE_INT_PRINT_HEX, INTVAL (ciw)); + fprintf (file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n", INTVAL (ciw)); #endif - fprintf (file, "\n"); } } @@ -9906,8 +9768,7 @@ unicosmk_output_ssib (file, fnname) X is a CONST_INT or CONST_DOUBLE representing the CIW. */ rtx -unicosmk_add_call_info_word (x) - rtx x; +unicosmk_add_call_info_word (rtx x) { rtx node; struct machine_function *machine = cfun->machine; @@ -9922,13 +9783,13 @@ unicosmk_add_call_info_word (x) ++machine->ciw_count; return GEN_INT (machine->ciw_count - + strlen (current_function_name)/8 + 5); + + strlen (current_function_name ())/8 + 5); } static char unicosmk_section_buf[100]; char * -unicosmk_text_section () +unicosmk_text_section (void) { static int count = 0; sprintf (unicosmk_section_buf, "\t.endp\n\n\t.psect\tgcc@text___%d,code", @@ -9937,7 +9798,7 @@ unicosmk_text_section () } char * -unicosmk_data_section () +unicosmk_data_section (void) { static int count = 1; sprintf (unicosmk_section_buf, "\t.endp\n\n\t.psect\tgcc@data___%d,data", @@ -9953,6 +9814,7 @@ unicosmk_data_section () /* List of identifiers for which an extern declaration might have to be emitted. */ +/* FIXME: needs to use GC, so it can be saved and restored for PCH. */ struct unicosmk_extern_list { @@ -9965,8 +9827,7 @@ static struct unicosmk_extern_list *unicosmk_extern_head = 0; /* Output extern declarations which are required for every asm file. */ static void -unicosmk_output_default_externs (file) - FILE *file; +unicosmk_output_default_externs (FILE *file) { static const char *const externs[] = { "__T3E_MISMATCH" }; @@ -9984,8 +9845,7 @@ unicosmk_output_default_externs (file) referenced but not defined. */ static void -unicosmk_output_externs (file) - FILE *file; +unicosmk_output_externs (FILE *file) { struct unicosmk_extern_list *p; const char *real_name; @@ -9998,7 +9858,7 @@ unicosmk_output_externs (file) /* We have to strip the encoding and possibly remove user_label_prefix from the identifier in order to handle -fleading-underscore and explicit asm names correctly (cf. gcc.dg/asm-names-1.c). */ - real_name = alpha_strip_name_encoding (p->name); + real_name = default_strip_name_encoding (p->name); if (len && p->name[0] == '*' && !memcmp (real_name, user_label_prefix, len)) real_name += len; @@ -10017,8 +9877,7 @@ unicosmk_output_externs (file) /* Record an extern. */ void -unicosmk_add_extern (name) - const char *name; +unicosmk_add_extern (const char *name) { struct unicosmk_extern_list *p; @@ -10035,6 +9894,7 @@ unicosmk_add_extern (name) /* Structure to collect identifiers which have been replaced by DEX expressions. */ +/* FIXME: needs to use GC, so it can be saved and restored for PCH. */ struct unicosmk_dex { struct unicosmk_dex *next; @@ -10053,8 +9913,7 @@ static int unicosmk_dex_count = 0; /* Check if NAME must be replaced by a DEX expression. */ static int -unicosmk_special_name (name) - const char *name; +unicosmk_special_name (const char *name) { if (name[0] == '*') ++name; @@ -10083,8 +9942,7 @@ unicosmk_special_name (name) otherwise. */ static int -unicosmk_need_dex (x) - rtx x; +unicosmk_need_dex (rtx x) { struct unicosmk_dex *dex; const char *name; @@ -10117,8 +9975,7 @@ unicosmk_need_dex (x) /* Output the DEX definitions for this file. */ static void -unicosmk_output_dex (file) - FILE *file; +unicosmk_output_dex (FILE *file) { struct unicosmk_dex *dex; int i; @@ -10140,39 +9997,264 @@ unicosmk_output_dex (file) fprintf (file, "\t.dexend\n"); } +/* Output text that to appear at the beginning of an assembler file. */ + +static void +unicosmk_file_start (void) +{ + int i; + + fputs ("\t.ident\t", asm_out_file); + unicosmk_output_module_name (asm_out_file); + fputs ("\n\n", asm_out_file); + + /* The Unicos/Mk assembler uses different register names. Instead of trying + to support them, we simply use micro definitions. */ + + /* CAM has different register names: rN for the integer register N and fN + for the floating-point register N. Instead of trying to use these in + alpha.md, we define the symbols $N and $fN to refer to the appropriate + register. */ + + for (i = 0; i < 32; ++i) + fprintf (asm_out_file, "$%d <- r%d\n", i, i); + + for (i = 0; i < 32; ++i) + fprintf (asm_out_file, "$f%d <- f%d\n", i, i); + + putc ('\n', asm_out_file); + + /* The .align directive fill unused space with zeroes which does not work + in code sections. We define the macro 'gcc@code@align' which uses nops + instead. Note that it assumes that code sections always have the + biggest possible alignment since . refers to the current offset from + the beginning of the section. */ + + fputs ("\t.macro gcc@code@align n\n", asm_out_file); + fputs ("gcc@n@bytes = 1 << n\n", asm_out_file); + fputs ("gcc@here = . % gcc@n@bytes\n", asm_out_file); + fputs ("\t.if ne, gcc@here, 0\n", asm_out_file); + fputs ("\t.repeat (gcc@n@bytes - gcc@here) / 4\n", asm_out_file); + fputs ("\tbis r31,r31,r31\n", asm_out_file); + fputs ("\t.endr\n", asm_out_file); + fputs ("\t.endif\n", asm_out_file); + fputs ("\t.endm gcc@code@align\n\n", asm_out_file); + + /* Output extern declarations which should always be visible. */ + unicosmk_output_default_externs (asm_out_file); + + /* Open a dummy section. We always need to be inside a section for the + section-switching code to work correctly. + ??? This should be a module id or something like that. I still have to + figure out what the rules for those are. */ + fputs ("\n\t.psect\t$SG00000,data\n", asm_out_file); +} + +/* Output text to appear at the end of an assembler file. This includes all + pending extern declarations and DEX expressions. */ + +static void +unicosmk_file_end (void) +{ + fputs ("\t.endp\n\n", asm_out_file); + + /* Output all pending externs. */ + + unicosmk_output_externs (asm_out_file); + + /* Output dex definitions used for functions whose names conflict with + register names. */ + + unicosmk_output_dex (asm_out_file); + + fputs ("\t.end\t", asm_out_file); + unicosmk_output_module_name (asm_out_file); + putc ('\n', asm_out_file); +} + #else static void -unicosmk_output_deferred_case_vectors (file) - FILE *file ATTRIBUTE_UNUSED; +unicosmk_output_deferred_case_vectors (FILE *file ATTRIBUTE_UNUSED) {} static void -unicosmk_gen_dsib (imaskP) - unsigned long * imaskP ATTRIBUTE_UNUSED; +unicosmk_gen_dsib (unsigned long *imaskP ATTRIBUTE_UNUSED) {} static void -unicosmk_output_ssib (file, fnname) - FILE * file ATTRIBUTE_UNUSED; - const char * fnname ATTRIBUTE_UNUSED; +unicosmk_output_ssib (FILE * file ATTRIBUTE_UNUSED, + const char * fnname ATTRIBUTE_UNUSED) {} rtx -unicosmk_add_call_info_word (x) - rtx x ATTRIBUTE_UNUSED; +unicosmk_add_call_info_word (rtx x ATTRIBUTE_UNUSED) { return NULL_RTX; } static int -unicosmk_need_dex (x) - rtx x ATTRIBUTE_UNUSED; +unicosmk_need_dex (rtx x ATTRIBUTE_UNUSED) { return 0; } #endif /* TARGET_ABI_UNICOSMK */ +static void +alpha_init_libfuncs (void) +{ + if (TARGET_ABI_UNICOSMK) + { + /* Prevent gcc from generating calls to __divsi3. */ + set_optab_libfunc (sdiv_optab, SImode, 0); + set_optab_libfunc (udiv_optab, SImode, 0); + + /* Use the functions provided by the system library + for DImode integer division. */ + set_optab_libfunc (sdiv_optab, DImode, "$sldiv"); + set_optab_libfunc (udiv_optab, DImode, "$uldiv"); + } + else if (TARGET_ABI_OPEN_VMS) + { + /* Use the VMS runtime library functions for division and + remainder. */ + set_optab_libfunc (sdiv_optab, SImode, "OTS$DIV_I"); + set_optab_libfunc (sdiv_optab, DImode, "OTS$DIV_L"); + set_optab_libfunc (udiv_optab, SImode, "OTS$DIV_UI"); + set_optab_libfunc (udiv_optab, DImode, "OTS$DIV_UL"); + set_optab_libfunc (smod_optab, SImode, "OTS$REM_I"); + set_optab_libfunc (smod_optab, DImode, "OTS$REM_L"); + set_optab_libfunc (umod_optab, SImode, "OTS$REM_UI"); + set_optab_libfunc (umod_optab, DImode, "OTS$REM_UL"); + } +} + + +/* Initialize the GCC target structure. */ +#if TARGET_ABI_OPEN_VMS +# undef TARGET_ATTRIBUTE_TABLE +# define TARGET_ATTRIBUTE_TABLE vms_attribute_table +# undef TARGET_SECTION_TYPE_FLAGS +# define TARGET_SECTION_TYPE_FLAGS vms_section_type_flags +#endif + +#undef TARGET_IN_SMALL_DATA_P +#define TARGET_IN_SMALL_DATA_P alpha_in_small_data_p + +#if TARGET_ABI_UNICOSMK +# undef TARGET_INSERT_ATTRIBUTES +# define TARGET_INSERT_ATTRIBUTES unicosmk_insert_attributes +# undef TARGET_SECTION_TYPE_FLAGS +# define TARGET_SECTION_TYPE_FLAGS unicosmk_section_type_flags +# undef TARGET_ASM_UNIQUE_SECTION +# define TARGET_ASM_UNIQUE_SECTION unicosmk_unique_section +# undef TARGET_ASM_GLOBALIZE_LABEL +# define TARGET_ASM_GLOBALIZE_LABEL hook_void_FILEptr_constcharptr +#endif + +#undef TARGET_ASM_ALIGNED_HI_OP +#define TARGET_ASM_ALIGNED_HI_OP "\t.word\t" +#undef TARGET_ASM_ALIGNED_DI_OP +#define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t" + +/* Default unaligned ops are provided for ELF systems. To get unaligned + data for non-ELF systems, we have to turn off auto alignment. */ +#ifndef OBJECT_FORMAT_ELF +#undef TARGET_ASM_UNALIGNED_HI_OP +#define TARGET_ASM_UNALIGNED_HI_OP "\t.align 0\n\t.word\t" +#undef TARGET_ASM_UNALIGNED_SI_OP +#define TARGET_ASM_UNALIGNED_SI_OP "\t.align 0\n\t.long\t" +#undef TARGET_ASM_UNALIGNED_DI_OP +#define TARGET_ASM_UNALIGNED_DI_OP "\t.align 0\n\t.quad\t" +#endif + +#ifdef OBJECT_FORMAT_ELF +#undef TARGET_ASM_SELECT_RTX_SECTION +#define TARGET_ASM_SELECT_RTX_SECTION alpha_elf_select_rtx_section +#endif + +#undef TARGET_ASM_FUNCTION_END_PROLOGUE +#define TARGET_ASM_FUNCTION_END_PROLOGUE alpha_output_function_end_prologue + +#undef TARGET_INIT_LIBFUNCS +#define TARGET_INIT_LIBFUNCS alpha_init_libfuncs + +#if TARGET_ABI_UNICOSMK +#undef TARGET_ASM_FILE_START +#define TARGET_ASM_FILE_START unicosmk_file_start +#undef TARGET_ASM_FILE_END +#define TARGET_ASM_FILE_END unicosmk_file_end +#else +#undef TARGET_ASM_FILE_START +#define TARGET_ASM_FILE_START alpha_file_start +#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE +#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true +#endif + +#undef TARGET_SCHED_ADJUST_COST +#define TARGET_SCHED_ADJUST_COST alpha_adjust_cost +#undef TARGET_SCHED_ISSUE_RATE +#define TARGET_SCHED_ISSUE_RATE alpha_issue_rate +#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE +#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE \ + alpha_use_dfa_pipeline_interface +#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD +#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \ + alpha_multipass_dfa_lookahead + +#undef TARGET_HAVE_TLS +#define TARGET_HAVE_TLS HAVE_AS_TLS + +#undef TARGET_INIT_BUILTINS +#define TARGET_INIT_BUILTINS alpha_init_builtins +#undef TARGET_EXPAND_BUILTIN +#define TARGET_EXPAND_BUILTIN alpha_expand_builtin + +#undef TARGET_FUNCTION_OK_FOR_SIBCALL +#define TARGET_FUNCTION_OK_FOR_SIBCALL alpha_function_ok_for_sibcall +#undef TARGET_CANNOT_COPY_INSN_P +#define TARGET_CANNOT_COPY_INSN_P alpha_cannot_copy_insn_p + +#if TARGET_ABI_OSF +#undef TARGET_ASM_OUTPUT_MI_THUNK +#define TARGET_ASM_OUTPUT_MI_THUNK alpha_output_mi_thunk_osf +#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK +#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true +#endif + +#undef TARGET_RTX_COSTS +#define TARGET_RTX_COSTS alpha_rtx_costs +#undef TARGET_ADDRESS_COST +#define TARGET_ADDRESS_COST hook_int_rtx_0 + +#undef TARGET_MACHINE_DEPENDENT_REORG +#define TARGET_MACHINE_DEPENDENT_REORG alpha_reorg + +#undef TARGET_PROMOTE_FUNCTION_ARGS +#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true +#undef TARGET_PROMOTE_FUNCTION_RETURN +#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true +#undef TARGET_PROMOTE_PROTOTYPES +#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_false +#undef TARGET_STRUCT_VALUE_RTX +#define TARGET_STRUCT_VALUE_RTX hook_rtx_tree_int_null +#undef TARGET_RETURN_IN_MEMORY +#define TARGET_RETURN_IN_MEMORY alpha_return_in_memory +#undef TARGET_SETUP_INCOMING_VARARGS +#define TARGET_SETUP_INCOMING_VARARGS alpha_setup_incoming_varargs +#undef TARGET_STRICT_ARGUMENT_NAMING +#define TARGET_STRICT_ARGUMENT_NAMING hook_bool_CUMULATIVE_ARGS_true +#undef TARGET_PRETEND_OUTGOING_VARARGS_NAMED +#define TARGET_PRETEND_OUTGOING_VARARGS_NAMED hook_bool_CUMULATIVE_ARGS_true +#undef TARGET_SPLIT_COMPLEX_ARG +#define TARGET_SPLIT_COMPLEX_ARG alpha_split_complex_arg + +#undef TARGET_BUILD_BUILTIN_VA_LIST +#define TARGET_BUILD_BUILTIN_VA_LIST alpha_build_builtin_va_list + +struct gcc_target targetm = TARGET_INITIALIZER; + + #include "gt-alpha.h" diff --git a/contrib/gcc/config/alpha/alpha.h b/contrib/gcc/config/alpha/alpha.h index 6b52700..d59797c 100644 --- a/contrib/gcc/config/alpha/alpha.h +++ b/contrib/gcc/config/alpha/alpha.h @@ -1,22 +1,22 @@ /* Definitions of target machine for GNU compiler, for DEC Alpha. Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002 Free Software Foundation, Inc. + 2000, 2001, 2002, 2004 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -67,6 +67,8 @@ Boston, MA 02111-1307, USA. */ builtin_define ("_IEEE_FP"); \ if (TARGET_IEEE_WITH_INEXACT) \ builtin_define ("_IEEE_FP_INEXACT"); \ + if (TARGET_LONG_DOUBLE_128) \ + builtin_define ("__LONG_DOUBLE_128__"); \ \ /* Macros dependent on the C dialect. */ \ SUBTARGET_LANGUAGE_CPP_BUILTINS(); \ @@ -78,14 +80,14 @@ Boston, MA 02111-1307, USA. */ { \ if (preprocessing_asm_p ()) \ builtin_define_std ("LANGUAGE_ASSEMBLY"); \ - else if (c_language == clk_c) \ - builtin_define_std ("LANGUAGE_C"); \ - else if (c_language == clk_cplusplus) \ + else if (c_dialect_cxx ()) \ { \ builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \ builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \ } \ - if (flag_objc) \ + else \ + builtin_define_std ("LANGUAGE_C"); \ + if (c_dialect_objc ()) \ { \ builtin_define ("__LANGUAGE_OBJECTIVE_C"); \ builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \ @@ -112,9 +114,12 @@ Boston, MA 02111-1307, USA. */ mirrors this list, so changes to alpha.md must be made at the same time. */ enum processor_type - {PROCESSOR_EV4, /* 2106[46]{a,} */ +{ + PROCESSOR_EV4, /* 2106[46]{a,} */ PROCESSOR_EV5, /* 21164{a,pc,} */ - PROCESSOR_EV6}; /* 21264 */ + PROCESSOR_EV6, /* 21264 */ + PROCESSOR_MAX +}; extern enum processor_type alpha_cpu; @@ -222,6 +227,15 @@ extern int alpha_tls_size; #define MASK_TLS_KERNEL (1 << 14) #define TARGET_TLS_KERNEL (target_flags & MASK_TLS_KERNEL) +/* This means use direct branches to local functions. */ +#define MASK_SMALL_TEXT (1 << 15) +#define TARGET_SMALL_TEXT (target_flags & MASK_SMALL_TEXT) + +/* This means use IEEE quad-format for long double. Assumes the + presence of the GEM support library routines. */ +#define MASK_LONG_DOUBLE_128 (1 << 16) +#define TARGET_LONG_DOUBLE_128 (target_flags & MASK_LONG_DOUBLE_128) + /* This means that the processor is an EV5, EV56, or PCA56. Unlike alpha_cpu this is not affected by -mtune= setting. */ #define MASK_CPU_EV5 (1 << 28) @@ -254,7 +268,7 @@ extern int alpha_tls_size; #define TARGET_CAN_FAULT_IN_PROLOGUE 0 #endif #ifndef TARGET_HAS_XFLOATING_LIBS -#define TARGET_HAS_XFLOATING_LIBS 0 +#define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128 #endif #ifndef TARGET_PROFILING_NEEDS_GP #define TARGET_PROFILING_NEEDS_GP 0 @@ -310,8 +324,15 @@ extern int alpha_tls_size; N_("Emit 16-bit relocations to the small data areas")}, \ {"large-data", -MASK_SMALL_DATA, \ N_("Emit 32-bit relocations to the small data areas")}, \ + {"small-text", MASK_SMALL_TEXT, \ + N_("Emit direct branches to local functions")}, \ + {"large-text", -MASK_SMALL_TEXT, ""}, \ {"tls-kernel", MASK_TLS_KERNEL, \ N_("Emit rdval instead of rduniq for thread pointer")}, \ + {"long-double-128", MASK_LONG_DOUBLE_128, \ + N_("Use 128-bit long double")}, \ + {"long-double-64", -MASK_LONG_DOUBLE_128, \ + N_("Use 64-bit long double")}, \ {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT \ | TARGET_DEFAULT_EXPLICIT_RELOCS, ""} } @@ -340,27 +361,34 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ #define TARGET_OPTIONS \ { \ {"cpu=", &alpha_cpu_string, \ - N_("Use features of and schedule given CPU")}, \ + N_("Use features of and schedule given CPU"), 0}, \ {"tune=", &alpha_tune_string, \ - N_("Schedule given CPU")}, \ + N_("Schedule given CPU"), 0}, \ {"fp-rounding-mode=", &alpha_fprm_string, \ - N_("Control the generated fp rounding mode")}, \ + N_("Control the generated fp rounding mode"), 0}, \ {"fp-trap-mode=", &alpha_fptm_string, \ - N_("Control the IEEE trap mode")}, \ + N_("Control the IEEE trap mode"), 0}, \ {"trap-precision=", &alpha_tp_string, \ - N_("Control the precision given to fp exceptions")}, \ + N_("Control the precision given to fp exceptions"), 0}, \ {"memory-latency=", &alpha_mlat_string, \ - N_("Tune expected memory latency")}, \ + N_("Tune expected memory latency"), 0}, \ {"tls-size=", &alpha_tls_size_string, \ - N_("Specify bit size of immediate TLS offsets")}, \ + N_("Specify bit size of immediate TLS offsets"), 0}, \ } +/* Support for a compile-time default CPU, et cetera. The rules are: + --with-cpu is ignored if -mcpu is specified. + --with-tune is ignored if -mtune is specified. */ +#define OPTION_DEFAULT_SPECS \ + {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \ + {"tune", "%{!mtune=*:-mtune=%(VALUE)}" } + /* This macro defines names of additional specifications to put in the specs that can be used in various specifications like CC1_SPEC. Its definition is an initializer with a subgrouping for each command option. Each subgrouping contains a string constant, that defines the - specification name, and a string constant that used by the GNU CC driver + specification name, and a string constant that used by the GCC driver program. Do not define this macro if it does not need to do anything. */ @@ -421,7 +449,18 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ #define FLOAT_TYPE_SIZE 32 #define DOUBLE_TYPE_SIZE 64 -#define LONG_DOUBLE_TYPE_SIZE 64 +#define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64) + +/* Define this to set long double type size to use in libgcc2.c, which can + not depend on target_flags. */ +#ifdef __LONG_DOUBLE_128__ +#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128 +#else +#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 +#endif + +/* Work around target_flags dependency in ada/targtyps.c. */ +#define WIDEST_HARDWARE_FP_SIZE 64 #define WCHAR_TYPE "unsigned int" #define WCHAR_TYPE_SIZE 32 @@ -444,15 +483,6 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ (MODE) = DImode; \ } -/* Define this if function arguments should also be promoted using the above - procedure. */ - -#define PROMOTE_FUNCTION_ARGS - -/* Likewise, if the function return value is promoted. */ - -#define PROMOTE_FUNCTION_RETURN - /* Define this if most significant bit is lowest numbered in instructions that operate on numbered bit-fields. @@ -482,7 +512,7 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ #define PARM_BOUNDARY 64 /* Boundary (in *bits*) on which stack pointer should be aligned. */ -#define STACK_BOUNDARY 64 +#define STACK_BOUNDARY 128 /* Allocation boundary (in *bits*) for the code of a function. */ #define FUNCTION_BOUNDARY 32 @@ -571,44 +601,30 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } /* List the order in which to allocate registers. Each register must be - listed once, even those in FIXED_REGISTERS. - - We allocate in the following order: - $f10-$f15 (nonsaved floating-point register) - $f22-$f30 (likewise) - $f21-$f16 (likewise, but input args) - $f0 (nonsaved, but return value) - $f1 (nonsaved, but immediate before saved) - $f2-$f9 (saved floating-point registers) - $1-$8 (nonsaved integer registers) - $22-$25 (likewise) - $28 (likewise) - $0 (likewise, but return value) - $21-$16 (likewise, but input args) - $27 (procedure value in OSF, nonsaved in NT) - $9-$14 (saved integer registers) - $26 (return PC) - $15 (frame pointer) - $29 (global pointer) - $30, $31, $f31 (stack pointer and always zero/ap & fp) */ - -#define REG_ALLOC_ORDER \ - {42, 43, 44, 45, 46, 47, \ - 54, 55, 56, 57, 58, 59, 60, 61, 62, \ - 53, 52, 51, 50, 49, 48, \ - 32, 33, \ - 34, 35, 36, 37, 38, 39, 40, 41, \ - 1, 2, 3, 4, 5, 6, 7, 8, \ - 22, 23, 24, 25, \ - 28, \ - 0, \ - 21, 20, 19, 18, 17, 16, \ - 27, \ - 9, 10, 11, 12, 13, 14, \ - 26, \ - 15, \ - 29, \ - 30, 31, 63 } + listed once, even those in FIXED_REGISTERS. */ + +#define REG_ALLOC_ORDER { \ + 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \ + 22, 23, 24, 25, 28, /* likewise */ \ + 0, /* likewise, but return value */ \ + 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \ + 27, /* likewise, but OSF procedure value */ \ + \ + 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \ + 54, 55, 56, 57, 58, 59, /* likewise */ \ + 60, 61, 62, /* likewise */ \ + 32, 33, /* likewise, but return values */ \ + 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \ + \ + 9, 10, 11, 12, 13, 14, /* saved integer registers */ \ + 26, /* return address */ \ + 15, /* hard frame pointer */ \ + \ + 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \ + 40, 41, /* likewise */ \ + \ + 29, 30, 31, 63 /* gp, sp, ap, sfp */ \ +} /* Return number of consecutive hard regs needed starting at reg REGNO to hold something of mode MODE. @@ -620,12 +636,11 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. On Alpha, the integer registers can hold any mode. The floating-point - registers can hold 32-bit and 64-bit integers as well, but not 16-bit - or 8-bit values. */ + registers can hold 64-bit integers as well, but not smaller values. */ #define HARD_REGNO_MODE_OK(REGNO, MODE) \ ((REGNO) >= 32 && (REGNO) <= 62 \ - ? GET_MODE_UNIT_SIZE (MODE) == 8 || GET_MODE_UNIT_SIZE (MODE) == 4 \ + ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \ : 1) /* Value is 1 if MODE is a supported vector mode. */ @@ -686,11 +701,6 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ current_file functions. Moreover, we do not expose the ldgp until after reload, so we're probably safe. */ /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */ - -/* Register in which address to store a structure value - arrives in the function. On the Alpha, the address is passed - as a hidden argument. */ -#define STRUCT_VALUE 0 /* Define the classes of registers for register constraints in the machine description. Also define ranges of constants. @@ -810,7 +820,7 @@ enum reg_class { 'U' is a symbolic operand. - 'W' is a vector zero. */ + 'W' is a vector zero. */ #define EXTRA_CONSTRAINT alpha_extra_constraint @@ -953,19 +963,8 @@ extern int alpha_memory_latency; /* Define the offset between two registers, one to be eliminated, and the other its replacement, at the start of a routine. */ -#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ -{ if ((FROM) == FRAME_POINTER_REGNUM) \ - (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ - + alpha_sa_size ()); \ - else if ((FROM) == ARG_POINTER_REGNUM) \ - (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ - + alpha_sa_size () \ - + (ALPHA_ROUND (get_frame_size () \ - + current_function_pretend_args_size) \ - - current_function_pretend_args_size)); \ - else \ - abort (); \ -} +#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ + ((OFFSET) = alpha_initial_elimination_offset(FROM, TO)) /* Define this if stack space is still allocated for a parameter passed in a register. */ @@ -988,37 +987,14 @@ extern int alpha_memory_latency; On Alpha the value is found in $0 for integer functions and $f0 for floating-point functions. */ -#define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \ - && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ - || POINTER_TYPE_P (VALTYPE)) \ - ? word_mode : TYPE_MODE (VALTYPE), \ - ((TARGET_FPREGS \ - && (TREE_CODE (VALTYPE) == REAL_TYPE \ - || TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \ - ? 32 : 0)) +#define FUNCTION_VALUE(VALTYPE, FUNC) \ + function_value (VALTYPE, FUNC, VOIDmode) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) \ - gen_rtx_REG (MODE, \ - (TARGET_FPREGS \ - && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ - || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ - ? 32 : 0)) - -/* The definition of this macro implies that there are cases where - a scalar value cannot be returned in registers. - - For the Alpha, any structure or union type is returned in memory, as - are integers whose size is larger than 64 bits. */ - -#define RETURN_IN_MEMORY(TYPE) \ - (TYPE_MODE (TYPE) == BLKmode \ - || TYPE_MODE (TYPE) == TFmode \ - || TYPE_MODE (TYPE) == TCmode \ - || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64)) +#define LIBCALL_VALUE(MODE) \ + function_value (NULL, NULL, MODE) /* 1 if N is a possible register number for a function value as seen by the caller. */ @@ -1048,7 +1024,8 @@ extern int alpha_memory_latency; for a call to a function whose data type is FNTYPE. For a library call, FNTYPE is 0. */ -#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) (CUM) = 0 +#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ + (CUM) = 0 /* Define intermediate macro to compute the size (in registers) of an argument for the Alpha. */ @@ -1096,13 +1073,6 @@ extern int alpha_memory_latency; #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ ((MODE) == TFmode || (MODE) == TCmode) -/* Specify the padding direction of arguments. - - On the Alpha, we must pad upwards in order to be able to pass args in - registers. */ - -#define FUNCTION_ARG_PADDING(MODE, TYPE) upward - /* For an arg passed partly in registers and partly in memory, this is the number of registers used. For args passed entirely in registers or entirely in memory, zero. */ @@ -1111,68 +1081,6 @@ extern int alpha_memory_latency; ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \ ? 6 - (CUM) : 0) -/* Perform any needed actions needed for a function that is receiving a - variable number of arguments. - - CUM is as above. - - MODE and TYPE are the mode and type of the current parameter. - - PRETEND_SIZE is a variable that should be set to the amount of stack - that must be pushed by the prolog to pretend that our caller pushed - it. - - Normally, this macro will push all remaining incoming registers on the - stack and set PRETEND_SIZE to the length of the registers pushed. - - On the Alpha, we allocate space for all 12 arg registers, but only - push those that are remaining. - - However, if NO registers need to be saved, don't allocate any space. - This is not only because we won't need the space, but because AP includes - the current_pretend_args_size and we don't want to mess up any - ap-relative addresses already made. - - If we are not to use the floating-point registers, save the integer - registers where we would put the floating-point registers. This is - not the most efficient way to implement varargs with just one register - class, but it isn't worth doing anything more efficient in this rare - case. */ - -#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ -{ if ((CUM) < 6) \ - { \ - if (! (NO_RTL)) \ - { \ - rtx tmp; int set = get_varargs_alias_set (); \ - tmp = gen_rtx_MEM (BLKmode, \ - plus_constant (virtual_incoming_args_rtx, \ - ((CUM) + 6)* UNITS_PER_WORD)); \ - set_mem_alias_set (tmp, set); \ - move_block_from_reg \ - (16 + CUM, tmp, \ - 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ - \ - tmp = gen_rtx_MEM (BLKmode, \ - plus_constant (virtual_incoming_args_rtx, \ - (CUM) * UNITS_PER_WORD)); \ - set_mem_alias_set (tmp, set); \ - move_block_from_reg \ - (16 + (TARGET_FPREGS ? 32 : 0) + CUM, tmp, \ - 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ - } \ - PRETEND_SIZE = 12 * UNITS_PER_WORD; \ - } \ -} - -/* We do not allow indirect calls to be optimized into sibling calls, nor - can we allow a call to a function in a different compilation unit to - be optimized into a sibcall. */ -#define FUNCTION_OK_FOR_SIBCALL(DECL) \ - (DECL \ - && (! TREE_PUBLIC (DECL) \ - || (TREE_ASM_WRITTEN (DECL) && (*targetm.binds_local_p) (DECL)))) - /* Try to output insns to set TARGET equal to the constant C if it can be done in less than N insns. Do all computations in MODE. Returns the place where the output has been placed if it can be done and the insns have been @@ -1212,6 +1120,10 @@ extern struct alpha_compare alpha_compare; #define PROFILE_BEFORE_PROLOGUE 1 +/* Never use profile counters. */ + +#define NO_PROFILE_COUNTERS 1 + /* Output assembler code to FILE to increment profiler label # LABELNO for profiling a function entry. Under OSF/1, profiling is enabled by simply passing -pg to the assembler and linker. */ @@ -1287,12 +1199,6 @@ do { \ /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT 0 */ -/* #define HAVE_POST_DECREMENT 0 */ - -/* #define HAVE_PRE_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT 0 */ - /* Macros to check register numbers against specific register classes. */ /* These assume that REGNO is a hard or pseudo reg number. @@ -1417,14 +1323,6 @@ do { \ #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ { if (GET_CODE (ADDR) == AND) goto LABEL; } - -/* Compute the cost of an address. For the Alpha, all valid addresses are - the same cost. */ - -#define ADDRESS_COST(X) 0 - -/* Machine-dependent reorg pass. */ -#define MACHINE_DEPENDENT_REORG(X) alpha_reorg(X) /* Specify the machine mode that this machine uses for the index in the tablejump instruction. */ @@ -1443,14 +1341,6 @@ do { \ /* Define this as 1 if `char' should by default be signed; else as 0. */ #define DEFAULT_SIGNED_CHAR 1 -/* This flag, if defined, says the same insns that convert to a signed fixnum - also convert validly to an unsigned one. - - We actually lie a bit here as overflow conditions are different. But - they aren't being checked anyway. */ - -#define FIXUNS_TRUNC_LIKE_FIX_TRUNC - /* Max number of bytes we can move to or from memory in one reasonably fast instruction. */ @@ -1494,10 +1384,9 @@ do { \ is done just by pretending it is already truncated. */ #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 -/* We assume that the store-condition-codes instructions store 0 for false - and some other value for true. This is the value stored for true. */ - -#define STORE_FLAG_VALUE 1 +/* The CIX ctlz and cttz instructions return 64 for zero. */ +#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX) +#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX) /* Define the value returned by a floating-point comparison instruction. */ @@ -1548,162 +1437,6 @@ do { \ /* Define this to be nonzero if shift instructions ignore all but the low-order few bits. */ #define SHIFT_COUNT_TRUNCATED 1 - -/* Compute the cost of computing a constant rtl expression RTX - whose rtx-code is CODE. The body of this macro is a portion - of a switch statement. If the code is computed here, - return it with a return statement. Otherwise, break from the switch. - - If this is an 8-bit constant, return zero since it can be used - nearly anywhere with no cost. If it is a valid operand for an - ADD or AND, likewise return 0 if we know it will be used in that - context. Otherwise, return 2 since it might be used there later. - All other constants take at least two insns. */ - -#define CONST_COSTS(RTX,CODE,OUTER_CODE) \ - case CONST_INT: \ - if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \ - return 0; \ - case CONST_DOUBLE: \ - if ((RTX) == CONST0_RTX (GET_MODE (RTX))) \ - return 0; \ - else if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \ - || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \ - return 0; \ - else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \ - return 2; \ - else \ - return COSTS_N_INSNS (2); \ - case CONST: \ - case SYMBOL_REF: \ - case LABEL_REF: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - return COSTS_N_INSNS (3); \ - case PROCESSOR_EV5: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (2); \ - default: abort(); \ - } - -/* Provide the costs of a rtl expression. This is in the body of a - switch on CODE. */ - -#define RTX_COSTS(X,CODE,OUTER_CODE) \ - case PLUS: case MINUS: \ - if (FLOAT_MODE_P (GET_MODE (X))) \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - return COSTS_N_INSNS (6); \ - case PROCESSOR_EV5: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (4); \ - default: abort(); \ - } \ - else if (GET_CODE (XEXP (X, 0)) == MULT \ - && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \ - return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \ - + rtx_cost (XEXP (X, 1), OUTER_CODE)); \ - break; \ - case MULT: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - if (FLOAT_MODE_P (GET_MODE (X))) \ - return COSTS_N_INSNS (6); \ - return COSTS_N_INSNS (23); \ - case PROCESSOR_EV5: \ - if (FLOAT_MODE_P (GET_MODE (X))) \ - return COSTS_N_INSNS (4); \ - else if (GET_MODE (X) == DImode) \ - return COSTS_N_INSNS (12); \ - else \ - return COSTS_N_INSNS (8); \ - case PROCESSOR_EV6: \ - if (FLOAT_MODE_P (GET_MODE (X))) \ - return COSTS_N_INSNS (4); \ - else \ - return COSTS_N_INSNS (7); \ - default: abort(); \ - } \ - case ASHIFT: \ - if (GET_CODE (XEXP (X, 1)) == CONST_INT \ - && INTVAL (XEXP (X, 1)) <= 3) \ - break; \ - /* ... fall through ... */ \ - case ASHIFTRT: case LSHIFTRT: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - return COSTS_N_INSNS (2); \ - case PROCESSOR_EV5: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (1); \ - default: abort(); \ - } \ - case IF_THEN_ELSE: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (2); \ - case PROCESSOR_EV5: \ - return COSTS_N_INSNS (1); \ - default: abort(); \ - } \ - case DIV: case UDIV: case MOD: case UMOD: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - if (GET_MODE (X) == SFmode) \ - return COSTS_N_INSNS (34); \ - else if (GET_MODE (X) == DFmode) \ - return COSTS_N_INSNS (63); \ - else \ - return COSTS_N_INSNS (70); \ - case PROCESSOR_EV5: \ - if (GET_MODE (X) == SFmode) \ - return COSTS_N_INSNS (15); \ - else if (GET_MODE (X) == DFmode) \ - return COSTS_N_INSNS (22); \ - else \ - return COSTS_N_INSNS (70); /* ??? */ \ - case PROCESSOR_EV6: \ - if (GET_MODE (X) == SFmode) \ - return COSTS_N_INSNS (12); \ - else if (GET_MODE (X) == DFmode) \ - return COSTS_N_INSNS (15); \ - else \ - return COSTS_N_INSNS (70); /* ??? */ \ - default: abort(); \ - } \ - case MEM: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (3); \ - case PROCESSOR_EV5: \ - return COSTS_N_INSNS (2); \ - default: abort(); \ - } \ - case NEG: case ABS: \ - if (! FLOAT_MODE_P (GET_MODE (X))) \ - break; \ - /* ... fall through ... */ \ - case FLOAT: case UNSIGNED_FLOAT: case FIX: case UNSIGNED_FIX: \ - case FLOAT_EXTEND: case FLOAT_TRUNCATE: \ - switch (alpha_cpu) \ - { \ - case PROCESSOR_EV4: \ - return COSTS_N_INSNS (6); \ - case PROCESSOR_EV5: \ - case PROCESSOR_EV6: \ - return COSTS_N_INSNS (4); \ - default: abort(); \ - } /* Control the assembler format that we output. */ @@ -1759,18 +1492,12 @@ do { \ #define USER_LABEL_PREFIX "" -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "$%s%d:\n", PREFIX, NUM) - /* This is how to output a label for a jump table. Arguments are the same as - for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is + for (*targetm.asm_out.internal_label), except the insn for the jump table is passed. */ #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ -{ ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } +{ ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); } /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where @@ -1824,22 +1551,6 @@ do { \ } \ while (0) -/* This is how to output an insn to push a register on the stack. - It need not be very fast code. */ - -#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ - fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \ - (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ - (REGNO) & 31); - -/* This is how to output an insn to pop a register from the stack. - It need not be very fast code. */ - -#define ASM_OUTPUT_REG_POP(FILE,REGNO) \ - fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \ - (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ - (REGNO) & 31); - /* This is how to output an element of a case-vector that is absolute. (Alpha does not use such vectors, but we must define this macro anyway.) */ @@ -1862,7 +1573,7 @@ do { \ /* This is how to advance the location counter by SIZE bytes. */ #define ASM_OUTPUT_SKIP(FILE,SIZE) \ - fprintf (FILE, "\t.space %d\n", (SIZE)) + fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)) /* This says how to output an assembler line to define a global common symbol. */ @@ -1870,7 +1581,7 @@ do { \ #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ ( fputs ("\t.comm ", (FILE)), \ assemble_name ((FILE), (NAME)), \ - fprintf ((FILE), ",%d\n", (SIZE))) + fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))) /* This says how to output an assembler line to define a local common symbol. */ @@ -1878,15 +1589,7 @@ do { \ #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ ( fputs ("\t.lcomm ", (FILE)), \ assemble_name ((FILE), (NAME)), \ - fprintf ((FILE), ",%d\n", (SIZE))) - -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) + fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))) /* Print operand X (an rtx) in assembler syntax to file FILE. @@ -1908,11 +1611,14 @@ do { \ - Generates double precision suffix for floating point instructions (t for IEEE, g for VAX) + + + Generates a nop instruction after a noreturn call at the very end + of the function */ #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \ - || (CODE) == '#' || (CODE) == '*' || (CODE) == '&') + || (CODE) == '#' || (CODE) == '*' || (CODE) == '&' || (CODE) == '+') /* Print a memory address as an operand to reference that memory location. */ @@ -1943,8 +1649,9 @@ do { \ {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ {"alpha_fp_comparison_operator", {EQ, LE, LT, UNORDERED}}, \ {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \ + {"fix_operator", {FIX, UNSIGNED_FIX}}, \ {"const0_operand", {CONST_INT, CONST_DOUBLE, CONST_VECTOR}}, \ - {"current_file_function_operand", {SYMBOL_REF}}, \ + {"samegp_function_operand", {SYMBOL_REF}}, \ {"direct_call_operand", {SYMBOL_REF}}, \ {"local_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \ {"small_symbolic_operand", {SYMBOL_REF, CONST}}, \ @@ -1965,6 +1672,7 @@ do { \ {"unaligned_memory_operand", {MEM}}, \ {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \ {"any_memory_operand", {MEM}}, \ + {"normal_memory_operand", {MEM}}, \ {"hard_fp_register_operand", {SUBREG, REG}}, \ {"hard_int_register_operand", {SUBREG, REG}}, \ {"reg_not_elim_operand", {SUBREG, REG}}, \ @@ -1974,10 +1682,6 @@ do { \ {"some_small_symbolic_operand", {SET, PARALLEL, PREFETCH, UNSPEC, \ UNSPEC_VOLATILE}}, -/* Define the `__builtin_va_list' type for the ABI. */ -#define BUILD_VA_LIST_TYPE(VALIST) \ - (VALIST) = alpha_build_va_list () - /* Implement `va_start' for varargs and stdarg. */ #define EXPAND_BUILTIN_VA_START(valist, nextarg) \ alpha_va_start (valist, nextarg) @@ -2024,7 +1728,7 @@ extern long alpha_auto_offset; #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset) -#define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \ +#define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) \ alpha_output_lineno (STREAM, LINE) #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ diff --git a/contrib/gcc/config/alpha/alpha.md b/contrib/gcc/config/alpha/alpha.md index f7e9fa4..998e300 100644 --- a/contrib/gcc/config/alpha/alpha.md +++ b/contrib/gcc/config/alpha/alpha.md @@ -1,22 +1,22 @@ ;; Machine description for DEC Alpha for GNU C compiler ;; Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, -;; 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +;; 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) ;; -;; This file is part of GNU CC. +;; This file is part of GCC. ;; -;; GNU CC is free software; you can redistribute it and/or modify +;; GCC is free software; you can redistribute it and/or modify ;; it under the terms of the GNU General Public License as published by ;; the Free Software Foundation; either version 2, or (at your option) ;; any later version. ;; -;; GNU CC is distributed in the hope that it will be useful, +;; GCC is distributed in the hope that it will be useful, ;; but WITHOUT ANY WARRANTY; without even the implied warranty of ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;; GNU General Public License for more details. ;; ;; You should have received a copy of the GNU General Public License -;; along with GNU CC; see the file COPYING. If not, write to +;; along with GCC; see the file COPYING. If not, write to ;; the Free Software Foundation, 59 Temple Place - Suite 330, ;; Boston, MA 02111-1307, USA. @@ -30,7 +30,7 @@ (UNSPEC_INSXH 2) (UNSPEC_MSKXH 3) (UNSPEC_CVTQL 4) - (UNSPEC_NT_LDA 5) + (UNSPEC_CVTLQ 5) (UNSPEC_UMK_LAUM 6) (UNSPEC_UMK_LALM 7) (UNSPEC_UMK_LAL 8) @@ -97,8 +97,8 @@ ;; separately. (define_attr "type" - "ild,fld,ldsym,ist,fst,ibr,callpal,fbr,jsr,iadd,ilog,shift,icmov,fcmov,icmp,imul,\ -fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" + "ild,fld,ldsym,ist,fst,ibr,callpal,fbr,jsr,iadd,ilog,shift,icmov,fcmov, + icmp,imul,fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (const_string "iadd")) ;; Describe a user's asm statement. @@ -120,7 +120,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; The ROUND_SUFFIX attribute marks which instructions require a ;; rounding-mode suffix. The value NONE indicates no suffix, -;; the value NORMAL indicates a suffix controled by alpha_fprm. +;; the value NORMAL indicates a suffix controlled by alpha_fprm. (define_attr "round_suffix" "none,normal,c" (const_string "none")) @@ -133,7 +133,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; V_SV_SVI accepts /v, /sv and /svi (cvttq only) ;; U_SU_SUI accepts /u, /su and /sui (most fp instructions) ;; -;; The actual suffix emitted is controled by alpha_fptm. +;; The actual suffix emitted is controlled by alpha_fptm. (define_attr "trap_suffix" "none,su,sui,v_sv,v_sv_svi,u_su_sui" (const_string "none")) @@ -154,6 +154,14 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ] (const_string "no"))) +;; The CANNOT_COPY attribute marks instructions with relocations that +;; cannot easily be duplicated. This includes insns with gpdisp relocs +;; since they have to stay in 1-1 correspondence with one another. This +;; also includes jsr insns, since they must stay in correspondence with +;; the immediately following gpdisp instructions. + +(define_attr "cannot_copy" "false,true" + (const_string "false")) ;; Include scheduling descriptions. @@ -177,41 +185,36 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "" "") -(define_insn "*extendsidi2_nofix" - [(set (match_operand:DI 0 "register_operand" "=r,r,*f,?*f") - (sign_extend:DI - (match_operand:SI 1 "nonimmediate_operand" "r,m,*f,m")))] - "! TARGET_FIX" - "@ - addl $31,%1,%0 - ldl %0,%1 - cvtlq %1,%0 - lds %0,%1\;cvtlq %0,%0" - [(set_attr "type" "iadd,ild,fadd,fld") - (set_attr "length" "*,*,*,8")]) +(define_insn "*cvtlq" + [(set (match_operand:DI 0 "register_operand" "=f") + (unspec:DI [(match_operand:SF 1 "reg_or_0_operand" "fG")] + UNSPEC_CVTLQ))] + "" + "cvtlq %1,%0" + [(set_attr "type" "fadd")]) -(define_insn "*extendsidi2_fix" - [(set (match_operand:DI 0 "register_operand" "=r,r,r,?*f,?*f") +(define_insn "*extendsidi2_1" + [(set (match_operand:DI 0 "register_operand" "=r,r,!*f") (sign_extend:DI - (match_operand:SI 1 "nonimmediate_operand" "r,m,*f,*f,m")))] - "TARGET_FIX" + (match_operand:SI 1 "nonimmediate_operand" "r,m,m")))] + "" "@ addl $31,%1,%0 ldl %0,%1 - ftois %1,%0 - cvtlq %1,%0 lds %0,%1\;cvtlq %0,%0" - [(set_attr "type" "iadd,ild,ftoi,fadd,fld") - (set_attr "length" "*,*,*,*,8")]) + [(set_attr "type" "iadd,ild,fld") + (set_attr "length" "*,*,8")]) -;; Due to issues with CLASS_CANNOT_CHANGE_SIZE, we cannot use a subreg here. (define_split [(set (match_operand:DI 0 "hard_fp_register_operand" "") (sign_extend:DI (match_operand:SI 1 "memory_operand" "")))] "reload_completed" [(set (match_dup 2) (match_dup 1)) - (set (match_dup 0) (sign_extend:DI (match_dup 2)))] - "operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]));") + (set (match_dup 0) (unspec:DI [(match_dup 2)] UNSPEC_CVTLQ))] +{ + operands[1] = adjust_address (operands[1], SFmode, 0); + operands[2] = gen_rtx_REG (SFmode, REGNO (operands[0])); +}) ;; Optimize sign-extension of SImode loads. This shows up in the wake of ;; reload when converting fp->int. @@ -227,28 +230,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (sign_extend:DI (match_dup 1)))] "") -(define_peephole2 - [(set (match_operand:SI 0 "hard_int_register_operand" "") - (match_operand:SI 1 "hard_fp_register_operand" "")) - (set (match_operand:DI 2 "hard_int_register_operand" "") - (sign_extend:DI (match_dup 0)))] - "TARGET_FIX - && (true_regnum (operands[0]) == true_regnum (operands[2]) - || peep2_reg_dead_p (2, operands[0]))" - [(set (match_dup 2) - (sign_extend:DI (match_dup 1)))] - "") - -(define_peephole2 - [(set (match_operand:DI 0 "hard_fp_register_operand" "") - (sign_extend:DI (match_operand:SI 1 "hard_fp_register_operand" ""))) - (set (match_operand:DI 2 "hard_int_register_operand" "") - (match_dup 0))] - "TARGET_FIX && peep2_reg_dead_p (2, operands[0])" - [(set (match_dup 2) - (sign_extend:DI (match_dup 1)))] - "") - ;; Don't say we have addsi3 if optimizing. This generates better code. We ;; have the anonymous addsi3 pattern below in case combine wants to make it. (define_expand "addsi3" @@ -413,7 +394,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" [(set (match_operand:DI 0 "register_operand" "=r") (plus:DI (match_operand:DI 1 "register_operand" "r") (high:DI (match_operand:DI 2 "local_symbolic_operand" ""))))] - "TARGET_EXPLICIT_RELOCS" + "TARGET_EXPLICIT_RELOCS && reload_completed" "ldah %0,%2(%1)\t\t!gprelhigh" [(set_attr "usegp" "yes")]) @@ -1337,7 +1318,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "eqv %r1,%2,%0" [(set_attr "type" "ilog")]) -;; Handle the FFS insn iff we support CIX. +;; Handle FFS and related insns iff we support CIX. (define_expand "ffsdi2" [(set (match_dup 2) @@ -1361,6 +1342,27 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ; EV6 calls all mvi and cttz/ctlz/popc class imisc, so just ; reuse the existing type name. [(set_attr "type" "mvi")]) + +(define_insn "clzdi2" + [(set (match_operand:DI 0 "register_operand" "=r") + (clz:DI (match_operand:DI 1 "register_operand" "r")))] + "TARGET_CIX" + "ctlz %1,%0" + [(set_attr "type" "mvi")]) + +(define_insn "ctzdi2" + [(set (match_operand:DI 0 "register_operand" "=r") + (ctz:DI (match_operand:DI 1 "register_operand" "r")))] + "TARGET_CIX" + "cttz %1,%0" + [(set_attr "type" "mvi")]) + +(define_insn "popcountdi2" + [(set (match_operand:DI 0 "register_operand" "=r") + (popcount:DI (match_operand:DI 1 "register_operand" "r")))] + "TARGET_CIX" + "ctpop %1,%0" + [(set_attr "type" "mvi")]) ;; Next come the shifts and the various extract and insert operations. @@ -2305,8 +2307,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; processing, it is cheaper to do the truncation in the int regs. (define_insn "*cvtql" - [(set (match_operand:SI 0 "register_operand" "=f") - (unspec:SI [(match_operand:DI 1 "reg_or_0_operand" "fG")] + [(set (match_operand:SF 0 "register_operand" "=f") + (unspec:SF [(match_operand:DI 1 "reg_or_0_operand" "fG")] UNSPEC_CVTQL))] "TARGET_FP" "cvtql%/ %R1,%0" @@ -2316,37 +2318,46 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (define_insn_and_split "*fix_truncdfsi_ieee" [(set (match_operand:SI 0 "memory_operand" "=m") - (subreg:SI (fix:DI (match_operand:DF 1 "reg_or_0_operand" "fG")) 0)) + (subreg:SI + (match_operator:DI 4 "fix_operator" + [(match_operand:DF 1 "reg_or_0_operand" "fG")]) 0)) (clobber (match_scratch:DI 2 "=&f")) - (clobber (match_scratch:SI 3 "=&f"))] + (clobber (match_scratch:SF 3 "=&f"))] "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "#" "&& reload_completed" - [(set (match_dup 2) (fix:DI (match_dup 1))) - (set (match_dup 3) (unspec:SI [(match_dup 2)] UNSPEC_CVTQL)) - (set (match_dup 0) (match_dup 3))] - "" + [(set (match_dup 2) (match_op_dup 4 [(match_dup 1)])) + (set (match_dup 3) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) + (set (match_dup 5) (match_dup 3))] +{ + operands[5] = adjust_address (operands[0], SFmode, 0); +} [(set_attr "type" "fadd") (set_attr "trap" "yes")]) (define_insn_and_split "*fix_truncdfsi_internal" [(set (match_operand:SI 0 "memory_operand" "=m") - (subreg:SI (fix:DI (match_operand:DF 1 "reg_or_0_operand" "fG")) 0)) + (subreg:SI + (match_operator:DI 3 "fix_operator" + [(match_operand:DF 1 "reg_or_0_operand" "fG")]) 0)) (clobber (match_scratch:DI 2 "=f"))] "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "#" "&& reload_completed" - [(set (match_dup 2) (fix:DI (match_dup 1))) - (set (match_dup 3) (unspec:SI [(match_dup 2)] UNSPEC_CVTQL)) - (set (match_dup 0) (match_dup 3))] - ;; Due to REG_CANNOT_CHANGE_SIZE issues, we cannot simply use SUBREG. - "operands[3] = gen_rtx_REG (SImode, REGNO (operands[2]));" + [(set (match_dup 2) (match_op_dup 3 [(match_dup 1)])) + (set (match_dup 4) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) + (set (match_dup 5) (match_dup 4))] +{ + operands[4] = gen_rtx_REG (SFmode, REGNO (operands[2])); + operands[5] = adjust_address (operands[0], SFmode, 0); +} [(set_attr "type" "fadd") (set_attr "trap" "yes")]) (define_insn "*fix_truncdfdi_ieee" [(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f") - (fix:DI (match_operand:DF 1 "reg_or_0_operand" "fG")))] + (match_operator:DI 2 "fix_operator" + [(match_operand:DF 1 "reg_or_0_operand" "fG")]))] "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cvt%-q%/ %R1,%0" [(set_attr "type" "fadd") @@ -2354,9 +2365,10 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "c") (set_attr "trap_suffix" "v_sv_svi")]) -(define_insn "fix_truncdfdi2" +(define_insn "*fix_truncdfdi2" [(set (match_operand:DI 0 "reg_no_subreg_operand" "=f") - (fix:DI (match_operand:DF 1 "reg_or_0_operand" "fG")))] + (match_operator:DI 2 "fix_operator" + [(match_operand:DF 1 "reg_or_0_operand" "fG")]))] "TARGET_FP" "cvt%-q%/ %R1,%0" [(set_attr "type" "fadd") @@ -2364,44 +2376,64 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "c") (set_attr "trap_suffix" "v_sv_svi")]) +(define_expand "fix_truncdfdi2" + [(set (match_operand:DI 0 "reg_no_subreg_operand" "") + (fix:DI (match_operand:DF 1 "reg_or_0_operand" "")))] + "TARGET_FP" + "") + +(define_expand "fixuns_truncdfdi2" + [(set (match_operand:DI 0 "reg_no_subreg_operand" "") + (unsigned_fix:DI (match_operand:DF 1 "reg_or_0_operand" "")))] + "TARGET_FP" + "") + ;; Likewise between SFmode and SImode. (define_insn_and_split "*fix_truncsfsi_ieee" [(set (match_operand:SI 0 "memory_operand" "=m") - (subreg:SI (fix:DI (float_extend:DF - (match_operand:SF 1 "reg_or_0_operand" "fG"))) 0)) + (subreg:SI + (match_operator:DI 4 "fix_operator" + [(float_extend:DF + (match_operand:SF 1 "reg_or_0_operand" "fG"))]) 0)) (clobber (match_scratch:DI 2 "=&f")) - (clobber (match_scratch:SI 3 "=&f"))] + (clobber (match_scratch:SF 3 "=&f"))] "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "#" "&& reload_completed" - [(set (match_dup 2) (fix:DI (float_extend:DF (match_dup 1)))) - (set (match_dup 3) (unspec:SI [(match_dup 2)] UNSPEC_CVTQL)) - (set (match_dup 0) (match_dup 3))] - "" + [(set (match_dup 2) (match_op_dup 4 [(float_extend:DF (match_dup 1))])) + (set (match_dup 3) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) + (set (match_dup 5) (match_dup 3))] +{ + operands[5] = adjust_address (operands[0], SFmode, 0); +} [(set_attr "type" "fadd") (set_attr "trap" "yes")]) (define_insn_and_split "*fix_truncsfsi_internal" [(set (match_operand:SI 0 "memory_operand" "=m") - (subreg:SI (fix:DI (float_extend:DF - (match_operand:SF 1 "reg_or_0_operand" "fG"))) 0)) + (subreg:SI + (match_operator:DI 3 "fix_operator" + [(float_extend:DF + (match_operand:SF 1 "reg_or_0_operand" "fG"))]) 0)) (clobber (match_scratch:DI 2 "=f"))] "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "#" "&& reload_completed" - [(set (match_dup 2) (fix:DI (float_extend:DF (match_dup 1)))) - (set (match_dup 3) (unspec:SI [(match_dup 2)] UNSPEC_CVTQL)) - (set (match_dup 0) (match_dup 3))] - ;; Due to REG_CANNOT_CHANGE_SIZE issues, we cannot simply use SUBREG. - "operands[3] = gen_rtx_REG (SImode, REGNO (operands[2]));" + [(set (match_dup 2) (match_op_dup 3 [(float_extend:DF (match_dup 1))])) + (set (match_dup 4) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) + (set (match_dup 5) (match_dup 4))] +{ + operands[4] = gen_rtx_REG (SFmode, REGNO (operands[2])); + operands[5] = adjust_address (operands[0], SFmode, 0); +} [(set_attr "type" "fadd") (set_attr "trap" "yes")]) (define_insn "*fix_truncsfdi_ieee" [(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f") - (fix:DI (float_extend:DF - (match_operand:SF 1 "reg_or_0_operand" "fG"))))] + (match_operator:DI 2 "fix_operator" + [(float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG"))]))] "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cvt%-q%/ %R1,%0" [(set_attr "type" "fadd") @@ -2409,10 +2441,10 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "c") (set_attr "trap_suffix" "v_sv_svi")]) -(define_insn "fix_truncsfdi2" +(define_insn "*fix_truncsfdi2" [(set (match_operand:DI 0 "reg_no_subreg_operand" "=f") - (fix:DI (float_extend:DF - (match_operand:SF 1 "reg_or_0_operand" "fG"))))] + (match_operator:DI 2 "fix_operator" + [(float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG"))]))] "TARGET_FP" "cvt%-q%/ %R1,%0" [(set_attr "type" "fadd") @@ -2420,12 +2452,31 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "c") (set_attr "trap_suffix" "v_sv_svi")]) +(define_expand "fix_truncsfdi2" + [(set (match_operand:DI 0 "reg_no_subreg_operand" "") + (fix:DI (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" ""))))] + "TARGET_FP" + "") + +(define_expand "fixuns_truncsfdi2" + [(set (match_operand:DI 0 "reg_no_subreg_operand" "") + (unsigned_fix:DI + (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" ""))))] + "TARGET_FP" + "") + (define_expand "fix_trunctfdi2" [(use (match_operand:DI 0 "register_operand" "")) (use (match_operand:TF 1 "general_operand" ""))] "TARGET_HAS_XFLOATING_LIBS" "alpha_emit_xfloating_cvt (FIX, operands); DONE;") +(define_expand "fixuns_trunctfdi2" + [(use (match_operand:DI 0 "register_operand" "")) + (use (match_operand:TF 1 "general_operand" ""))] + "TARGET_HAS_XFLOATING_LIBS" + "alpha_emit_xfloating_cvt (UNSIGNED_FIX, operands); DONE;") + (define_insn "*floatdisf_ieee" [(set (match_operand:SF 0 "register_operand" "=&f") (float:SF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] @@ -2446,6 +2497,35 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "normal") (set_attr "trap_suffix" "sui")]) +(define_insn_and_split "*floatsisf2_ieee" + [(set (match_operand:SF 0 "register_operand" "=&f") + (float:SF (match_operand:SI 1 "memory_operand" "m"))) + (clobber (match_scratch:DI 2 "=&f")) + (clobber (match_scratch:SF 3 "=&f"))] + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" + "#" + "&& reload_completed" + [(set (match_dup 3) (match_dup 1)) + (set (match_dup 2) (unspec:DI [(match_dup 3)] UNSPEC_CVTLQ)) + (set (match_dup 0) (float:SF (match_dup 2)))] +{ + operands[1] = adjust_address (operands[1], SFmode, 0); +}) + +(define_insn_and_split "*floatsisf2" + [(set (match_operand:SF 0 "register_operand" "=f") + (float:SF (match_operand:SI 1 "memory_operand" "m")))] + "TARGET_FP" + "#" + "&& reload_completed" + [(set (match_dup 0) (match_dup 1)) + (set (match_dup 2) (unspec:DI [(match_dup 0)] UNSPEC_CVTLQ)) + (set (match_dup 0) (float:SF (match_dup 2)))] +{ + operands[1] = adjust_address (operands[1], SFmode, 0); + operands[2] = gen_rtx_REG (DImode, REGNO (operands[0])); +}) + (define_insn "*floatdidf_ieee" [(set (match_operand:DF 0 "register_operand" "=&f") (float:DF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] @@ -2466,6 +2546,36 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (set_attr "round_suffix" "normal") (set_attr "trap_suffix" "sui")]) +(define_insn_and_split "*floatsidf2_ieee" + [(set (match_operand:DF 0 "register_operand" "=&f") + (float:DF (match_operand:SI 1 "memory_operand" "m"))) + (clobber (match_scratch:DI 2 "=&f")) + (clobber (match_scratch:SF 3 "=&f"))] + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" + "#" + "&& reload_completed" + [(set (match_dup 3) (match_dup 1)) + (set (match_dup 2) (unspec:DI [(match_dup 3)] UNSPEC_CVTLQ)) + (set (match_dup 0) (float:DF (match_dup 2)))] +{ + operands[1] = adjust_address (operands[1], SFmode, 0); +}) + +(define_insn_and_split "*floatsidf2" + [(set (match_operand:DF 0 "register_operand" "=f") + (float:DF (match_operand:SI 1 "memory_operand" "m")))] + "TARGET_FP" + "#" + "&& reload_completed" + [(set (match_dup 3) (match_dup 1)) + (set (match_dup 2) (unspec:DI [(match_dup 3)] UNSPEC_CVTLQ)) + (set (match_dup 0) (float:DF (match_dup 2)))] +{ + operands[1] = adjust_address (operands[1], SFmode, 0); + operands[2] = gen_rtx_REG (DImode, REGNO (operands[0])); + operands[3] = gen_rtx_REG (SFmode, REGNO (operands[0])); +}) + (define_expand "floatditf2" [(use (match_operand:TF 0 "register_operand" "")) (use (match_operand:DI 1 "general_operand" ""))] @@ -4594,7 +4704,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "@ jsr $26,(%0),0\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%* - bsr $26,$%0..ng + bsr $26,%0\t\t!samegp ldq $27,%0($29)\t\t!literal!%#\;jsr $26,($27),%0\t\t!lituse_jsr!%#\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%*" [(set_attr "type" "jsr") (set_attr "length" "12,*,16")]) @@ -4607,8 +4717,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 29)) (clobber (reg:DI 26))])] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed - && ! current_file_function_operand (operands[0], Pmode) - && peep2_regno_dead_p (1, 29)" + && ! samegp_function_operand (operands[0], Pmode) + && (peep2_regno_dead_p (1, 29) + || find_reg_note (insn, REG_NORETURN, NULL_RTX))" [(parallel [(call (mem:DI (match_dup 2)) (match_dup 1)) (set (reg:DI 26) (plus:DI (pc) (const_int 4))) @@ -4637,8 +4748,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 29)) (clobber (reg:DI 26))])] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed - && ! current_file_function_operand (operands[0], Pmode) - && ! peep2_regno_dead_p (1, 29)" + && ! samegp_function_operand (operands[0], Pmode) + && ! (peep2_regno_dead_p (1, 29) + || find_reg_note (insn, REG_NORETURN, NULL_RTX))" [(parallel [(call (mem:DI (match_dup 2)) (match_dup 1)) (set (reg:DI 26) (plus:DI (pc) (const_int 4))) @@ -4678,7 +4790,18 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (match_operand 3 "const_int_operand" ""))] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "jsr $26,(%0),%2%J3" - [(set_attr "type" "jsr")]) + [(set_attr "type" "jsr") + (set_attr "cannot_copy" "true")]) + +;; We output a nop after noreturn calls at the very end of the function to +;; ensure that the return address always remains in the caller's code range, +;; as not doing so might confuse unwinding engines. +;; +;; The potential change in insn length is not reflected in the length +;; attributes at this stage. Since the extra space is only actually added at +;; the very end of the compilation process (via final/print_operand), it +;; really seems harmless and not worth the trouble of some extra computation +;; cost and complexity. (define_insn "*call_osf_1_noreturn" [(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,s")) @@ -4688,9 +4811,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "! TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && find_reg_note (insn, REG_NORETURN, NULL_RTX)" "@ - jsr $26,($27),0 - bsr $26,$%0..ng - jsr $26,%0" + jsr $26,($27),0%+ + bsr $26,$%0..ng%+ + jsr $26,%0%+" [(set_attr "type" "jsr") (set_attr "length" "*,*,8")]) @@ -4715,7 +4838,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (unspec [(reg:DI 29)] UNSPEC_SIBCALL)] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "@ - br $31,$%0..ng + br $31,%0\t\t!samegp ldq $27,%0($29)\t\t!literal!%#\;jmp $31,($27),%0\t\t!lituse_jsr!%#" [(set_attr "type" "jsr") (set_attr "length" "*,8")]) @@ -4754,20 +4877,19 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 26)) (clobber (reg:DI 27))] "TARGET_ABI_OPEN_VMS" - "* { switch (which_alternative) { case 0: - return \"mov %2,$27\;jsr $26,0\;ldq $27,0($29)\"; + return "mov %2,$27\;jsr $26,0\;ldq $27,0($29)"; case 1: operands [2] = alpha_use_linkage (operands [0], cfun->decl, 1, 0); operands [3] = alpha_use_linkage (operands [0], cfun->decl, 0, 0); - return \"ldq $26,%3\;ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)\"; + return "ldq $26,%3\;ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)"; default: abort(); } -}" +} [(set_attr "type" "jsr") (set_attr "length" "12,16")]) @@ -5086,27 +5208,10 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" operands[1] = force_reg (TFmode, operands[1]); }) -(define_insn "*movsi_nofix" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m") - (match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f"))] - "(TARGET_ABI_OSF || TARGET_ABI_UNICOSMK) && ! TARGET_FIX - && (register_operand (operands[0], SImode) - || reg_or_0_operand (operands[1], SImode))" - "@ - bis $31,%r1,%0 - lda %0,%1($31) - ldah %0,%h1($31) - ldl %0,%1 - stl %r1,%0 - cpys %R1,%R1,%0 - ld%, %0,%1 - st%, %R1,%0" - [(set_attr "type" "ilog,iadd,iadd,ild,ist,fcpys,fld,fst")]) - -(define_insn "*movsi_fix" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m,r,*f") - (match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f,*f,r"))] - "TARGET_ABI_OSF && TARGET_FIX +(define_insn "*movsi" + [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m") + (match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ"))] + "(TARGET_ABI_OSF || TARGET_ABI_UNICOSMK) && (register_operand (operands[0], SImode) || reg_or_0_operand (operands[1], SImode))" "@ @@ -5114,38 +5219,13 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" lda %0,%1($31) ldah %0,%h1($31) ldl %0,%1 - stl %r1,%0 - cpys %R1,%R1,%0 - ld%, %0,%1 - st%, %R1,%0 - ftois %1,%0 - itofs %1,%0" - [(set_attr "type" "ilog,iadd,iadd,ild,ist,fcpys,fld,fst,ftoi,itof")]) - -(define_insn "*movsi_nt_vms_nofix" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m,*f,*f,m") - (match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ,*fJ,m,*f"))] - "(TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS) - && !TARGET_FIX - && (register_operand (operands[0], SImode) - || reg_or_0_operand (operands[1], SImode))" - "@ - bis $31,%1,%0 - lda %0,%1 - ldah %0,%h1 - lda %0,%1 - ldl %0,%1 - stl %r1,%0 - cpys %R1,%R1,%0 - ld%, %0,%1 - st%, %R1,%0" - [(set_attr "type" "ilog,iadd,iadd,ldsym,ild,ist,fcpys,fld,fst")]) + stl %r1,%0" + [(set_attr "type" "ilog,iadd,iadd,ild,ist")]) -(define_insn "*movsi_nt_vms_fix" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m,*f,*f,m,r,*f") - (match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ,*fJ,m,*f,*f,r"))] +(define_insn "*movsi_nt_vms" + [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m") + (match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ"))] "(TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS) - && TARGET_FIX && (register_operand (operands[0], SImode) || reg_or_0_operand (operands[1], SImode))" "@ @@ -5154,13 +5234,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ldah %0,%h1 lda %0,%1 ldl %0,%1 - stl %r1,%0 - cpys %R1,%R1,%0 - ld%, %0,%1 - st%, %R1,%0 - ftois %1,%0 - itofs %1,%0" - [(set_attr "type" "ilog,iadd,iadd,ldsym,ild,ist,fcpys,fld,fst,ftoi,itof")]) + stl %r1,%0" + [(set_attr "type" "ilog,iadd,iadd,ldsym,ild,ist")]) (define_insn "*movhi_nobwx" [(set (match_operand:HI 0 "register_operand" "=r,r") @@ -5243,7 +5318,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; Split the load of an address into a four-insn sequence on Unicos/Mk. ;; Always generate a REG_EQUAL note for the last instruction to facilitate -;; optimisations. If the symbolic operand is a label_ref, generate REG_LABEL +;; optimizations. If the symbolic operand is a label_ref, generate REG_LABEL ;; notes and update LABEL_NUSES because this is not done automatically. ;; Labels may be incorrectly deleted if we don't do this. ;; @@ -5399,7 +5474,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" [(set (match_operand:DI 0 "register_operand" "=r") (unspec:DI [(match_operand:DI 1 "symbolic_operand" "")] UNSPEC_SYMBOL))] - "TARGET_EXPLICIT_RELOCS" + "TARGET_EXPLICIT_RELOCS && flag_inline_functions" "#" "" [(set (match_dup 0) (match_dup 1))] @@ -5635,7 +5710,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (define_expand "aligned_loadqi" [(set (match_operand:SI 3 "register_operand" "") (match_operand:SI 1 "memory_operand" "")) - (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (subreg:DI (match_dup 3) 0) (const_int 8) (match_operand:DI 2 "const_int_operand" "")))] @@ -5646,7 +5721,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (define_expand "aligned_loadhi" [(set (match_operand:SI 3 "register_operand" "") (match_operand:SI 1 "memory_operand" "")) - (set (subreg:DI (match_operand:HI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (subreg:DI (match_dup 3) 0) (const_int 16) (match_operand:DI 2 "const_int_operand" "")))] @@ -5662,7 +5737,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; operand 3 can overlap the input and output registers. (define_expand "unaligned_loadqi" - [(use (match_operand:QI 0 "register_operand" "")) + [(use (match_operand:DI 0 "register_operand" "")) (use (match_operand:DI 1 "address_operand" "")) (use (match_operand:DI 2 "register_operand" "")) (use (match_operand:DI 3 "register_operand" ""))] @@ -5683,7 +5758,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (const_int -8)))) (set (match_operand:DI 3 "register_operand" "") (match_dup 1)) - (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (match_dup 2) (const_int 8) (ashift:DI (match_dup 3) (const_int 3))))] @@ -5696,7 +5771,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (const_int -8)))) (set (match_operand:DI 3 "register_operand" "") (match_dup 1)) - (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (match_dup 2) (const_int 8) (minus:DI @@ -5706,7 +5781,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "") (define_expand "unaligned_loadhi" - [(use (match_operand:QI 0 "register_operand" "")) + [(use (match_operand:DI 0 "register_operand" "")) (use (match_operand:DI 1 "address_operand" "")) (use (match_operand:DI 2 "register_operand" "")) (use (match_operand:DI 3 "register_operand" ""))] @@ -5727,7 +5802,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (const_int -8)))) (set (match_operand:DI 3 "register_operand" "") (match_dup 1)) - (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (match_dup 2) (const_int 16) (ashift:DI (match_dup 3) (const_int 3))))] @@ -5740,7 +5815,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (const_int -8)))) (set (match_operand:DI 3 "register_operand" "") (plus:DI (match_dup 1) (const_int 1))) - (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) + (set (match_operand:DI 0 "register_operand" "") (zero_extract:DI (match_dup 2) (const_int 16) (minus:DI @@ -5935,9 +6010,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" { rtx scratch, seq; - if (GET_CODE (operands[1]) != MEM) - abort (); - if (aligned_memory_operand (operands[1], QImode)) { seq = gen_reload_inqi_help (operands[0], operands[1], @@ -5956,8 +6028,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" scratch = gen_rtx_REG (DImode, REGNO (operands[2])); addr = get_unaligned_address (operands[1], 0); - seq = gen_unaligned_loadqi (operands[0], addr, scratch, - gen_rtx_REG (DImode, REGNO (operands[0]))); + operands[0] = gen_rtx_REG (DImode, REGNO (operands[0])); + seq = gen_unaligned_loadqi (operands[0], addr, scratch, operands[0]); alpha_set_memflags (seq, operands[1]); } emit_insn (seq); @@ -5972,9 +6044,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" { rtx scratch, seq; - if (GET_CODE (operands[1]) != MEM) - abort (); - if (aligned_memory_operand (operands[1], HImode)) { seq = gen_reload_inhi_help (operands[0], operands[1], @@ -5993,8 +6062,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" scratch = gen_rtx_REG (DImode, REGNO (operands[2])); addr = get_unaligned_address (operands[1], 0); - seq = gen_unaligned_loadhi (operands[0], addr, scratch, - gen_rtx_REG (DImode, REGNO (operands[0]))); + operands[0] = gen_rtx_REG (DImode, REGNO (operands[0])); + seq = gen_unaligned_loadhi (operands[0], addr, scratch, operands[0]); alpha_set_memflags (seq, operands[1]); } emit_insn (seq); @@ -6007,9 +6076,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:TI 2 "register_operand" "=&r")])] "! TARGET_BWX" { - if (GET_CODE (operands[0]) != MEM) - abort (); - if (aligned_memory_operand (operands[0], QImode)) { emit_insn (gen_reload_outqi_help @@ -6042,9 +6108,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:TI 2 "register_operand" "=&r")])] "! TARGET_BWX" { - if (GET_CODE (operands[0]) != MEM) - abort (); - if (aligned_memory_operand (operands[0], HImode)) { emit_insn (gen_reload_outhi_help @@ -6075,71 +6138,47 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" ;; always get a proper address for a stack slot during reload_foo ;; expansion, so we must delay our address manipulations until after. -(define_insn "reload_inqi_help" +(define_insn_and_split "reload_inqi_help" [(set (match_operand:QI 0 "register_operand" "=r") (match_operand:QI 1 "memory_operand" "m")) (clobber (match_operand:SI 2 "register_operand" "=r"))] "! TARGET_BWX && (reload_in_progress || reload_completed)" - "#") - -(define_insn "reload_inhi_help" - [(set (match_operand:HI 0 "register_operand" "=r") - (match_operand:HI 1 "memory_operand" "m")) - (clobber (match_operand:SI 2 "register_operand" "=r"))] - "! TARGET_BWX && (reload_in_progress || reload_completed)" - "#") - -(define_insn "reload_outqi_help" - [(set (match_operand:QI 0 "memory_operand" "=m") - (match_operand:QI 1 "register_operand" "r")) - (clobber (match_operand:SI 2 "register_operand" "=r")) - (clobber (match_operand:SI 3 "register_operand" "=r"))] - "! TARGET_BWX && (reload_in_progress || reload_completed)" - "#") - -(define_insn "reload_outhi_help" - [(set (match_operand:HI 0 "memory_operand" "=m") - (match_operand:HI 1 "register_operand" "r")) - (clobber (match_operand:SI 2 "register_operand" "=r")) - (clobber (match_operand:SI 3 "register_operand" "=r"))] - "! TARGET_BWX && (reload_in_progress || reload_completed)" - "#") - -(define_split - [(set (match_operand:QI 0 "register_operand" "") - (match_operand:QI 1 "memory_operand" "")) - (clobber (match_operand:SI 2 "register_operand" ""))] + "#" "! TARGET_BWX && reload_completed" [(const_int 0)] { rtx aligned_mem, bitnum; get_aligned_mem (operands[1], &aligned_mem, &bitnum); - + operands[0] = gen_lowpart (DImode, operands[0]); emit_insn (gen_aligned_loadqi (operands[0], aligned_mem, bitnum, operands[2])); DONE; }) -(define_split - [(set (match_operand:HI 0 "register_operand" "") - (match_operand:HI 1 "memory_operand" "")) - (clobber (match_operand:SI 2 "register_operand" ""))] +(define_insn_and_split "reload_inhi_help" + [(set (match_operand:HI 0 "register_operand" "=r") + (match_operand:HI 1 "memory_operand" "m")) + (clobber (match_operand:SI 2 "register_operand" "=r"))] + "! TARGET_BWX && (reload_in_progress || reload_completed)" + "#" "! TARGET_BWX && reload_completed" [(const_int 0)] { rtx aligned_mem, bitnum; get_aligned_mem (operands[1], &aligned_mem, &bitnum); - + operands[0] = gen_lowpart (DImode, operands[0]); emit_insn (gen_aligned_loadhi (operands[0], aligned_mem, bitnum, operands[2])); DONE; }) -(define_split - [(set (match_operand:QI 0 "memory_operand" "") - (match_operand:QI 1 "register_operand" "")) - (clobber (match_operand:SI 2 "register_operand" "")) - (clobber (match_operand:SI 3 "register_operand" ""))] +(define_insn_and_split "reload_outqi_help" + [(set (match_operand:QI 0 "memory_operand" "=m") + (match_operand:QI 1 "register_operand" "r")) + (clobber (match_operand:SI 2 "register_operand" "=r")) + (clobber (match_operand:SI 3 "register_operand" "=r"))] + "! TARGET_BWX && (reload_in_progress || reload_completed)" + "#" "! TARGET_BWX && reload_completed" [(const_int 0)] { @@ -6150,11 +6189,13 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" DONE; }) -(define_split - [(set (match_operand:HI 0 "memory_operand" "") - (match_operand:HI 1 "register_operand" "")) - (clobber (match_operand:SI 2 "register_operand" "")) - (clobber (match_operand:SI 3 "register_operand" ""))] +(define_insn_and_split "reload_outhi_help" + [(set (match_operand:HI 0 "memory_operand" "=m") + (match_operand:HI 1 "register_operand" "r")) + (clobber (match_operand:SI 2 "register_operand" "=r")) + (clobber (match_operand:SI 3 "register_operand" "=r"))] + "! TARGET_BWX && (reload_in_progress || reload_completed)" + "#" "! TARGET_BWX && reload_completed" [(const_int 0)] { @@ -6494,6 +6535,56 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" FAIL; }) +(define_expand "movstrdi" + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") + (match_operand:BLK 1 "memory_operand" "")) + (use (match_operand:DI 2 "immediate_operand" "")) + (use (match_operand:DI 3 "immediate_operand" "")) + (use (match_dup 4)) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 18)) + (clobber (reg:DI 19)) + (clobber (reg:DI 20)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))])] + "TARGET_ABI_OPEN_VMS" +{ + operands[4] = gen_rtx_SYMBOL_REF (Pmode, "OTS$MOVE"); + alpha_need_linkage (XSTR (operands[4], 0), 0); +}) + +(define_insn "*movstrdi_1" + [(set (match_operand:BLK 0 "memory_operand" "=m,=m") + (match_operand:BLK 1 "memory_operand" "m,m")) + (use (match_operand:DI 2 "nonmemory_operand" "r,i")) + (use (match_operand:DI 3 "immediate_operand" "")) + (use (match_operand:DI 4 "call_operand" "i,i")) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 18)) + (clobber (reg:DI 19)) + (clobber (reg:DI 20)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))] + "TARGET_ABI_OPEN_VMS" +{ + operands [5] = alpha_use_linkage (operands [4], cfun->decl, 0, 1); + switch (which_alternative) + { + case 0: + return "lda $16,%0\;bis $31,%2,$17\;lda $18,%1\;ldq $26,%5\;lda $25,3($31)\;jsr $26,%4\;ldq $27,0($29)"; + case 1: + return "lda $16,%0\;lda $17,%2($31)\;lda $18,%1\;ldq $26,%5\;lda $25,3($31)\;jsr $26,%4\;ldq $27,0($29)"; + default: + abort(); + } +} + [(set_attr "type" "multi") + (set_attr "length" "28")]) + (define_expand "clrstrqi" [(parallel [(set (match_operand:BLK 0 "memory_operand" "") (const_int 0)) @@ -6506,6 +6597,51 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" else FAIL; }) + +(define_expand "clrstrdi" + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") + (const_int 0)) + (use (match_operand:DI 1 "immediate_operand" "")) + (use (match_operand:DI 2 "immediate_operand" "")) + (use (match_dup 3)) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))])] + "TARGET_ABI_OPEN_VMS" +{ + operands[3] = gen_rtx_SYMBOL_REF (Pmode, "OTS$ZERO"); + alpha_need_linkage (XSTR (operands[3], 0), 0); +}) + +(define_insn "*clrstrdi_1" + [(set (match_operand:BLK 0 "memory_operand" "=m,=m") + (const_int 0)) + (use (match_operand:DI 1 "nonmemory_operand" "r,i")) + (use (match_operand:DI 2 "immediate_operand" "")) + (use (match_operand:DI 3 "call_operand" "i,i")) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))] + "TARGET_ABI_OPEN_VMS" +{ + operands [4] = alpha_use_linkage (operands [3], cfun->decl, 0, 1); + switch (which_alternative) + { + case 0: + return "lda $16,%0\;bis $31,%1,$17\;ldq $26,%4\;lda $25,2($31)\;jsr $26,%3\;ldq $27,0($29)"; + case 1: + return "lda $16,%0\;lda $17,%1($31)\;ldq $26,%4\;lda $25,2($31)\;jsr $26,%3\;ldq $27,0($29)"; + default: + abort(); + } +} + [(set_attr "type" "multi") + (set_attr "length" "24")]) + ;; Subroutine of stack space allocation. Perform a stack probe. (define_expand "probe_stack" @@ -6605,7 +6741,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "" { operands[2] = gen_label_rtx (); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (operands[2])); return "stq $31,-8192(%1)\;subq %0,1,%0\;lda %1,-8192(%1)\;bne %0,%l2"; @@ -6648,7 +6784,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand 2 "const_int_operand" "")] UNSPECV_LDGP1))] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" - "ldah %0,0(%1)\t\t!gpdisp!%2") + "ldah %0,0(%1)\t\t!gpdisp!%2" + [(set_attr "cannot_copy" "true")]) (define_insn "*ldgp_er_2" [(set (match_operand:DI 0 "register_operand" "=r") @@ -6656,7 +6793,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand 2 "const_int_operand" "")] UNSPEC_LDGP2))] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" - "lda %0,0(%1)\t\t!gpdisp!%2") + "lda %0,0(%1)\t\t!gpdisp!%2" + [(set_attr "cannot_copy" "true")]) (define_insn "*prologue_ldgp_er_2" [(set (match_operand:DI 0 "register_operand" "=r") @@ -6664,7 +6802,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand 2 "const_int_operand" "")] UNSPECV_PLDGP2))] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" - "lda %0,0(%1)\t\t!gpdisp!%2\n$%~..ng:") + "lda %0,0(%1)\t\t!gpdisp!%2\n$%~..ng:" + [(set_attr "cannot_copy" "true")]) (define_insn "*prologue_ldgp_1" [(set (match_operand:DI 0 "register_operand" "=r") @@ -6672,7 +6811,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand 2 "const_int_operand" "")] UNSPECV_LDGP1))] "" - "ldgp %0,0(%1)\n$%~..ng:") + "ldgp %0,0(%1)\n$%~..ng:" + [(set_attr "cannot_copy" "true")]) (define_insn "*prologue_ldgp_2" [(set (match_operand:DI 0 "register_operand" "=r") @@ -6722,17 +6862,6 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" DONE; }) -;; In creating a large stack frame, NT _must_ use ldah+lda to load -;; the frame size into a register. We use this pattern to ensure -;; we get lda instead of addq. -(define_insn "nt_lda" - [(set (match_operand:DI 0 "register_operand" "=r") - (unspec:DI [(match_dup 0) - (match_operand:DI 1 "const_int_operand" "n")] - UNSPEC_NT_LDA))] - "" - "lda %0,%1(%0)") - (define_expand "builtin_longjmp" [(use (match_operand:DI 0 "register_operand" "r"))] "TARGET_ABI_OSF" @@ -6786,7 +6915,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" [(const_int 0)] " { - emit_note (NULL, NOTE_INSN_DELETED); + emit_note (NOTE_INSN_DELETED); DONE; }") @@ -7046,7 +7175,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extxl_be; else @@ -7061,7 +7190,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extxl_be; else @@ -7076,7 +7205,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extxl_be; else @@ -7091,7 +7220,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extxl_be; else @@ -7106,7 +7235,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extwh_be; else @@ -7121,7 +7250,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extlh_be; else @@ -7136,7 +7265,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_extqh_be; else @@ -7151,7 +7280,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_insbl_be; else @@ -7167,7 +7296,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_inswl_be; else @@ -7183,7 +7312,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_insll_be; else @@ -7200,7 +7329,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx); if (WORDS_BIG_ENDIAN) gen = gen_insql_be; else @@ -7245,7 +7374,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); rtx mask; if (WORDS_BIG_ENDIAN) gen = gen_mskxl_be; @@ -7262,7 +7391,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); rtx mask; if (WORDS_BIG_ENDIAN) gen = gen_mskxl_be; @@ -7279,7 +7408,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); rtx mask; if (WORDS_BIG_ENDIAN) gen = gen_mskxl_be; @@ -7296,7 +7425,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { - rtx (*gen) PARAMS ((rtx, rtx, rtx, rtx)); + rtx (*gen) (rtx, rtx, rtx, rtx); rtx mask; if (WORDS_BIG_ENDIAN) gen = gen_mskxl_be; @@ -7719,7 +7848,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "@ jsr $26,(%1),0\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%* - bsr $26,$%1..ng + bsr $26,%1\t\t!samegp ldq $27,%1($29)\t\t!literal!%#\;jsr $26,($27),0\t\t!lituse_jsr!%#\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%*" [(set_attr "type" "jsr") (set_attr "length" "12,*,16")]) @@ -7733,8 +7862,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 29)) (clobber (reg:DI 26))])] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed - && ! current_file_function_operand (operands[1], Pmode) - && peep2_regno_dead_p (1, 29)" + && ! samegp_function_operand (operands[1], Pmode) + && (peep2_regno_dead_p (1, 29) + || find_reg_note (insn, REG_NORETURN, NULL_RTX))" [(parallel [(set (match_dup 0) (call (mem:DI (match_dup 3)) (match_dup 2))) @@ -7765,8 +7895,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 29)) (clobber (reg:DI 26))])] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed - && ! current_file_function_operand (operands[1], Pmode) - && ! peep2_regno_dead_p (1, 29)" + && ! samegp_function_operand (operands[1], Pmode) + && ! (peep2_regno_dead_p (1, 29) + || find_reg_note (insn, REG_NORETURN, NULL_RTX))" [(parallel [(set (match_dup 0) (call (mem:DI (match_dup 3)) (match_dup 2))) @@ -7808,7 +7939,8 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (match_operand 4 "" ""))] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "jsr $26,(%1),%3%J4" - [(set_attr "type" "jsr")]) + [(set_attr "type" "jsr") + (set_attr "cannot_copy" "true")]) (define_insn "*call_value_osf_1_noreturn" [(set (match_operand 0 "" "") @@ -7819,9 +7951,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "! TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && find_reg_note (insn, REG_NORETURN, NULL_RTX)" "@ - jsr $26,($27),0 - bsr $26,$%1..ng - jsr $26,%1" + jsr $26,($27),0%+ + bsr $26,$%1..ng%+ + jsr $26,%1%+" [(set_attr "type" "jsr") (set_attr "length" "*,*,8")]) @@ -7910,7 +8042,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (unspec [(reg:DI 29)] UNSPEC_SIBCALL)] "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" "@ - br $31,$%1..ng + br $31,%1\t\t!samegp ldq $27,%1($29)\t\t!literal!%#\;jmp $31,($27),%1\t\t!lituse_jsr!%#" [(set_attr "type" "jsr") (set_attr "length" "*,8")]) @@ -7952,20 +8084,19 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 26)) (clobber (reg:DI 27))] "TARGET_ABI_OPEN_VMS" - "* { switch (which_alternative) { case 0: - return \"mov %3,$27\;jsr $26,0\;ldq $27,0($29)\"; + return "mov %3,$27\;jsr $26,0\;ldq $27,0($29)"; case 1: operands [3] = alpha_use_linkage (operands [1], cfun->decl, 1, 0); operands [4] = alpha_use_linkage (operands [1], cfun->decl, 0, 0); - return \"ldq $26,%4\;ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)\"; + return "ldq $26,%4\;ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)"; default: abort(); } -}" +} [(set_attr "type" "jsr") (set_attr "length" "12,16")]) diff --git a/contrib/gcc/config/alpha/elf.h b/contrib/gcc/config/alpha/elf.h index dbe9263..34bba3e 100644 --- a/contrib/gcc/config/alpha/elf.h +++ b/contrib/gcc/config/alpha/elf.h @@ -1,24 +1,24 @@ /* Definitions of target machine for GNU compiler, for DEC Alpha w/ELF. - Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002 + Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. Contributed by Richard Henderson (rth@tamu.edu). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ +Boston, MA 02111-1307, USA. */ #undef OBJECT_FORMAT_COFF #undef EXTENDED_COFF @@ -35,8 +35,13 @@ Boston, MA 02111-1307, USA. */ #undef ASM_FINAL_SPEC -#undef CPP_SUBTARGET_SPEC -#define CPP_SUBTARGET_SPEC "-D__ELF__" +/* alpha/ doesn't use elfos.h for some reason. */ +#define TARGET_OBJFMT_CPP_BUILTINS() \ + do \ + { \ + builtin_define ("__ELF__"); \ + } \ + while (0) #undef CC1_SPEC #define CC1_SPEC "%{G*}" @@ -44,27 +49,6 @@ Boston, MA 02111-1307, USA. */ #undef ASM_SPEC #define ASM_SPEC "%{G*} %{relax:-relax} %{!gstabs*:-no-mdebug}%{gstabs*:-mdebug}" -/* Output at beginning of assembler file. */ -#undef ASM_FILE_START -#define ASM_FILE_START(FILE) \ -do { \ - if (write_symbols == DBX_DEBUG) \ - { \ - alpha_write_verstamp (FILE); \ - output_file_directive (FILE, main_input_filename); \ - } \ - fprintf (FILE, "\t.set noat\n"); \ - fprintf (FILE, "\t.set noreorder\n"); \ - if (TARGET_EXPLICIT_RELOCS) \ - fprintf (FILE, "\t.set nomacro\n"); \ - if (TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX) \ - { \ - fprintf (FILE, "\t.arch %s\n", \ - (TARGET_CPU_EV6 ? "ev6" \ - : TARGET_MAX ? "pca56" : "ev56")); \ - } \ -} while (0) - #undef IDENT_ASM_OP #define IDENT_ASM_OP "\t.ident\t" @@ -81,7 +65,7 @@ do { \ #undef ASM_OUTPUT_SKIP #define ASM_OUTPUT_SKIP(FILE, SIZE) \ - fprintf (FILE, "%s%u\n", SKIP_ASM_OP, (SIZE)) + fprintf (FILE, "%s"HOST_WIDE_INT_PRINT_UNSIGNED"\n", SKIP_ASM_OP, (SIZE)) /* Output the label which precedes a jumptable. Note that for all svr4 systems where we actually generate jumptables (which is to say every @@ -103,7 +87,7 @@ do { \ #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \ do { \ ASM_OUTPUT_BEFORE_CASE_LABEL (FILE, PREFIX, NUM, JUMPTABLE) \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \ + (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \ } while (0) /* The standard SVR4 assembler seems to require that certain builtin @@ -127,7 +111,7 @@ do { \ do { \ fprintf ((FILE), "%s", COMMON_ASM_OP); \ assemble_name ((FILE), (NAME)); \ - fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \ + fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED ",%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \ } while (0) /* This says how to output assembler code to declare an @@ -156,7 +140,6 @@ do { \ #undef ASM_OUTPUT_ALIGNED_BSS #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ do { \ - (*targetm.asm_out.globalize_label) (FILE, NAME); \ ASM_OUTPUT_ALIGNED_LOCAL (FILE, NAME, SIZE, ALIGN); \ } while (0) @@ -166,7 +149,7 @@ do { \ not defined, the default value is `BIGGEST_ALIGNMENT'. This value is really 2^63. Since gcc figures the alignment in bits, - we could only potentially get to 2^60 on suitible hosts. Due to other + we could only potentially get to 2^60 on suitable hosts. Due to other considerations in varasm, we must restrict this to what fits in an int. */ #undef MAX_OFILE_ALIGNMENT @@ -227,12 +210,12 @@ do { \ SECTION_FUNCTION_TEMPLATE(sbss_section, in_sbss, SBSS_SECTION_ASM_OP) \ SECTION_FUNCTION_TEMPLATE(sdata_section, in_sdata, SDATA_SECTION_ASM_OP) -extern void sbss_section PARAMS ((void)); -extern void sdata_section PARAMS ((void)); +extern void sbss_section (void); +extern void sdata_section (void); #undef SECTION_FUNCTION_TEMPLATE #define SECTION_FUNCTION_TEMPLATE(FN, ENUM, OP) \ -void FN () \ +void FN (void) \ { \ if (in_section != ENUM) \ { \ @@ -406,14 +389,18 @@ void FN () \ /* Provide a STARTFILE_SPEC appropriate for ELF. Here we add the (even more) magical crtbegin.o file which provides part of the support for getting C++ file-scope static object constructed - before entering `main'. */ + before entering `main'. */ #undef STARTFILE_SPEC +#ifdef HAVE_LD_PIE +#define STARTFILE_SPEC \ + "%{!shared: %{pg|p:gcrt1.o%s;pie:Scrt1.o%s;:crt1.o%s}}\ + crti.o%s %{static:crtbeginT.o%s;shared|pie:crtbeginS.o%s;:crtbegin.o%s}" +#else #define STARTFILE_SPEC \ - "%{!shared: \ - %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} %{!p:crt1.o%s}}}\ - crti.o%s %{static:crtbeginT.o%s}\ - %{!static:%{shared:crtbeginS.o%s}%{!shared:crtbegin.o%s}}" + "%{!shared: %{pg|p:gcrt1.o%s;:crt1.o%s}}\ + crti.o%s %{static:crtbeginT.o%s;shared|pie:crtbeginS.o%s;:crtbegin.o%s}" +#endif /* Provide a ENDFILE_SPEC appropriate for ELF. Here we tack on the magical crtend.o file which provides part of the support for @@ -423,7 +410,7 @@ void FN () \ #undef ENDFILE_SPEC #define ENDFILE_SPEC \ "%{ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \ - %{shared:crtendS.o%s}%{!shared:crtend.o%s} crtn.o%s" + %{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s" /* We support #pragma. */ #define HANDLE_SYSV_PRAGMA 1 diff --git a/contrib/gcc/config/alpha/ev4.md b/contrib/gcc/config/alpha/ev4.md index 41e1efd..cee3ae6 100644 --- a/contrib/gcc/config/alpha/ev4.md +++ b/contrib/gcc/config/alpha/ev4.md @@ -1,20 +1,20 @@ ;; Scheduling description for Alpha EV4. ;; Copyright (C) 2002 Free Software Foundation, Inc. ;; -;; This file is part of GNU CC. +;; This file is part of GCC. ;; -;; GNU CC is free software; you can redistribute it and/or modify +;; GCC is free software; you can redistribute it and/or modify ;; it under the terms of the GNU General Public License as published by ;; the Free Software Foundation; either version 2, or (at your option) ;; any later version. ;; -;; GNU CC is distributed in the hope that it will be useful, +;; GCC is distributed in the hope that it will be useful, ;; but WITHOUT ANY WARRANTY; without even the implied warranty of ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;; GNU General Public License for more details. ;; ;; You should have received a copy of the GNU General Public License -;; along with GNU CC; see the file COPYING. If not, write to +;; along with GCC; see the file COPYING. If not, write to ;; the Free Software Foundation, 59 Temple Place - Suite 330, ;; Boston, MA 02111-1307, USA. diff --git a/contrib/gcc/config/alpha/ev5.md b/contrib/gcc/config/alpha/ev5.md index 832cf6b..20757e1 100644 --- a/contrib/gcc/config/alpha/ev5.md +++ b/contrib/gcc/config/alpha/ev5.md @@ -1,20 +1,20 @@ ;; Scheduling description for Alpha EV5. ;; Copyright (C) 2002 Free Software Foundation, Inc. ;; -;; This file is part of GNU CC. +;; This file is part of GCC. ;; -;; GNU CC is free software; you can redistribute it and/or modify +;; GCC is free software; you can redistribute it and/or modify ;; it under the terms of the GNU General Public License as published by ;; the Free Software Foundation; either version 2, or (at your option) ;; any later version. ;; -;; GNU CC is distributed in the hope that it will be useful, +;; GCC is distributed in the hope that it will be useful, ;; but WITHOUT ANY WARRANTY; without even the implied warranty of ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;; GNU General Public License for more details. ;; ;; You should have received a copy of the GNU General Public License -;; along with GNU CC; see the file COPYING. If not, write to +;; along with GCC; see the file COPYING. If not, write to ;; the Free Software Foundation, 59 Temple Place - Suite 330, ;; Boston, MA 02111-1307, USA. diff --git a/contrib/gcc/config/alpha/ev6.md b/contrib/gcc/config/alpha/ev6.md index 12204b6..23a09b0 100644 --- a/contrib/gcc/config/alpha/ev6.md +++ b/contrib/gcc/config/alpha/ev6.md @@ -1,20 +1,20 @@ ;; Scheduling description for Alpha EV6. ;; Copyright (C) 2002 Free Software Foundation, Inc. ;; -;; This file is part of GNU CC. +;; This file is part of GCC. ;; -;; GNU CC is free software; you can redistribute it and/or modify +;; GCC is free software; you can redistribute it and/or modify ;; it under the terms of the GNU General Public License as published by ;; the Free Software Foundation; either version 2, or (at your option) ;; any later version. ;; -;; GNU CC is distributed in the hope that it will be useful, +;; GCC is distributed in the hope that it will be useful, ;; but WITHOUT ANY WARRANTY; without even the implied warranty of ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;; GNU General Public License for more details. ;; ;; You should have received a copy of the GNU General Public License -;; along with GNU CC; see the file COPYING. If not, write to +;; along with GCC; see the file COPYING. If not, write to ;; the Free Software Foundation, 59 Temple Place - Suite 330, ;; Boston, MA 02111-1307, USA. diff --git a/contrib/gcc/config/alpha/freebsd.h b/contrib/gcc/config/alpha/freebsd.h index f809c62..0b29361 100644 --- a/contrib/gcc/config/alpha/freebsd.h +++ b/contrib/gcc/config/alpha/freebsd.h @@ -1,31 +1,35 @@ /* Definitions for DEC Alpha/AXP running FreeBSD using the ELF format - Copyright (C) 2000, 2002 Free Software Foundation, Inc. + Copyright (C) 2000, 2002, 2004 Free Software Foundation, Inc. Contributed by David E. O'Brien <obrien@FreeBSD.org> and BSDi. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +#undef SUBTARGET_EXTRA_SPECS +#define SUBTARGET_EXTRA_SPECS \ + { "fbsd_dynamic_linker", FBSD_DYNAMIC_LINKER } + /* Provide a FBSD_TARGET_CPU_CPP_BUILTINS and CPP_SPEC appropriate for FreeBSD/alpha. Besides the dealing with the GCC option `-posix', and PIC issues as on all FreeBSD platforms, we must deal with the Alpha's FP issues. */ -#undef FBSD_TARGET_CPU_CPP_BUILTINS +#undef FBSD_TARGET_CPU_CPP_BUILTINS #define FBSD_TARGET_CPU_CPP_BUILTINS() \ do \ { \ @@ -41,16 +45,16 @@ Boston, MA 02111-1307, USA. */ #define CPP_SPEC "%(cpp_subtarget) %{posix:-D_POSIX_SOURCE}" #define LINK_SPEC "%{G*} %{relax:-relax} \ - %{p:%e`-p' not supported; use `-pg' and gprof(1)} \ + %{p:%nconsider using `-pg' instead of `-p' with gprof(1)} \ %{Wl,*:%*} \ %{assert*} %{R*} %{rpath*} %{defsym*} \ %{shared:-Bshareable %{h*} %{soname*}} \ - %{symbolic:-Bsymbolic} \ %{!shared: \ %{!static: \ %{rdynamic:-export-dynamic} \ - %{!dynamic-linker:-dynamic-linker /usr/libexec/ld-elf.so.1}} \ - %{static:-Bstatic}}" + %{!dynamic-linker:-dynamic-linker %(fbsd_dynamic_linker) }} \ + %{static:-Bstatic}} \ + %{symbolic:-Bsymbolic}" /************************[ Target stuff ]***********************************/ diff --git a/contrib/gcc/config/alpha/gnu.h b/contrib/gcc/config/alpha/gnu.h index 9b25daf..40348c6 100644 --- a/contrib/gcc/config/alpha/gnu.h +++ b/contrib/gcc/config/alpha/gnu.h @@ -6,12 +6,8 @@ #undef TARGET_OS_CPP_BUILTINS /* config.gcc includes alpha/linux.h. */ #define TARGET_OS_CPP_BUILTINS() \ do { \ - builtin_define ("__GNU__"); \ - builtin_define ("__ELF__"); \ - builtin_define ("__gnu_hurd__"); \ + HURD_TARGET_OS_CPP_BUILTINS(); \ builtin_define ("_LONGLONG"); \ - builtin_define_std ("unix"); \ - builtin_assert ("system=gnu"); \ } while (0) #undef ELF_DYNAMIC_LINKER diff --git a/contrib/gcc/config/alpha/lib1funcs.asm b/contrib/gcc/config/alpha/lib1funcs.asm index 6bea231..a2abb1f 100644 --- a/contrib/gcc/config/alpha/lib1funcs.asm +++ b/contrib/gcc/config/alpha/lib1funcs.asm @@ -307,7 +307,7 @@ $46: conventions. */ #if TYPE == UNSIGNED && SIZE == 32 /* This could be avoided by adding some CPP hair to the divide loop. - It is probably not worth the added complexity. */ + It is probably not worth the added complexity. */ addl RETREG,0,RETREG #endif diff --git a/contrib/gcc/config/alpha/linux-elf.h b/contrib/gcc/config/alpha/linux-elf.h index 49f5181..025b9a2 100644 --- a/contrib/gcc/config/alpha/linux-elf.h +++ b/contrib/gcc/config/alpha/linux-elf.h @@ -3,20 +3,20 @@ Copyright (C) 1996, 1997 Free Software Foundation, Inc. Contributed by Richard Henderson. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -27,11 +27,7 @@ Boston, MA 02111-1307, USA. */ #define SUBTARGET_EXTRA_SPECS \ { "elf_dynamic_linker", ELF_DYNAMIC_LINKER }, -#ifdef USE_GNULIBC_1 -#define ELF_DYNAMIC_LINKER "/lib/ld.so.1" -#else #define ELF_DYNAMIC_LINKER "/lib/ld-linux.so.2" -#endif #define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax} \ %{O*:-O3} %{!O*:-O1} \ @@ -42,8 +38,8 @@ Boston, MA 02111-1307, USA. */ %{!dynamic-linker:-dynamic-linker %(elf_dynamic_linker)}} \ %{static:-static}}" -#ifndef USE_GNULIBC_1 #undef LIB_SPEC #define LIB_SPEC \ -"%{pthread:-lpthread }%{shared:-lc}%{!shared:%{profile:-lc_p}%{!profile:-lc}} " -#endif +"%{pthread:-lpthread} %{shared:-lc}%{!shared:%{profile:-lc_p}%{!profile:-lc}} " + +#define TARGET_ASM_FILE_END file_end_indicate_exec_stack diff --git a/contrib/gcc/config/alpha/linux.h b/contrib/gcc/config/alpha/linux.h index 3a2940c..a4bc3d3 100644 --- a/contrib/gcc/config/alpha/linux.h +++ b/contrib/gcc/config/alpha/linux.h @@ -1,22 +1,22 @@ /* Definitions of target machine for GNU compiler, for Alpha Linux-based GNU systems. - Copyright (C) 1996, 1997, 1998, 2002 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998, 2002, 2003 Free Software Foundation, Inc. Contributed by Richard Henderson. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -30,8 +30,10 @@ Boston, MA 02111-1307, USA. */ builtin_define_std ("linux"); \ builtin_define_std ("unix"); \ builtin_assert ("system=linux"); \ + builtin_assert ("system=unix"); \ + builtin_assert ("system=posix"); \ /* The GNU C++ standard library requires this. */ \ - if (c_language == clk_cplusplus) \ + if (c_dialect_cxx ()) \ builtin_define ("_GNU_SOURCE"); \ } while (0) @@ -59,6 +61,10 @@ Boston, MA 02111-1307, USA. */ /* Define this so that all GNU/Linux targets handle the same pragmas. */ #define HANDLE_PRAGMA_PACK_PUSH_POP +/* Determine whether the the entire c99 runtime is present in the + runtime library. */ +#define TARGET_C99_FUNCTIONS 1 + #define TARGET_HAS_F_SETLKW #define LINK_GCC_C_SEQUENCE_SPEC \ diff --git a/contrib/gcc/config/alpha/netbsd.h b/contrib/gcc/config/alpha/netbsd.h index e1da9cf..d4f833a 100644 --- a/contrib/gcc/config/alpha/netbsd.h +++ b/contrib/gcc/config/alpha/netbsd.h @@ -1,21 +1,21 @@ /* Definitions of target machine for GNU compiler, for Alpha NetBSD systems. - Copyright (C) 1998, 2002 Free Software Foundation, Inc. + Copyright (C) 1998, 2002, 2003 Free Software Foundation, Inc. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -25,7 +25,6 @@ Boston, MA 02111-1307, USA. */ #define TARGET_OS_CPP_BUILTINS() \ do { \ NETBSD_OS_CPP_BUILTINS_ELF(); \ - NETBSD_OS_CPP_BUILTINS_LP64(); \ } while (0) @@ -77,7 +76,7 @@ Boston, MA 02111-1307, USA. */ /* Attempt to enable execute permissions on the stack. */ -#define TRANSFER_FROM_TRAMPOLINE NETBSD_ENABLE_EXECUTE_STACK +#define ENABLE_EXECUTE_STACK NETBSD_ENABLE_EXECUTE_STACK #undef TARGET_VERSION diff --git a/contrib/gcc/config/alpha/openbsd.h b/contrib/gcc/config/alpha/openbsd.h index b82b66d..b9df2e4 100644 --- a/contrib/gcc/config/alpha/openbsd.h +++ b/contrib/gcc/config/alpha/openbsd.h @@ -1,36 +1,26 @@ /* Configuration file for an alpha OpenBSD target. - Copyright (C) 1999 Free Software Foundation, Inc. + Copyright (C) 1999, 2003 Free Software Foundation, Inc. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* We settle for little endian for now. */ #define TARGET_ENDIAN_DEFAULT 0 -#define OBSD_NO_DYNAMIC_LIBRARIES -#define OBSD_HAS_DECLARE_FUNCTION_NAME -#define OBSD_HAS_DECLARE_FUNCTION_SIZE -#define OBSD_HAS_DECLARE_OBJECT - -/* alpha ecoff supports only weak aliases, see below. */ -#define ASM_WEAKEN_LABEL(FILE,NAME) ASM_OUTPUT_WEAK_ALIAS (FILE,NAME,0) - -#include <openbsd.h> - /* Controlling the compilation driver. */ /* alpha needs __start. */ @@ -82,38 +72,18 @@ Boston, MA 02111-1307, USA. */ /* Assembler format: exception region output. */ /* All configurations that don't use elf must be explicit about not using - dwarf unwind information. egcs doesn't try too hard to check internal - configuration files... */ + dwarf unwind information. */ #ifdef INCOMING_RETURN_ADDR_RTX #undef DWARF2_UNWIND_INFO #define DWARF2_UNWIND_INFO 0 #endif -/* Assembler format: file framework. */ - -/* Taken from alpha/osf.h. This used to be common to all alpha - configurations, but elf has departed from it. - Check alpha/alpha.h, alpha/osf.h for it when egcs is upgraded. */ -#ifndef ASM_FILE_START -#define ASM_FILE_START(FILE) \ -{ \ - alpha_write_verstamp (FILE); \ - fprintf (FILE, "\t.set noreorder\n"); \ - fprintf (FILE, "\t.set volatile\n"); \ - fprintf (FILE, "\t.set noat\n"); \ - if (TARGET_SUPPORT_ARCH) \ - fprintf (FILE, "\t.arch %s\n", \ - TARGET_CPU_EV6 ? "ev6" \ - : (TARGET_CPU_EV5 \ - ? (TARGET_MAX ? "pca56" : TARGET_BWX ? "ev56" : "ev5") \ - : "ev4")); \ - \ - ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \ -} -#endif - /* Assembler format: label output. */ +/* alpha ecoff supports only weak aliases. */ +#undef ASM_WEAKEN_LABEL +#define ASM_WEAKEN_LABEL(FILE,NAME) ASM_OUTPUT_WEAK_ALIAS (FILE,NAME,0) + #define ASM_OUTPUT_WEAK_ALIAS(FILE,NAME,VALUE) \ do { \ fputs ("\t.weakext\t", FILE); \ diff --git a/contrib/gcc/config/alpha/osf.h b/contrib/gcc/config/alpha/osf.h index 2be2a42..1ae6db3 100644 --- a/contrib/gcc/config/alpha/osf.h +++ b/contrib/gcc/config/alpha/osf.h @@ -1,22 +1,22 @@ /* Definitions of target machine for GNU compiler, for DEC Alpha on OSF/1. - Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2001, 2002, 2003 - Free Software Foundation, Inc. + Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2001, 2002, 2003, + 2004 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -49,6 +49,13 @@ Boston, MA 02111-1307, USA. */ to be defined for <math.h>. */ \ if (LONG_DOUBLE_TYPE_SIZE == 128) \ builtin_define ("__X_FLOAT"); \ + \ + /* Tru64 UNIX V4/V5 provide several ISO C94 \ + features protected by the corresponding \ + __STDC_VERSION__ macro. libstdc++ v3 \ + needs them as well. */ \ + if (c_dialect_cxx ()) \ + builtin_define ("__STDC_VERSION__=199409L"); \ } while (0) /* Accept DEC C flags for multithreaded programs. We use _PTHREAD_USE_D4 @@ -84,22 +91,6 @@ Boston, MA 02111-1307, USA. */ #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/" -#define ASM_FILE_START(FILE) \ -{ \ - alpha_write_verstamp (FILE); \ - fprintf (FILE, "\t.set noreorder\n"); \ - fprintf (FILE, "\t.set volatile\n"); \ - fprintf (FILE, "\t.set noat\n"); \ - if (TARGET_SUPPORT_ARCH) \ - fprintf (FILE, "\t.arch %s\n", \ - TARGET_CPU_EV6 ? "ev6" \ - : (TARGET_CPU_EV5 \ - ? (TARGET_MAX ? "pca56" : TARGET_BWX ? "ev56" : "ev5") \ - : "ev4")); \ - \ - ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \ -} - /* Tru64 UNIX V5.1 requires a special as flag. Empty by default. */ #define ASM_OLDAS_SPEC "" @@ -154,14 +145,11 @@ Boston, MA 02111-1307, USA. */ /* Attempt to turn on access permissions for the stack. */ -#define TRANSFER_FROM_TRAMPOLINE \ -extern void __enable_execute_stack PARAMS ((void *)); \ - \ +#define ENABLE_EXECUTE_STACK \ void \ -__enable_execute_stack (addr) \ - void *addr; \ +__enable_execute_stack (void *addr) \ { \ - extern int mprotect PARAMS ((const void *, size_t, int)); \ + extern int mprotect (const void *, size_t, int); \ long size = getpagesize (); \ long mask = ~(size-1); \ char *page = (char *) (((long) addr) & mask); \ @@ -181,6 +169,10 @@ __enable_execute_stack (addr) \ #define LD_INIT_SWITCH "-init" #define LD_FINI_SWITCH "-fini" +/* The linker needs a space after "-o". This allows -oldstyle_liblookup to + be passed to ld. */ +#define SWITCHES_NEED_SPACES "o" + /* Select a format to encode pointers in exception handling data. CODE is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is true if the symbol may be affected by dynamic relocations. diff --git a/contrib/gcc/config/alpha/osf5.h b/contrib/gcc/config/alpha/osf5.h index e483124..e96ae7e 100644 --- a/contrib/gcc/config/alpha/osf5.h +++ b/contrib/gcc/config/alpha/osf5.h @@ -1,29 +1,26 @@ /* Definitions of target machine for GNU compiler, for DEC Alpha on Tru64 5. - Copyright (C) 2000, 2001 Free Software Foundation, Inc. + Copyright (C) 2000, 2001, 2004 Free Software Foundation, Inc. - This file is part of GNU CC. + This file is part of GCC. - GNU CC is free software; you can redistribute it and/or modify + GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. - GNU CC is distributed in the hope that it will be useful, + GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License - along with GNU CC; see the file COPYING. If not, write to + along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* Tru64 5.1 uses IEEE QUAD format. */ -/* ??? However, since there is no support for VAX H_floating, we must - drop back to a 64-bit long double to avoid a crash looking for the - format associated with TFmode. */ -#undef LONG_DOUBLE_TYPE_SIZE -#define LONG_DOUBLE_TYPE_SIZE (TARGET_FLOAT_VAX ? 64 : 128) +#undef TARGET_DEFAULT +#define TARGET_DEFAULT MASK_FP | MASK_FPREGS | MASK_LONG_DOUBLE_128 /* In Tru64 UNIX V5.1, Compaq introduced a new assembler (/usr/lib/cmplrs/cc/adu) which currently (versions between 3.04.29 and @@ -49,3 +46,8 @@ linked. */ #undef TARGET_LD_BUGGY_LDGP #define TARGET_LD_BUGGY_LDGP 1 + +/* Tru64 v5.1 has the float and long double forms of math functions. */ +#undef TARGET_C99_FUNCTIONS +#define TARGET_C99_FUNCTIONS 1 + diff --git a/contrib/gcc/config/alpha/t-osf-pthread b/contrib/gcc/config/alpha/t-osf-pthread new file mode 100644 index 0000000..968e65c --- /dev/null +++ b/contrib/gcc/config/alpha/t-osf-pthread @@ -0,0 +1,5 @@ +# Provide dummy POSIX threads functions +LIB2FUNCS_EXTRA += $(srcdir)/gthr-posix.c + +# Compile libgcc2 with POSIX threads supports +TARGET_LIBGCC2_CFLAGS=-pthread diff --git a/contrib/gcc/config/alpha/t-osf4 b/contrib/gcc/config/alpha/t-osf4 index 0525d61..fe747a3 100644 --- a/contrib/gcc/config/alpha/t-osf4 +++ b/contrib/gcc/config/alpha/t-osf4 @@ -10,7 +10,11 @@ SHLIB_NAME = @shlib_base_name@.so SHLIB_SONAME = @shlib_base_name@.so.1 SHLIB_OBJS = @shlib_objs@ +# Hide all POSIX threads related symbols provided by gthr-posix.c. This +# only has an effect if t-osf-pthread is in use. SHLIB_LINK = $(GCC_FOR_TARGET) $(LIBGCC2_CFLAGS) -shared -nodefaultlibs \ + -Wl,-hidden_symbol,pthread\* -Wl,-hidden_symbol,__pthread\* \ + -Wl,-hidden_symbol,sched_get_\* -Wl,-hidden_symbol,sched_yield \ -Wl,-msym -Wl,-set_version,gcc.1 -Wl,-soname,$(SHLIB_SONAME) \ -o $(SHLIB_NAME) @multilib_flags@ $(SHLIB_OBJS) -lc && \ rm -f $(SHLIB_SONAME) && \ diff --git a/contrib/gcc/config/alpha/unicosmk.h b/contrib/gcc/config/alpha/unicosmk.h index 8f7b53d..9d966d6 100644 --- a/contrib/gcc/config/alpha/unicosmk.h +++ b/contrib/gcc/config/alpha/unicosmk.h @@ -4,20 +4,20 @@ Free Software Foundation, Inc. Contributed by Roman Lechtchinsky (rl@cs.tu-berlin.de) -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -102,8 +102,6 @@ Boston, MA 02111-1307, USA. */ other its replacement, at the start of a routine. This is somewhat complicated on the T3E which is why we use a function. */ -extern int unicosmk_initial_elimination_offset PARAMS ((int, int)); - #undef INITIAL_ELIMINATION_OFFSET #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ do { \ @@ -178,7 +176,7 @@ typedef struct { function whose data type is FNTYPE. For a library call, FNTYPE is 0. */ #undef INIT_CUMULATIVE_ARGS -#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ +#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ do { (CUM).num_args = 0; \ (CUM).num_arg_words = 0; \ (CUM).num_reg_words = 0; \ @@ -220,41 +218,11 @@ do { \ ++(CUM).num_args; \ } while(0) -/* We want the default definition for this. - ??? In fact, we should delete the definition from alpha.h as it - corresponds to the default definition for little-endian machines. */ - -#undef FUNCTION_ARG_PADDING - /* An argument is passed either entirely in registers or entirely on stack. */ #undef FUNCTION_ARG_PARTIAL_NREGS /* #define FUNCTION_ARG_PARTIAL_NREGS(CUM,MODE,TYPE,NAMED) 0 */ -/* Perform any needed actions needed for a function that is receiving a - variable number of arguments. - - On Unicos/Mk, the standard subroutine __T3E_MISMATCH stores all register - arguments on the stack. Unfortunately, it doesn't always store the first - one (i.e. the one that arrives in $16 or $f16). This is not a problem - with stdargs as we always have at least one named argument there. */ - -#undef SETUP_INCOMING_VARARGS -#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ -{ if ((CUM).num_reg_words < 6) \ - { \ - if (! (NO_RTL)) \ - { \ - int start = (CUM).num_reg_words + 1; \ - \ - emit_insn (gen_umk_mismatch_args (GEN_INT (start))); \ - emit_insn (gen_arg_home_umk ()); \ - } \ - \ - PRETEND_SIZE = 0; \ - } \ -} - /* This ensures that $15 increments/decrements in leaf functions won't get eliminated. */ @@ -319,43 +287,33 @@ do { fprintf (FILE, "\tbr $1,0\n"); \ COMMON_SECTION \ SSIB_SECTION -extern void common_section PARAMS ((void)); +extern void common_section (void); #define COMMON_SECTION \ void \ -common_section () \ +common_section (void) \ { \ in_section = in_common; \ } -extern void ssib_section PARAMS ((void)); +extern void ssib_section (void); #define SSIB_SECTION \ void \ -ssib_section () \ +ssib_section (void) \ { \ in_section = in_ssib; \ } -/* This outputs text to go at the start of an assembler file. */ - -#undef ASM_FILE_START -#define ASM_FILE_START(FILE) unicosmk_asm_file_start (FILE) - -/* This outputs text to go at the end of an assembler file. */ - -#undef ASM_FILE_END -#define ASM_FILE_END(FILE) unicosmk_asm_file_end (FILE) - -/* We take care of that in ASM_FILE_START. */ +/* We take care of this in unicosmk_file_start. */ #undef ASM_OUTPUT_SOURCE_FILENAME /* This is how to output a label for a jump table. Arguments are the same as - for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is + for (*targetm.asm_out.internal_label), except the insn for the jump table is passed. */ #undef ASM_OUTPUT_CASE_LABEL #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM) + (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM) /* CAM has some restrictions with respect to string literals. It won't accept lines with more that 256 characters which means that we have @@ -453,7 +411,8 @@ ssib_section () \ #undef ASM_OUTPUT_SKIP #define ASM_OUTPUT_SKIP(STREAM,SIZE) \ - fprintf ((STREAM), "\t.byte\t0:%d\n", (SIZE)); + fprintf ((STREAM), "\t.byte\t0:"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\ + (SIZE)); /* This says how to output an assembler line to define a global common symbol. We need the alignment information because it has to be supplied @@ -470,7 +429,7 @@ ssib_section () \ do { data_section (); \ fprintf (FILE, "\t.align\t%d\n", floor_log2 ((ALIGN) / BITS_PER_UNIT));\ ASM_OUTPUT_LABEL ((FILE), (NAME)); \ - fprintf (FILE, "\t.byte 0:%d\n", SIZE); \ + fprintf (FILE, "\t.byte 0:"HOST_WIDE_INT_PRINT_UNSIGNED"\n",(SIZE));\ } while (0) /* CAM does not allow us to declare a symbol as external first and then @@ -521,28 +480,9 @@ ssib_section () \ #undef SDB_DEBUGGING_INFO #undef MIPS_DEBUGGING_INFO #undef DBX_DEBUGGING_INFO -#undef DWARF_DEBUGGING_INFO #undef DWARF2_DEBUGGING_INFO #undef DWARF2_UNWIND_INFO #undef INCOMING_RETURN_ADDR_RTX - - -/* We use the functions provided by the system library for integer - division. */ - -#undef UDIVDI3_LIBCALL -#undef DIVDI3_LIBCALL -#define UDIVDI3_LIBCALL "$uldiv" -#define DIVDI3_LIBCALL "$sldiv" - -/* This is necessary to prevent gcc from generating calls to __divsi3. */ - -#define INIT_TARGET_OPTABS \ - do { \ - sdiv_optab->handlers[(int) SImode].libfunc = NULL_RTX; \ - udiv_optab->handlers[(int) SImode].libfunc = NULL_RTX; \ - } while (0) - #undef ASM_OUTPUT_SOURCE_LINE /* We don't need a start file. */ @@ -555,7 +495,6 @@ ssib_section () \ #undef LIB_SPEC #define LIB_SPEC "-L/opt/ctl/craylibs/craylibs -lu -lm -lc -lsma" -#undef BUILD_VA_LIST_TYPE #undef EXPAND_BUILTIN_VA_START #undef EXPAND_BUILTIN_VA_ARG diff --git a/contrib/gcc/config/alpha/vms-cc.c b/contrib/gcc/config/alpha/vms-cc.c index 26c3ae3..672a30f 100644 --- a/contrib/gcc/config/alpha/vms-cc.c +++ b/contrib/gcc/config/alpha/vms-cc.c @@ -1,21 +1,21 @@ /* VMS DEC C wrapper. - Copyright (C) 2001 Free Software Foundation, Inc. + Copyright (C) 2001, 2003 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -25,6 +25,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #undef PATH_SEPARATOR #undef PATH_SEPARATOR_STR @@ -32,50 +34,47 @@ Boston, MA 02111-1307, USA. */ #define PATH_SEPARATOR_STR "," /* These can be set by command line arguments */ -int verbose = 0; -int save_temps = 0; +static int verbose = 0; +static int save_temps = 0; -int comp_arg_max = -1; -const char **comp_args = 0; -int comp_arg_index = -1; -char *objfilename = 0; +static int comp_arg_max = -1; +static const char **comp_args = 0; +static int comp_arg_index = -1; +static char *objfilename = 0; -char *system_search_dirs = (char *) ""; -char *search_dirs; +static char *system_search_dirs = (char *) ""; +static char *search_dirs; -char *default_defines = (char *) ""; -char *defines; +static char *default_defines = (char *) ""; +static char *defines; /* Translate a Unix syntax directory specification into VMS syntax. - If indicators of VMS syntax found, return input string. */ -static char *to_host_dir_spec PARAMS ((char *)); + If indicators of VMS syntax found, return input string. */ +static char *to_host_dir_spec (char *); /* Translate a Unix syntax file specification into VMS syntax. - If indicators of VMS syntax found, return input string. */ -static char *to_host_file_spec PARAMS ((char *)); + If indicators of VMS syntax found, return input string. */ +static char *to_host_file_spec (char *); -/* Add a translated arg to the list to be passed to DEC CC */ -static void addarg PARAMS ((const char *)); +/* Add a translated arg to the list to be passed to DEC CC. */ +static void addarg (const char *); /* Preprocess the number of args in P_ARGC and contained in ARGV. - Look for special flags, etc. that must be handled first. */ -static void preprocess_args PARAMS ((int *, char **)); + Look for special flags, etc. that must be handled first. */ +static void preprocess_args (int *, char **); /* Process the number of args in P_ARGC and contained in ARGV. Look - for special flags, etc. that must be handled for the VMS compiler. */ -static void process_args PARAMS ((int *, char **)); + for special flags, etc. that must be handled for the VMS compiler. */ +static void process_args (int *, char **); /* Action routine called by decc$to_vms */ -static int translate_unix PARAMS ((char *, int)); - -int main PARAMS ((int, char **)); +static int translate_unix (char *, int); /* Add the argument contained in STR to the list of arguments to pass to the compiler. */ static void -addarg (str) - const char *str; +addarg (const char *str) { int i; @@ -98,9 +97,7 @@ addarg (str) } static void -preprocess_args (p_argc, argv) - int *p_argc; - char *argv[]; +preprocess_args (int *p_argc, char *argv[]) { int i; @@ -120,9 +117,7 @@ preprocess_args (p_argc, argv) } static void -process_args (p_argc, argv) - int *p_argc; - char *argv[]; +process_args (int *p_argc, char *argv[]) { int i; @@ -183,9 +178,7 @@ process_args (p_argc, argv) typedef struct dsc {unsigned short len, mbz; char *adr; } Descr; int -main (argc, argv) - int argc; - char **argv; +main (int argc, char **argv) { int i; char cwdev [128], *devptr; @@ -318,17 +311,14 @@ static char new_host_dirspec [255]; static char filename_buff [256]; static int -translate_unix (name, type) - char *name; - int type ATTRIBUTE_UNUSED; +translate_unix (char *name, int type ATTRIBUTE_UNUSED) { strcpy (filename_buff, name); return 0; } static char * -to_host_dir_spec (dirspec) - char *dirspec; +to_host_dir_spec (char *dirspec) { int len = strlen (dirspec); @@ -351,8 +341,7 @@ to_host_dir_spec (dirspec) } static char * -to_host_file_spec (filespec) - char *filespec; +to_host_file_spec (char *filespec) { strcpy (new_host_filespec, ""); if (strchr (filespec, ']') || strchr (filespec, ':')) diff --git a/contrib/gcc/config/alpha/vms-crt0-64.c b/contrib/gcc/config/alpha/vms-crt0-64.c index 82ba322..9792f92 100644 --- a/contrib/gcc/config/alpha/vms-crt0-64.c +++ b/contrib/gcc/config/alpha/vms-crt0-64.c @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -77,7 +77,7 @@ __main (arg1, arg2, arg3, image_file_desc, arg5, arg6) #pragma __pointer_size long - /* Reallocate argv with 64 bit pointers. */ + /* Reallocate argv with 64 bit pointers. */ long_argv = (char **) malloc (sizeof (char *) * (argc + 1)); for (i = 0; i < argc; i++) diff --git a/contrib/gcc/config/alpha/vms-crt0.c b/contrib/gcc/config/alpha/vms-crt0.c index b7665f9..88896c6 100644 --- a/contrib/gcc/config/alpha/vms-crt0.c +++ b/contrib/gcc/config/alpha/vms-crt0.c @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -33,7 +33,7 @@ You Lose! This file can only be compiled with DEC C. #else /* This file can only be compiled with DEC C, due to the call to - lib$establish. */ + lib$establish. */ #include <stdlib.h> #include <string.h> diff --git a/contrib/gcc/config/alpha/vms-dwarf2.asm b/contrib/gcc/config/alpha/vms-dwarf2.asm index a94ae24..1f68a80 100644 --- a/contrib/gcc/config/alpha/vms-dwarf2.asm +++ b/contrib/gcc/config/alpha/vms-dwarf2.asm @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ diff --git a/contrib/gcc/config/alpha/vms-dwarf2eh.asm b/contrib/gcc/config/alpha/vms-dwarf2eh.asm index 22f7050..2cdbeb1 100644 --- a/contrib/gcc/config/alpha/vms-dwarf2eh.asm +++ b/contrib/gcc/config/alpha/vms-dwarf2eh.asm @@ -2,9 +2,9 @@ Copyright (C) 2002 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ diff --git a/contrib/gcc/config/alpha/vms-ld.c b/contrib/gcc/config/alpha/vms-ld.c index e5688d8..cb1d4c9 100644 --- a/contrib/gcc/config/alpha/vms-ld.c +++ b/contrib/gcc/config/alpha/vms-ld.c @@ -1,22 +1,22 @@ /* VMS linker wrapper. - Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002 + Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -26,6 +26,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" typedef struct dsc {unsigned short len, mbz; char *adr; } Descr; @@ -42,7 +44,7 @@ static char *vmsdwarf2spec = 0; /* File specification for vms-dwarf2eh.o. */ static char *vmsdwarf2ehspec = 0; -/* verbose = 1 if -v passed. */ +/* verbose = 1 if -v passed. */ static int verbose = 0; /* save_temps = 1 if -save-temps passed. */ @@ -87,39 +89,38 @@ static char *search_dirs; /* Add STR to the list of arguments to pass to the linker. Expand the list as necessary to accommodate. */ -static void addarg PARAMS ((const char *)); +static void addarg (const char *); /* Check to see if NAME is a regular file, i.e. not a directory */ -static int is_regular_file PARAMS ((char *)); +static int is_regular_file (char *); /* Translate a Unix syntax file specification FILESPEC into VMS syntax. - If indicators of VMS syntax found, return input string. */ -static char *to_host_file_spec PARAMS ((char *)); + If indicators of VMS syntax found, return input string. */ +static char *to_host_file_spec (char *); -/* Locate the library named LIB_NAME in the set of paths PATH_VAL. */ -static char *locate_lib PARAMS ((char *, char *)); +/* Locate the library named LIB_NAME in the set of paths PATH_VAL. */ +static char *locate_lib (char *, char *); /* Given a library name NAME, i.e. foo, Look for libfoo.lib and then libfoo.a in the set of directories we are allowed to search in. */ -static const char *expand_lib PARAMS ((char *)); +static const char *expand_lib (char *); /* Preprocess the number of args P_ARGC in ARGV. - Look for special flags, etc. that must be handled first. */ -static void preprocess_args PARAMS ((int *, char **)); + Look for special flags, etc. that must be handled first. */ +static void preprocess_args (int *, char **); /* Preprocess the number of args P_ARGC in ARGV. Look for - special flags, etc. that must be handled for the VMS linker. */ -static void process_args PARAMS ((int *, char **)); + special flags, etc. that must be handled for the VMS linker. */ +static void process_args (int *, char **); /* Action routine called by decc$to_vms. NAME is a file name or - directory name. TYPE is unused. */ -static int translate_unix PARAMS ((char *, int)); + directory name. TYPE is unused. */ +static int translate_unix (char *, int); -int main PARAMS ((int, char **)); +int main (int, char **); static void -addarg (str) - const char *str; +addarg (const char *str) { int i; @@ -142,9 +143,7 @@ addarg (str) } static char * -locate_lib (lib_name, path_val) - char *lib_name; - char *path_val; +locate_lib (char *lib_name, char *path_val) { int lib_len = strlen (lib_name); char *eptr, *sptr; @@ -204,8 +203,7 @@ locate_lib (lib_name, path_val) } static const char * -expand_lib (name) - char *name; +expand_lib (char *name) { char *lib, *lib_path; @@ -238,8 +236,7 @@ expand_lib (name) } static int -is_regular_file (name) - char *name; +is_regular_file (char *name) { int ret; struct stat statbuf; @@ -249,9 +246,7 @@ is_regular_file (name) } static void -preprocess_args (p_argc, argv) - int *p_argc; - char **argv; +preprocess_args (int *p_argc, char **argv) { int i; @@ -303,9 +298,7 @@ preprocess_args (p_argc, argv) } static void -process_args (p_argc, argv) - int *p_argc; - char **argv; +process_args (int *p_argc, char **argv) { int i; @@ -379,9 +372,7 @@ process_args (p_argc, argv) and args to be what the VMS linker wants. */ int -main (argc, argv) - int argc; - char **argv; +main (int argc, char **argv) { int i; char cwdev [128], *devptr; @@ -751,17 +742,14 @@ static char new_host_filespec [255]; static char filename_buff [256]; static int -translate_unix (name, type) - char *name; - int type ATTRIBUTE_UNUSED; +translate_unix (char *name, int type ATTRIBUTE_UNUSED) { strcpy (filename_buff, name); return 0; } static char * -to_host_file_spec (filespec) - char *filespec; +to_host_file_spec (char *filespec) { strcpy (new_host_filespec, ""); if (strchr (filespec, ']') || strchr (filespec, ':')) diff --git a/contrib/gcc/config/alpha/vms-psxcrt0-64.c b/contrib/gcc/config/alpha/vms-psxcrt0-64.c index b16e8b4..8ca9e1d 100644 --- a/contrib/gcc/config/alpha/vms-psxcrt0-64.c +++ b/contrib/gcc/config/alpha/vms-psxcrt0-64.c @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -79,7 +79,7 @@ __main (arg1, arg2, arg3, image_file_desc, arg5, arg6) #pragma __pointer_size long - /* Reallocate argv with 64 bit pointers. */ + /* Reallocate argv with 64 bit pointers. */ long_argv = (char **) malloc (sizeof (char *) * (argc + 1)); for (i = 0; i < argc; i++) diff --git a/contrib/gcc/config/alpha/vms-psxcrt0.c b/contrib/gcc/config/alpha/vms-psxcrt0.c index c4140b4..65962ee 100644 --- a/contrib/gcc/config/alpha/vms-psxcrt0.c +++ b/contrib/gcc/config/alpha/vms-psxcrt0.c @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -33,7 +33,7 @@ You Lose! This file can only be compiled with DEC C. #else /* This file can only be compiled with DEC C, due to the call to - lib$establish. */ + lib$establish. */ #include <stdlib.h> #include <string.h> diff --git a/contrib/gcc/config/alpha/vms.h b/contrib/gcc/config/alpha/vms.h index 8df6156..f7058f3 100644 --- a/contrib/gcc/config/alpha/vms.h +++ b/contrib/gcc/config/alpha/vms.h @@ -1,21 +1,21 @@ /* Output variables, constants and external declarations, for GNU compiler. - Copyright (C) 1996, 1997, 1998, 2000, 2001, 2002 + Copyright (C) 1996, 1997, 1998, 2000, 2001, 2002, 2004 Free Software Foundation, Inc. -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ @@ -41,9 +41,6 @@ Boston, MA 02111-1307, USA. */ builtin_define ("__IEEE_FLOAT"); \ } while (0) -/* By default, allow $ to be part of an identifier. */ -#define DOLLARS_IN_IDENTIFIERS 2 - #undef TARGET_DEFAULT #define TARGET_DEFAULT (MASK_FP|MASK_FPREGS|MASK_GAS) #undef TARGET_ABI_OPEN_VMS @@ -54,9 +51,6 @@ Boston, MA 02111-1307, USA. */ #undef TARGET_VERSION #define TARGET_VERSION fprintf (stderr, " (%s)", TARGET_NAME); -/* The structure return address arrives as an "argument" on VMS. */ -#undef STRUCT_VALUE_REGNUM -#define STRUCT_VALUE 0 #undef PCC_STATIC_STRUCT_RETURN /* "long" is 32 bits, but 64 bits for Ada. */ @@ -178,7 +172,7 @@ typedef struct {int num_args; enum avms_arg_type atypes[6];} avms_arg_info; For a library call, FNTYPE is 0. */ #undef INIT_CUMULATIVE_ARGS -#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ +#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ (CUM).num_args = 0; \ (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \ (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; @@ -205,61 +199,10 @@ typedef struct {int num_args; enum avms_arg_type atypes[6];} avms_arg_info; + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \ ? 6 - (CUM).num_args : 0) -/* Perform any needed actions needed for a function that is receiving a - variable number of arguments. - - CUM is as for INIT_CUMULATIVE_ARGS. - - MODE and TYPE are the mode and type of the current parameter. - - PRETEND_SIZE is a variable that should be set to the amount of stack - that must be pushed by the prolog to pretend that our caller pushed - it. - - Normally, this macro will push all remaining incoming registers on the - stack and set PRETEND_SIZE to the length of the registers pushed. - - For VMS, we allocate space for all 6 arg registers plus a count. - - However, if NO registers need to be saved, don't allocate any space. - This is not only because we won't need the space, but because AP includes - the current_pretend_args_size and we don't want to mess up any - ap-relative addresses already made. */ - -#undef SETUP_INCOMING_VARARGS -#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ -{ if ((CUM).num_args < 6) \ - { \ - if (! (NO_RTL)) \ - { \ - emit_move_insn (gen_rtx_REG (DImode, 1), \ - virtual_incoming_args_rtx); \ - emit_insn (gen_arg_home ()); \ - } \ - \ - PRETEND_SIZE = 7 * UNITS_PER_WORD; \ - } \ -} - /* ABI has stack checking, but it's broken. */ #undef STACK_CHECK_BUILTIN #define STACK_CHECK_BUILTIN 0 -#undef ASM_FILE_START -#define ASM_FILE_START(FILE) \ -{ \ - alpha_write_verstamp (FILE); \ - fprintf (FILE, "\t.set noreorder\n"); \ - fprintf (FILE, "\t.set volatile\n"); \ - if (TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX) \ - { \ - fprintf (FILE, "\t.arch %s\n", \ - (TARGET_CPU_EV6 ? "ev6" \ - : TARGET_MAX ? "pca56" : "ev56")); \ - } \ - ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \ -} - #define LINK_SECTION_ASM_OP "\t.link" #define READONLY_DATA_SECTION_ASM_OP "\t.rdata" #define LITERALS_SECTION_ASM_OP "\t.literals" @@ -272,7 +215,7 @@ typedef struct {int num_args; enum avms_arg_type atypes[6];} avms_arg_info; #undef EXTRA_SECTION_FUNCTIONS #define EXTRA_SECTION_FUNCTIONS \ void \ -link_section () \ +link_section (void) \ { \ if (in_section != in_link) \ { \ @@ -281,7 +224,7 @@ link_section () \ } \ } \ void \ -literals_section () \ +literals_section (void) \ { \ if (in_section != in_literals) \ { \ @@ -290,8 +233,8 @@ literals_section () \ } \ } -extern void link_section PARAMS ((void)); -extern void literals_section PARAMS ((void)); +extern void link_section (void); +extern void literals_section (void); #undef ASM_OUTPUT_ADDR_DIFF_ELT #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) abort () @@ -306,7 +249,7 @@ extern void literals_section PARAMS ((void)); #undef ASM_OUTPUT_CASE_LABEL #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ -{ ASM_OUTPUT_ALIGN (FILE, 3); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } +{ ASM_OUTPUT_ALIGN (FILE, 3); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); } /* This says how to output assembler code to declare an uninitialized external linkage data object. */ @@ -318,7 +261,7 @@ extern void literals_section PARAMS ((void)); do { \ fprintf ((FILE), "%s", COMMON_ASM_OP); \ assemble_name ((FILE), (NAME)); \ - fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \ + fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED ",%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \ } while (0) @@ -448,10 +391,7 @@ do { \ #undef PREFERRED_DEBUGGING_TYPE #define PREFERRED_DEBUGGING_TYPE VMS_AND_DWARF2_DEBUG -#undef ASM_FORMAT_PRIVATE_NAME -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \ - sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s___%lu" /* ??? VMS uses different linkage. */ #undef TARGET_ASM_OUTPUT_MI_THUNK @@ -479,7 +419,7 @@ do { \ } /* Link with vms-dwarf2.o if -g (except -g0). This causes the - VMS link to pull all the dwarf2 debug sections together. */ + VMS link to pull all the dwarf2 debug sections together. */ #undef LINK_SPEC #define LINK_SPEC "%{g:-g vms-dwarf2.o%s} %{g0} %{g1:-g1 vms-dwarf2.o%s} \ %{g2:-g2 vms-dwarf2.o%s} %{g3:-g3 vms-dwarf2.o%s} %{shared} %{v} %{map}" @@ -491,16 +431,6 @@ do { \ #undef LIB_SPEC #define LIB_SPEC "-lc" -/* Define the names of the division and modulus functions. */ -#define DIVSI3_LIBCALL "OTS$DIV_I" -#define DIVDI3_LIBCALL "OTS$DIV_L" -#define UDIVSI3_LIBCALL "OTS$DIV_UI" -#define UDIVDI3_LIBCALL "OTS$DIV_UL" -#define MODSI3_LIBCALL "OTS$REM_I" -#define MODDI3_LIBCALL "OTS$REM_L" -#define UMODSI3_LIBCALL "OTS$REM_UI" -#define UMODDI3_LIBCALL "OTS$REM_UL" - #define NAME__MAIN "__gccmain" #define SYMBOL__MAIN __gccmain diff --git a/contrib/gcc/config/alpha/vms64.h b/contrib/gcc/config/alpha/vms64.h index 3b4f587..29de9a5 100644 --- a/contrib/gcc/config/alpha/vms64.h +++ b/contrib/gcc/config/alpha/vms64.h @@ -2,20 +2,20 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ diff --git a/contrib/gcc/config/alpha/vms_tramp.asm b/contrib/gcc/config/alpha/vms_tramp.asm index 9a6a1c8..1eb1e2b 100644 --- a/contrib/gcc/config/alpha/vms_tramp.asm +++ b/contrib/gcc/config/alpha/vms_tramp.asm @@ -2,9 +2,9 @@ Copyright (C) 2001 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (rupp@gnat.com). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. @@ -18,13 +18,13 @@ do apply in other respects; for example, they cover modification of the file, and distribution when not linked into a combine executable.) -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ diff --git a/contrib/gcc/config/alpha/xm-vms.h b/contrib/gcc/config/alpha/xm-vms.h index 7bfceba..bdac52e 100644 --- a/contrib/gcc/config/alpha/xm-vms.h +++ b/contrib/gcc/config/alpha/xm-vms.h @@ -2,26 +2,23 @@ Copyright (C) 1996, 1997, 2001 Free Software Foundation, Inc. Contributed by Klaus Kaempf (kkaempf@progis.de). -This file is part of GNU CC. +This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify +GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. -GNU CC is distributed in the hope that it will be useful, +GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to +along with GCC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#define HOST_WIDE_INT long long -#define HOST_BITS_PER_WIDE_INT 64 - /* A couple of conditionals for execution machine are controlled here. */ #ifndef VMS #define VMS |
