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author | kan <kan@FreeBSD.org> | 2002-09-01 20:38:57 +0000 |
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committer | kan <kan@FreeBSD.org> | 2002-09-01 20:38:57 +0000 |
commit | 2e25f3a6c57335cba50111faceb0ce2ab59e9bcb (patch) | |
tree | c6857d31c36dbd89a881b0229bf38b062797d413 /contrib/gcc/combine.c | |
parent | 0895e1acb698e05d503c26bec5471de2e88b7d93 (diff) | |
download | FreeBSD-src-2e25f3a6c57335cba50111faceb0ce2ab59e9bcb.zip FreeBSD-src-2e25f3a6c57335cba50111faceb0ce2ab59e9bcb.tar.gz |
Gcc 3.2.1-prerelease from the FSF anoncvs repo gcc-3_2-branch on 1-Sep-2002 00:00:01 EDT.
Diffstat (limited to 'contrib/gcc/combine.c')
-rw-r--r-- | contrib/gcc/combine.c | 32 |
1 files changed, 10 insertions, 22 deletions
diff --git a/contrib/gcc/combine.c b/contrib/gcc/combine.c index bb22b0c..acaf3b1 100644 --- a/contrib/gcc/combine.c +++ b/contrib/gcc/combine.c @@ -3539,11 +3539,12 @@ subst (x, from, to, in_dest, unique_copy) if (GET_CODE (new) == CONST_INT && GET_CODE (x) == SUBREG) { - x = simplify_subreg (GET_MODE (x), new, + enum machine_mode mode = GET_MODE (x); + x = simplify_subreg (mode, new, GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); if (! x) - abort (); + x = gen_rtx_CLOBBER (mode, const0_rtx); } else if (GET_CODE (new) == CONST_INT && GET_CODE (x) == ZERO_EXTEND) @@ -6697,18 +6698,7 @@ force_to_mode (x, mode, mask, reg, just_select) /* If X is a CONST_INT, return a new one. Do this here since the test below will fail. */ if (GET_CODE (x) == CONST_INT) - { - HOST_WIDE_INT cval = INTVAL (x) & mask; - int width = GET_MODE_BITSIZE (mode); - - /* If MODE is narrower that HOST_WIDE_INT and CVAL is a negative - number, sign extend it. */ - if (width > 0 && width < HOST_BITS_PER_WIDE_INT - && (cval & ((HOST_WIDE_INT) 1 << (width - 1))) != 0) - cval |= (HOST_WIDE_INT) -1 << width; - - return GEN_INT (cval); - } + return gen_int_mode (INTVAL (x) & mask, mode); /* If X is narrower than MODE and we want all the bits in X's mode, just get X in the proper mode. */ @@ -6914,14 +6904,6 @@ force_to_mode (x, mode, mask, reg, just_select) force_to_mode (XEXP (x, 1), mode, mask, reg, next_select)); - /* If OP1 is a CONST_INT and X is an IOR or XOR, clear bits outside - MASK since OP1 might have been sign-extended but we never want - to turn on extra bits, since combine might have previously relied - on them being off. */ - if (GET_CODE (op1) == CONST_INT && (code == IOR || code == XOR) - && (INTVAL (op1) & mask) != 0) - op1 = GEN_INT (INTVAL (op1) & mask); - if (op_mode != GET_MODE (x) || op0 != XEXP (x, 0) || op1 != XEXP (x, 1)) x = gen_binary (code, op_mode, op0, op1); break; @@ -9865,6 +9847,12 @@ gen_lowpart_for_combine (mode, x) int offset = 0; rtx res; + /* We can't handle VOIDmodes. We can get here when generating vector + modes since these, unlike integral and floating point modes are not + handled earlier. */ + if (GET_MODE (x) == VOIDmode) + return gen_rtx_CLOBBER (GET_MODE (x), const0_rtx); + offset = subreg_lowpart_offset (mode, GET_MODE (x)); res = simplify_gen_subreg (mode, x, GET_MODE (x), offset); if (res) |