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authormarcel <marcel@FreeBSD.org>2013-12-28 22:52:46 +0000
committermarcel <marcel@FreeBSD.org>2013-12-28 22:52:46 +0000
commit77dccfc05f20668bba519304cabcf754249aa795 (patch)
treee3ed6d64f8e4ef1a69224f9ef14310bf1fb4f096 /contrib/binutils
parentdcc4f1ae78ced6c465fee5688143cf2325347893 (diff)
downloadFreeBSD-src-77dccfc05f20668bba519304cabcf754249aa795.zip
FreeBSD-src-77dccfc05f20668bba519304cabcf754249aa795.tar.gz
Fix cross-compilation of ia64 target code with clang.
Diffstat (limited to 'contrib/binutils')
-rw-r--r--contrib/binutils/gas/config/tc-ia64.c2
-rw-r--r--contrib/binutils/opcodes/ia64-asmtab.c10
2 files changed, 6 insertions, 6 deletions
diff --git a/contrib/binutils/gas/config/tc-ia64.c b/contrib/binutils/gas/config/tc-ia64.c
index 2279c99..128b9c5 100644
--- a/contrib/binutils/gas/config/tc-ia64.c
+++ b/contrib/binutils/gas/config/tc-ia64.c
@@ -11567,7 +11567,7 @@ fix_insn (fix, odesc, value)
err = (*odesc->insert) (odesc, value, insn + slot);
if (err)
- as_bad_where (fix->fx_file, fix->fx_line, err);
+ as_bad_where (fix->fx_file, fix->fx_line, "%s", err);
t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
diff --git a/contrib/binutils/opcodes/ia64-asmtab.c b/contrib/binutils/opcodes/ia64-asmtab.c
index 6350fd4..7b836fd 100644
--- a/contrib/binutils/opcodes/ia64-asmtab.c
+++ b/contrib/binutils/opcodes/ia64-asmtab.c
@@ -82,7 +82,7 @@ dependencies[] = {
{ "CPUID#", 7, 0, 5, -1, NULL, },
{ "CR[CMCV]", 27, 0, 3, 74, NULL, },
{ "CR[DCR]", 27, 0, 3, 0, NULL, },
- { "CR[EOI]", 27, 0, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", },
+ { "CR[EOI]", 27, 0, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI - CR67)\" on page 2:119", },
{ "CR[GPTA]", 27, 0, 3, 9, NULL, },
{ "CR[IFA]", 27, 0, 1, 20, NULL, },
{ "CR[IFA]", 27, 0, 3, 20, NULL, },
@@ -103,13 +103,13 @@ dependencies[] = {
{ "CR[ITM]", 27, 0, 3, 1, NULL, },
{ "CR[ITV]", 27, 0, 3, 72, NULL, },
{ "CR[IVA]", 27, 0, 4, 2, NULL, },
- { "CR[IVR]", 27, 0, 7, 65, "SC Section 5.8.3.2, \"External Interrupt Vector Register (IVR Ð CR65)\" on page 2:118", },
- { "CR[LID]", 27, 0, 7, 64, "SC Section 5.8.3.1, \"Local ID (LID Ð CR64)\" on page 2:117", },
+ { "CR[IVR]", 27, 0, 7, 65, "SC Section 5.8.3.2, \"External Interrupt Vector Register (IVR - CR65)\" on page 2:118", },
+ { "CR[LID]", 27, 0, 7, 64, "SC Section 5.8.3.1, \"Local ID (LID - CR64)\" on page 2:117", },
{ "CR[LRR%], % in 0 - 1", 9, 0, 3, -1, NULL, },
{ "CR[PMV]", 27, 0, 3, 73, NULL, },
{ "CR[PTA]", 27, 0, 3, 8, NULL, },
{ "CR[TPR]", 27, 0, 3, 66, NULL, },
- { "CR[TPR]", 27, 0, 7, 66, "SC Section 5.8.3.3, \"Task Priority Register (TPR Ð CR66)\" on page 2:119", },
+ { "CR[TPR]", 27, 0, 7, 66, "SC Section 5.8.3.3, \"Task Priority Register (TPR - CR66)\" on page 2:119", },
{ "CR[TPR]", 27, 0, 1, 66, NULL, },
{ "CR%, % in 3-7, 10-15, 18, 26-63, 75-79, 82-127", 10, 0, 0, -1, NULL, },
{ "DBR#", 11, 0, 2, -1, NULL, },
@@ -282,7 +282,7 @@ dependencies[] = {
{ "CPUID#", 7, 1, 0, -1, NULL, },
{ "CR[CMCV]", 27, 1, 2, 74, NULL, },
{ "CR[DCR]", 27, 1, 2, 0, NULL, },
- { "CR[EOI]", 27, 1, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", },
+ { "CR[EOI]", 27, 1, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI - CR67)\" on page 2:119", },
{ "CR[GPTA]", 27, 1, 2, 9, NULL, },
{ "CR[IFA]", 27, 1, 2, 20, NULL, },
{ "CR[IFS]", 27, 1, 2, 23, NULL, },
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