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author | andrew <andrew@FreeBSD.org> | 2014-12-07 21:47:19 +0000 |
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committer | andrew <andrew@FreeBSD.org> | 2014-12-07 21:47:19 +0000 |
commit | 12b75a5de39e411f17e786e95d772baf82aee280 (patch) | |
tree | 6498ca2ad7724c92cdd5e764812763351291da96 /contrib/binutils | |
parent | be64c52822076d9d0d1f298552d186aaee4088f4 (diff) | |
download | FreeBSD-src-12b75a5de39e411f17e786e95d772baf82aee280.zip FreeBSD-src-12b75a5de39e411f17e786e95d772baf82aee280.tar.gz |
Fix mrc and mrc2 with APSR_nzcv. Binutils encodes it internally as 0 where
we need it to be set to 15 for it to be equivalent to r15.
MFC after: 1 week
X-MFC with: r275415
Sponsored by: ABT Systems Ltd
Diffstat (limited to 'contrib/binutils')
-rw-r--r-- | contrib/binutils/gas/config/tc-arm.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/contrib/binutils/gas/config/tc-arm.c b/contrib/binutils/gas/config/tc-arm.c index 184c8a9..a045cc7 100644 --- a/contrib/binutils/gas/config/tc-arm.c +++ b/contrib/binutils/gas/config/tc-arm.c @@ -6789,7 +6789,11 @@ do_co_reg (void) { inst.instruction |= inst.operands[0].reg << 8; inst.instruction |= inst.operands[1].imm << 21; - inst.instruction |= inst.operands[2].reg << 12; + /* If this is a vector we are using the APSR_nzcv syntax, encode as r15 */ + if (inst.operands[2].isvec != 0) + inst.instruction |= 15 << 12; + else + inst.instruction |= inst.operands[2].reg << 12; inst.instruction |= inst.operands[3].reg << 16; inst.instruction |= inst.operands[4].reg; inst.instruction |= inst.operands[5].imm << 5; |