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authorjhb <jhb@FreeBSD.org>2014-05-18 03:57:54 +0000
committerjhb <jhb@FreeBSD.org>2014-05-18 03:57:54 +0000
commite306e641bcac9dccd5017b6f69979d020b6eea8e (patch)
tree2728f4617024362889ce45f4bb8ed1afa04c36e5 /contrib/binutils
parent9fa48763c09d7405752b9281c8b1f453c9375865 (diff)
downloadFreeBSD-src-e306e641bcac9dccd5017b6f69979d020b6eea8e.zip
FreeBSD-src-e306e641bcac9dccd5017b6f69979d020b6eea8e.tar.gz
Add support for the 'rdseed' instruction.
Diffstat (limited to 'contrib/binutils')
-rw-r--r--contrib/binutils/opcodes/i386-dis.c19
-rw-r--r--contrib/binutils/opcodes/i386-opc.tbl1
-rw-r--r--contrib/binutils/opcodes/i386-tbl.h3
3 files changed, 22 insertions, 1 deletions
diff --git a/contrib/binutils/opcodes/i386-dis.c b/contrib/binutils/opcodes/i386-dis.c
index 22c4b80..073afa1 100644
--- a/contrib/binutils/opcodes/i386-dis.c
+++ b/contrib/binutils/opcodes/i386-dis.c
@@ -85,6 +85,7 @@ static void OP_MS (int, int);
static void OP_XS (int, int);
static void OP_M (int, int);
static void OP_VMX (int, int);
+static void OP_VMX2 (int, int);
static void OP_0fae (int, int);
static void OP_0f07 (int, int);
static void NOP_Fixup1 (int, int);
@@ -318,6 +319,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EMC { OP_EMC, v_mode }
#define MXC { OP_MXC, 0 }
#define VM { OP_VMX, q_mode }
+#define VM2 { OP_VMX2, q_mode }
#define OPSUF { OP_3DNowSuffix, 0 }
#define OPSIMD { OP_SIMD_Suffix, 0 }
#define XMM0 { XMM_Fixup, 0 }
@@ -1732,7 +1734,7 @@ static const struct dis386 grps[][8] = {
{ "(bad)", { XX } },
{ "(bad)", { XX } },
{ "", { VM } }, /* See OP_VMX. */
- { "vmptrst", { Mq } },
+ { "", { VM2 } }, /* See OP_VMX2. */
},
/* GRP11_C6 */
{
@@ -6467,6 +6469,21 @@ OP_VMX (int bytemode, int sizeflag)
}
static void
+OP_VMX2 (int bytemode, int sizeflag)
+{
+ if (modrm.mod == 3)
+ {
+ strcpy (obuf, "rdseed");
+ OP_E (v_mode, sizeflag);
+ }
+ else
+ {
+ strcpy (obuf, "vmptrst");
+ OP_M (q_mode, sizeflag);
+ }
+}
+
+static void
REP_Fixup (int bytemode, int sizeflag)
{
/* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
diff --git a/contrib/binutils/opcodes/i386-opc.tbl b/contrib/binutils/opcodes/i386-opc.tbl
index f7f7f0d..9d7c207 100644
--- a/contrib/binutils/opcodes/i386-opc.tbl
+++ b/contrib/binutils/opcodes/i386-opc.tbl
@@ -1524,3 +1524,4 @@ pclmulhqhqdq, 2, 0x660f3a44, 0x11, CpuPCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSuf|N
// Intel Random Number Generator extensions
rdrand, 1, 0x0fc7, 0x6, CpuRdRnd, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { Reg16|Reg32|Reg64 }
+rdseed, 1, 0x0fc7, 0x7, CpuRdRnd, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { Reg16|Reg32|Reg64 }
diff --git a/contrib/binutils/opcodes/i386-tbl.h b/contrib/binutils/opcodes/i386-tbl.h
index ebd8da9..d769d09 100644
--- a/contrib/binutils/opcodes/i386-tbl.h
+++ b/contrib/binutils/opcodes/i386-tbl.h
@@ -4391,6 +4391,9 @@ const template i386_optab[] =
{"rdrand", 1, 0x0fc7, 0x6, CpuRdRnd,
Modrm|NoSuf,
{ Reg16|Reg32|Reg64 } },
+ {"rdseed", 1, 0x0fc7, 0x7, CpuRdRnd,
+ Modrm|NoSuf,
+ { Reg16|Reg32|Reg64 } },
/* Intel Supervisor Mode Access Prevention extensions */
{"clac", 0, 0x0f01, 0xca, CpuSMAP,
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