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authordim <dim@FreeBSD.org>2010-11-01 19:35:33 +0000
committerdim <dim@FreeBSD.org>2010-11-01 19:35:33 +0000
commit3f5c947f4453c6016a2a6a9636367ee3f48fc6fc (patch)
tree461aafc934d462eb9b9221308f8e25238c0ada62 /contrib/binutils/opcodes/spu-opc.c
parente6be3e7867eb43d220575baee2ce5662fb03e46c (diff)
parentd0f678fa0ff3f08a4eca29daf4d1ac39797b6326 (diff)
downloadFreeBSD-src-3f5c947f4453c6016a2a6a9636367ee3f48fc6fc.zip
FreeBSD-src-3f5c947f4453c6016a2a6a9636367ee3f48fc6fc.tar.gz
Merge ^/vendor/binutils/dist@214571 into contrib/binutils, which brings
us up to version 2.17.50.20070703, at the last GPLv2 commit. Amongst others, this added upstream support for some FreeBSD-specific things that we previously had to manually hack in, such as the OSABI label support, and so on. There are also quite a number of new files, some for cpu's (e.g. SPU) that we may or may not be interested in, but those can be cleaned up later on, if needed.
Diffstat (limited to 'contrib/binutils/opcodes/spu-opc.c')
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1 files changed, 44 insertions, 0 deletions
diff --git a/contrib/binutils/opcodes/spu-opc.c b/contrib/binutils/opcodes/spu-opc.c
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+++ b/contrib/binutils/opcodes/spu-opc.c
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+/* SPU opcode list
+
+ Copyright 2006 Free Software Foundation, Inc.
+
+ This file is part of GDB, GAS, and the GNU binutils.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+#include "opcode/spu.h"
+
+/* This file holds the Spu opcode table */
+
+
+/*
+ Example contents of spu-insn.h
+ id_tag mode mode type opcode mnemonic asmtype dependency FPU L/S? branch? instruction
+ QUAD WORD (0,RC,RB,RA,RT) latency
+ APUOP(M_LQD, 1, 0, RI9, 0x1f8, "lqd", ASM_RI9IDX, 00012, FXU, 1, 0) Load Quadword d-form
+ */
+
+const struct spu_opcode spu_opcodes[] = {
+#define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
+ { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },
+#define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
+ { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },
+#include "opcode/spu-insns.h"
+#undef APUOP
+#undef APUOPFB
+};
+
+const int spu_num_opcodes =
+ sizeof (spu_opcodes) / sizeof (spu_opcodes[0]);
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