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author | obrien <obrien@FreeBSD.org> | 2002-01-27 12:00:11 +0000 |
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committer | obrien <obrien@FreeBSD.org> | 2002-01-27 12:00:11 +0000 |
commit | 2c76fd68f4fb39c1af5cde1a8eac2bdd7b3f9909 (patch) | |
tree | d0fb877bb74b99ef3fc1c560a6340040f60f0392 /contrib/binutils/opcodes/cgen-dis.in | |
parent | ea6b809e7d17f67670458d8b26735098ed0ec32a (diff) | |
parent | fc89183cdc6be5afa8deb7250fd15a20832ab528 (diff) | |
download | FreeBSD-src-2c76fd68f4fb39c1af5cde1a8eac2bdd7b3f9909.zip FreeBSD-src-2c76fd68f4fb39c1af5cde1a8eac2bdd7b3f9909.tar.gz |
This commit was generated by cvs2svn to compensate for changes in r89857,
which included commits to RCS files with non-trunk default branches.
Diffstat (limited to 'contrib/binutils/opcodes/cgen-dis.in')
-rw-r--r-- | contrib/binutils/opcodes/cgen-dis.in | 96 |
1 files changed, 58 insertions, 38 deletions
diff --git a/contrib/binutils/opcodes/cgen-dis.in b/contrib/binutils/opcodes/cgen-dis.in index 0e7c35a..f2c9dd5 100644 --- a/contrib/binutils/opcodes/cgen-dis.in +++ b/contrib/binutils/opcodes/cgen-dis.in @@ -47,10 +47,13 @@ static void print_keyword static void print_insn_normal PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int)); -static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, - disassemble_info *, char *, int)); +static int print_insn + PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned)); static int default_print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); +static int read_insn + PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, + CGEN_EXTRACT_INFO *, unsigned long *)); /* -- disassembler routines inserted here */ @@ -58,21 +61,12 @@ static int default_print_insn static void print_normal (cd, dis_info, value, attrs, pc, length) -#ifdef CGEN_PRINT_NORMAL - CGEN_CPU_DESC cd; -#else CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; -#endif PTR dis_info; long value; unsigned int attrs; -#ifdef CGEN_PRINT_NORMAL - bfd_vma pc; - int length; -#else bfd_vma pc ATTRIBUTE_UNUSED; int length ATTRIBUTE_UNUSED; -#endif { disassemble_info *info = (disassemble_info *) dis_info; @@ -93,21 +87,12 @@ print_normal (cd, dis_info, value, attrs, pc, length) static void print_address (cd, dis_info, value, attrs, pc, length) -#ifdef CGEN_PRINT_NORMAL - CGEN_CPU_DESC cd; -#else CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; -#endif PTR dis_info; bfd_vma value; unsigned int attrs; -#ifdef CGEN_PRINT_NORMAL - bfd_vma pc; - int length; -#else bfd_vma pc ATTRIBUTE_UNUSED; int length ATTRIBUTE_UNUSED; -#endif { disassemble_info *info = (disassemble_info *) dis_info; @@ -190,9 +175,10 @@ print_insn_normal (cd, dis_info, insn, fields, pc, length) /* Subroutine of print_insn. Reads an insn into the given buffers and updates the extract info. Returns 0 if all is well, non-zero otherwise. */ + static int read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; bfd_vma pc; disassemble_info *info; char *buf; @@ -227,15 +213,25 @@ print_insn (cd, pc, info, buf, buflen) bfd_vma pc; disassemble_info *info; char *buf; - int buflen; + unsigned int buflen; { - unsigned long insn_value; + CGEN_INSN_INT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; + int basesize; + + /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ + basesize = cd->base_insn_bitsize < buflen * 8 ? + cd->base_insn_bitsize : buflen * 8; + insn_value = cgen_get_insn_value (cd, buf, basesize); - int rc = read_insn (cd, pc, info, buf, buflen, & ex_info, & insn_value); - if (rc != 0) - return rc; + + /* Fill in ex_info fields like read_insn would. Don't actually call + read_insn, since the incoming buffer is already read (and possibly + modified a la m32r). */ + ex_info.valid = (1 << buflen) - 1; + ex_info.dis_info = info; + ex_info.insn_bytes = buf; /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ @@ -246,9 +242,10 @@ print_insn (cd, pc, info, buf, buflen) const CGEN_INSN *insn = insn_list->insn; CGEN_FIELDS fields; int length; + unsigned long insn_value_cropped; #ifdef CGEN_VALIDATE_INSN_SUPPORTED - /* not needed as insn shouldn't be in hash lists if not supported */ + /* Not needed as insn shouldn't be in hash lists if not supported. */ /* Supported by this cpu? */ if (! @arch@_cgen_insn_supported (cd, insn)) { @@ -260,7 +257,17 @@ print_insn (cd, pc, info, buf, buflen) /* Basic bit mask must be correct. */ /* ??? May wish to allow target to defer this check until the extract handler. */ - if ((insn_value & CGEN_INSN_BASE_MASK (insn)) + + /* Base size may exceed this instruction's size. Extract the + relevant part from the buffer. */ + if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && + (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) + insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), + info->endian == BFD_ENDIAN_BIG); + else + insn_value_cropped = insn_value; + + if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) == CGEN_INSN_BASE_VALUE (insn)) { /* Printing is handled in two passes. The first pass parses the @@ -269,8 +276,8 @@ print_insn (cd, pc, info, buf, buflen) /* Make sure the entire insn is loaded into insn_value, if it can fit. */ - if (CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize && - (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) + if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && + (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) { unsigned long full_insn_value; int rc = read_insn (cd, pc, info, buf, @@ -283,7 +290,7 @@ print_insn (cd, pc, info, buf, buflen) } else length = CGEN_EXTRACT_FN (cd, insn) - (cd, insn, &ex_info, insn_value, &fields, pc); + (cd, insn, &ex_info, insn_value_cropped, &fields, pc); /* length < 0 -> error */ if (length < 0) @@ -317,18 +324,27 @@ default_print_insn (cd, pc, info) disassemble_info *info; { char buf[CGEN_MAX_INSN_SIZE]; + int buflen; int status; - /* Read the base part of the insn. */ + /* Attempt to read the base part of the insn. */ + buflen = cd->base_insn_bitsize / 8; + status = (*info->read_memory_func) (pc, buf, buflen, info); + + /* Try again with the minimum part, if min < base. */ + if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) + { + buflen = cd->min_insn_bitsize / 8; + status = (*info->read_memory_func) (pc, buf, buflen, info); + } - status = (*info->read_memory_func) (pc, buf, cd->base_insn_bitsize / 8, info); if (status != 0) { (*info->memory_error_func) (status, pc, info); return -1; } - return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8); + return print_insn (cd, pc, info, buf, buflen); } /* Main entry point. @@ -358,17 +374,21 @@ print_insn_@arch@ (pc, info) arch = info->arch; if (arch == bfd_arch_unknown) arch = CGEN_BFD_ARCH; - - /* There's no standard way to compute the isa number (e.g. for arm thumb) + + /* There's no standard way to compute the machine or isa number so we leave it to the target. */ +#ifdef CGEN_COMPUTE_MACH + mach = CGEN_COMPUTE_MACH (info); +#else + mach = info->mach; +#endif + #ifdef CGEN_COMPUTE_ISA isa = CGEN_COMPUTE_ISA (info); #else isa = 0; #endif - mach = info->mach; - /* If we've switched cpu's, close the current table and open a new one. */ if (cd && (isa != prev_isa |