Import of GNU Binutils version 2.11.0.

Believe it or not, this is heavily stripped down.

9 files changed, 1899 insertions, 272 deletions

diff --git a/contrib/binutils/gas/doc/Makefile.am b/contrib/binutils/gas/doc/Makefile.am
index c6eaf77..60761a4 100644
--- a/contrib/binutils/gas/doc/Makefile.am
+++ b/contrib/binutils/gas/doc/Makefile.am
@@ -17,6 +17,7 @@ asconfig.texi: $(CONFIG).texi
 
 CPU_DOCS = \
 	c-a29k.texi \
+	c-arc.texi \
 	c-arm.texi \
 	c-d10v.texi \
 	c-h8300.texi \
@@ -24,14 +25,17 @@ CPU_DOCS = \
 	c-hppa.texi \
 	c-i370.texi \
 	c-i386.texi \
+	c-i860.texi \
 	c-i960.texi \
 	c-m32r.texi \
+	c-m68hc11.texi \
 	c-m68k.texi \
 	c-mips.texi \
 	c-ns32k.texi \
 	c-pj.texi \
 	c-sh.texi \
 	c-sparc.texi \
+        c-tic54x.texi \
 	c-vax.texi \
 	c-v850.texi \
 	c-z8k.texi
diff --git a/contrib/binutils/gas/doc/Makefile.in b/contrib/binutils/gas/doc/Makefile.in
index 0be6179..5f9b258 100644
--- a/contrib/binutils/gas/doc/Makefile.in
+++ b/contrib/binutils/gas/doc/Makefile.in
@@ -69,9 +69,13 @@ BFDLIB = @BFDLIB@
 CATALOGS = @CATALOGS@
 CATOBJEXT = @CATOBJEXT@
 CC = @CC@
+CXX = @CXX@
+CXXCPP = @CXXCPP@
 DATADIRNAME = @DATADIRNAME@
 DLLTOOL = @DLLTOOL@
 EXEEXT = @EXEEXT@
+GCJ = @GCJ@
+GCJFLAGS = @GCJFLAGS@
 GDBINIT = @GDBINIT@
 GMOFILES = @GMOFILES@
 GMSGFMT = @GMSGFMT@
@@ -83,6 +87,7 @@ INTLDEPS = @INTLDEPS@
 INTLLIBS = @INTLLIBS@
 INTLOBJS = @INTLOBJS@
 LEX = @LEX@
+LIBM = @LIBM@
 LIBTOOL = @LIBTOOL@
 LN_S = @LN_S@
 MAINT = @MAINT@
@@ -90,14 +95,17 @@ MAKEINFO = @MAKEINFO@
 MKINSTALLDIRS = @MKINSTALLDIRS@
 MSGFMT = @MSGFMT@
 OBJDUMP = @OBJDUMP@
+OBJEXT = @OBJEXT@
 OPCODES_LIB = @OPCODES_LIB@
 PACKAGE = @PACKAGE@
 POFILES = @POFILES@
 POSUB = @POSUB@
 RANLIB = @RANLIB@
+STRIP = @STRIP@
 USE_INCLUDED_LIBINTL = @USE_INCLUDED_LIBINTL@
 USE_NLS = @USE_NLS@
 VERSION = @VERSION@
+WARN_CFLAGS = @WARN_CFLAGS@
 YACC = @YACC@
 atof = @atof@
 cgen_cpu_prefix = @cgen_cpu_prefix@
@@ -119,6 +127,7 @@ info_TEXINFOS = as.texinfo gasp.texi
 
 CPU_DOCS = \
 	c-a29k.texi \
+	c-arc.texi \
 	c-arm.texi \
 	c-d10v.texi \
 	c-h8300.texi \
@@ -126,14 +135,17 @@ CPU_DOCS = \
 	c-hppa.texi \
 	c-i370.texi \
 	c-i386.texi \
+	c-i860.texi \
 	c-i960.texi \
 	c-m32r.texi \
+	c-m68hc11.texi \
 	c-m68k.texi \
 	c-mips.texi \
 	c-ns32k.texi \
 	c-pj.texi \
 	c-sh.texi \
 	c-sparc.texi \
+        c-tic54x.texi \
 	c-vax.texi \
 	c-v850.texi \
 	c-z8k.texi
@@ -163,7 +175,7 @@ DIST_COMMON =  Makefile.am Makefile.in
 
 DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
 
-TAR = tar
+TAR = gtar
 GZIP_ENV = --best
 all: all-redirect
 .SUFFIXES:
diff --git a/contrib/binutils/gas/doc/all.texi b/contrib/binutils/gas/doc/all.texi
index d1058fb..22742b4 100644
--- a/contrib/binutils/gas/doc/all.texi
+++ b/contrib/binutils/gas/doc/all.texi
@@ -35,14 +35,17 @@
 @set HPPA
 @set I370
 @set I80386
+@set I860
 @set I960
 @set M32R
+@set M68HC11
 @set M680X0
 @set MCORE
 @set MIPS
 @set PJ
 @set SH
 @set SPARC
+@set C54X
 @set V850
 @set VAX
 @set VXWORKS
diff --git a/contrib/binutils/gas/doc/as.1 b/contrib/binutils/gas/doc/as.1
index 5fc517c..0e9d0ce 100644
--- a/contrib/binutils/gas/doc/as.1
+++ b/contrib/binutils/gas/doc/as.1
@@ -1,6 +1,6 @@
-.\" Copyright (c) 1991, 1992, 1996, 1997, 1998 Free Software Foundation
+.\" Copyright (c) 1991, 1992, 1996, 1997, 1998, 2000 Free Software Foundation
 .\" See section COPYING for conditions for redistribution
-.TH as 1 "29 March 1996" "cygnus support" "GNU Development Tools"
+.TH as 1 "29 March 1996" "Free Software Foundation" "GNU Development Tools"
 
 .SH NAME
 GNU as \- the portable GNU assembler.
@@ -290,19 +290,377 @@ Using as: The GNU Assembler\c
 .BR ld "(" 1 ")."
 
 .SH COPYING
-Copyright (c) 1991, 1992 Free Software Foundation, Inc.
+Copyright (c) 1991, 1992, 2000 Free Software Foundation, Inc.
 .PP
-Permission is granted to make and distribute verbatim copies of
-this manual provided the copyright notice and this permission notice
-are preserved on all copies.
-.PP
-Permission is granted to copy and distribute modified versions of this
-manual under the conditions for verbatim copying, provided that the
-entire resulting derived work is distributed under the terms of a
-permission notice identical to this one.
-.PP
-Permission is granted to copy and distribute translations of this
-manual into another language, under the above conditions for modified
-versions, except that this permission notice may be included in
-translations approved by the Free Software Foundation instead of in
-the original English.
+This document is distributed under the terms of the GNU Free
+Documentation License, version 1.1.  That license is described in the
+sources for this manual page, but it is not displayed here in order to
+make this manual more consise.  Copies of this license can also be
+obtained from: http://www.gnu.org/copyleft/.
+
+\"  GNU Free Documentation License
+\"    Version 1.1, March 2000
+
+\"    Copyright (C) 2000  Free Software Foundation, Inc.
+\"    59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+     
+\"    Everyone is permitted to copy and distribute verbatim
+\"    copies of this license document, but changing it is
+\"    not allowed.
+\"  .PP
+\"  0. PREAMBLE
+\"  .PP
+\"  The purpose of this License is to make a manual, textbook, or other
+\"  written document "free" in the sense of freedom: to assure everyone
+\"  the effective freedom to copy and redistribute it, with or without
+\"  modifying it, either commercially or noncommercially.  Secondarily,
+\"  this License preserves for the author and publisher a way to get
+\"  credit for their work, while not being considered responsible for
+\"  modifications made by others.
+\"  .PP
+\"  This License is a kind of "copyleft", which means that derivative
+\"  works of the document must themselves be free in the same sense.  It
+\"  complements the GNU General Public License, which is a copyleft
+\"  license designed for free software.
+\"  .PP
+\"  We have designed this License in order to use it for manuals for free
+\"  software, because free software needs free documentation: a free
+\"  program should come with manuals providing the same freedoms that the
+\"  software does.  But this License is not limited to software manuals;
+\"  it can be used for any textual work, regardless of subject matter or
+\"  whether it is published as a printed book.  We recommend this License
+\"  principally for works whose purpose is instruction or reference.
+\"  .PP
+\"  1. APPLICABILITY AND DEFINITIONS
+\"  .PP
+\"  This License applies to any manual or other work that contains a
+\"  notice placed by the copyright holder saying it can be distributed
+\"  under the terms of this License.  The "Document", below, refers to any
+\"  such manual or work.  Any member of the public is a licensee, and is
+\"  addressed as "you".
+\"  .PP
+\"  A "Modified Version" of the Document means any work containing the
+\"  Document or a portion of it, either copied verbatim, or with
+\"  modifications and/or translated into another language.
+\"  .PP
+\"  A "Secondary Section" is a named appendix or a front-matter section of
+\"  the Document that deals exclusively with the relationship of the
+\"  publishers or authors of the Document to the Document's overall subject
+\"  (or to related matters) and contains nothing that could fall directly
+\"  within that overall subject.  (For example, if the Document is in part a
+\"  textbook of mathematics, a Secondary Section may not explain any
+\"  mathematics.)  The relationship could be a matter of historical
+\"  connection with the subject or with related matters, or of legal,
+\"  commercial, philosophical, ethical or political position regarding
+\"  them.
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+\"  The "Invariant Sections" are certain Secondary Sections whose titles
+\"  are designated, as being those of Invariant Sections, in the notice
+\"  that says that the Document is released under this License.
+\"  .PP
+\"  The "Cover Texts" are certain short passages of text that are listed,
+\"  as Front-Cover Texts or Back-Cover Texts, in the notice that says that
+\"  the Document is released under this License.
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+\"  copyright notices, and the license notice saying this License applies
+\"  to the Document are reproduced in all copies, and that you add no other
+\"  conditions whatsoever to those of this License.  You may not use
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+\"  a publicly-accessible computer-network location containing a complete
+\"  Transparent copy of the Document, free of added material, which the
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+\"  Document well before redistributing any large number of copies, to give
+\"  them a chance to provide you with an updated version of the Document.
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+\"  4. MODIFICATIONS
+\"  .PP
+\"  You may copy and distribute a Modified Version of the Document under
+\"  the conditions of sections 2 and 3 above, provided that you release
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+\"  Version filling the role of the Document, thus licensing distribution
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+\"  responsible for authorship of the modifications in the Modified
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+\"  E. Add an appropriate copyright notice for your modifications
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+\"  Preserve in that license notice the full lists of Invariant Sections
+\"  and required Cover Texts given in the Document's license notice.
+\"  .PP
+\"  H. Include an unaltered copy of this License.
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+\"  You may omit a network location for a work that was published at
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+\"  L. Preserve all the Invariant Sections of the Document,
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+\"  passage of up to 25 words as a Back-Cover Text, to the end of the list
+\"  of Cover Texts in the Modified Version.  Only one passage of
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+\"  you may not add another; but you may replace the old one, on explicit
+\"  permission from the previous publisher that added the old one.
+\"  .PP
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+
+\"  5. COMBINING DOCUMENTS
+\"  .PP
+\"  You may combine the Document with other documents released under this
+\"  License, under the terms defined in section 4 above for modified
+\"  versions, provided that you include in the combination all of the
+\"  Invariant Sections of all of the original documents, unmodified, and
+\"  list them all as Invariant Sections of your combined work in its
+\"  license notice.
+\"  .PP
+\"  The combined work need only contain one copy of this License, and
+\"  multiple identical Invariant Sections may be replaced with a single
+\"  copy.  If there are multiple Invariant Sections with the same name but
+\"  different contents, make the title of each such section unique by
+\"  adding at the end of it, in parentheses, the name of the original
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+\"  Make the same adjustment to the section titles in the list of
+\"  Invariant Sections in the license notice of the combined work.
+\"  .PP
+\"  In the combination, you must combine any sections entitled "History"
+\"  in the various original documents, forming one section entitled
+\"  "History"; likewise combine any sections entitled "Acknowledgements",
+\"  and any sections entitled "Dedications".  You must delete all sections
+\"  entitled "Endorsements."
+\"  .PP
+
+\"  6. COLLECTIONS OF DOCUMENTS
+\"  .PP
+\"  You may make a collection consisting of the Document and other documents
+\"  released under this License, and replace the individual copies of this
+\"  License in the various documents with a single copy that is included in
+\"  the collection, provided that you follow the rules of this License for
+\"  verbatim copying of each of the documents in all other respects.
+\"  .PP
+\"  You may extract a single document from such a collection, and distribute
+\"  it individually under this License, provided you insert a copy of this
+\"  License into the extracted document, and follow this License in all
+\"  other respects regarding verbatim copying of that document.
+\"  .PP
+
+\"  7. AGGREGATION WITH INDEPENDENT WORKS
+\"  .PP
+\"  A compilation of the Document or its derivatives with other separate
+\"  and independent documents or works, in or on a volume of a storage or
+\"  distribution medium, does not as a whole count as a Modified Version
+\"  of the Document, provided no compilation copyright is claimed for the
+\"  compilation.  Such a compilation is called an "aggregate", and this
+\"  License does not apply to the other self-contained works thus compiled
+\"  with the Document, on account of their being thus compiled, if they
+\"  are not themselves derivative works of the Document.
+\"  .PP
+\"  If the Cover Text requirement of section 3 is applicable to these
+\"  copies of the Document, then if the Document is less than one quarter
+\"  of the entire aggregate, the Document's Cover Texts may be placed on
+\"  covers that surround only the Document within the aggregate.
+\"  Otherwise they must appear on covers around the whole aggregate.
+\"  .PP
+
+\"  8. TRANSLATION
+\"  .PP
+\"  Translation is considered a kind of modification, so you may
+\"  distribute translations of the Document under the terms of section 4.
+\"  Replacing Invariant Sections with translations requires special
+\"  permission from their copyright holders, but you may include
+\"  translations of some or all Invariant Sections in addition to the
+\"  original versions of these Invariant Sections.  You may include a
+\"  translation of this License provided that you also include the
+\"  original English version of this License.  In case of a disagreement
+\"  between the translation and the original English version of this
+\"  License, the original English version will prevail.
+\"  .PP
+
+\"  9. TERMINATION
+\"  .PP
+\"  You may not copy, modify, sublicense, or distribute the Document except
+\"  as expressly provided for under this License.  Any other attempt to
+\"  copy, modify, sublicense or distribute the Document is void, and will
+\"  automatically terminate your rights under this License.  However,
+\"  parties who have received copies, or rights, from you under this
+\"  License will not have their licenses terminated so long as such
+\"  parties remain in full compliance.
+\"  .PP
+
+\"  10. FUTURE REVISIONS OF THIS LICENSE
+\"  .PP
+\"  The Free Software Foundation may publish new, revised versions
+\"  of the GNU Free Documentation License from time to time.  Such new
+\"  versions will be similar in spirit to the present version, but may
+\"  differ in detail to address new problems or concerns.  See
+\"  http://www.gnu.org/copyleft/.
+\"  .PP
+\"  Each version of the License is given a distinguishing version number.
+\"  If the Document specifies that a particular numbered version of this
+\"  License "or any later version" applies to it, you have the option of
+\"  following the terms and conditions either of that specified version or
+\"  of any later version that has been published (not as a draft) by the
+\"  Free Software Foundation.  If the Document does not specify a version
+\"  number of this License, you may choose any version ever published (not
+\"  as a draft) by the Free Software Foundation.
+\"  .PP
+
+\"  ADDENDUM: How to use this License for your documents
+\"  .PP
+\"  To use this License in a document you have written, include a copy of
+\"  the License in the document and put the following copyright and
+\"  license notices just after the title page:
+\"  .PP
+\"      Copyright (c)  YEAR  YOUR NAME.
+\"      Permission is granted to copy, distribute and/or
+\"      modify this document under the terms of the GNU
+\"      Free Documentation License, Version 1.1 or any later
+\"      version published by the Free Software Foundation;
+\"      with the Invariant Sections being LIST THEIR TITLES,
+\"      with the Front-Cover Texts being LIST, and with the
+\"      Back-Cover Texts being LIST.  A copy of the license
+\"      is included in the section entitled "GNU Free
+\"      Documentation License".
+\"  .PP
+\"  If you have no Invariant Sections, write "with no Invariant Sections"
+\"  instead of saying which ones are invariant.  If you have no
+\"  Front-Cover Texts, write "no Front-Cover Texts" instead of
+\"  "Front-Cover Texts being LIST"; likewise for Back-Cover Texts.
+\"  .PP
+\"  If your document contains nontrivial examples of program code, we
+\"  recommend releasing these examples in parallel under your choice of
+\"  free software license, such as the GNU General Public License,
+\"  to permit their use in free software.
diff --git a/contrib/binutils/gas/doc/as.texinfo b/contrib/binutils/gas/doc/as.texinfo
index 4ceb104..fb80ca5 100644
--- a/contrib/binutils/gas/doc/as.texinfo
+++ b/contrib/binutils/gas/doc/as.texinfo
@@ -1,5 +1,5 @@
 \input texinfo @c                               -*-Texinfo-*-
-@c  Copyright (c) 1991, 92, 93, 94, 95, 96, 97, 98, 2000
+@c  Copyright (c) 1991, 92, 93, 94, 95, 96, 97, 98, 2000, 2001
 @c  Free Software Foundation, Inc.
 @c UPDATE!!  On future updates--
 @c   (1)   check for new machine-dep cmdline options in
@@ -87,11 +87,14 @@ END-INFO-DIR-ENTRY
 @ifinfo
 This file documents the GNU Assembler "@value{AS}".
 
-Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation, Inc.
+Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001 Free Software Foundation, Inc.
 
-Permission is granted to make and distribute verbatim copies of
-this manual provided the copyright notice and this permission notice
-are preserved on all copies.
+      Permission is granted to copy, distribute and/or modify this document
+      under the terms of the GNU Free Documentation License, Version 1.1
+      or any later version published by the Free Software Foundation;
+      with no Invariant Sections, with no Front-Cover Texts, and with no
+      Back-Cover Texts.  A copy of the license is included in the
+      section entitled "GNU Free Documentation License".
 
 @ignore
 Permission is granted to process this file through Tex and print the
@@ -100,13 +103,6 @@ notice identical to this one except for the removal of this paragraph
 (this paragraph not being relevant to the printed manual).
 
 @end ignore
-Permission is granted to copy and distribute modified versions of this manual
-under the conditions for verbatim copying, provided that the entire resulting
-derived work is distributed under the terms of a permission notice identical to
-this one.
-
-Permission is granted to copy and distribute translations of this manual
-into another language, under the above conditions for modified versions.
 @end ifinfo
 
 @titlepage
@@ -142,19 +138,15 @@ done.
 @end tex
 
 @vskip 0pt plus 1filll
-Copyright @copyright{} 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation, Inc.
-
-Permission is granted to make and distribute verbatim copies of
-this manual provided the copyright notice and this permission notice
-are preserved on all copies.
+Copyright @copyright{} 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001 Free Software Foundation, Inc.
 
-Permission is granted to copy and distribute modified versions of this manual
-under the conditions for verbatim copying, provided that the entire resulting
-derived work is distributed under the terms of a permission notice identical to
-this one.
+      Permission is granted to copy, distribute and/or modify this document
+      under the terms of the GNU Free Documentation License, Version 1.1
+      or any later version published by the Free Software Foundation;
+      with no Invariant Sections, with no Front-Cover Texts, and with no
+      Back-Cover Texts.  A copy of the license is included in the
+      section entitled "GNU Free Documentation License".
 
-Permission is granted to copy and distribute translations of this manual
-into another language, under the above conditions for modified versions.
 @end titlepage
 
 @ifinfo
@@ -167,6 +159,11 @@ This file is a user guide to the @sc{gnu} assembler @code{@value{AS}} version
 This version of the file describes @code{@value{AS}} configured to generate
 code for @value{TARGET} architectures.
 @end ifclear
+
+This document is distributed under the terms of the GNU Free
+Documentation License.  A copy of the license is included in the
+section entitled "GNU Free Documentation License".
+
 @menu
 * Overview::                    Overview
 * Invoking::                    Command-Line Options
@@ -178,6 +175,7 @@ code for @value{TARGET} architectures.
 * Machine Dependencies::        Machine Dependent Features
 * Reporting Bugs::              Reporting Bugs
 * Acknowledgements::            Who Did What
+* GNU Free Documentation License::  GNU Free Documentation License
 * Index::                       Index
 @end menu
 @end ifinfo
@@ -205,12 +203,13 @@ Here is a brief summary of how to invoke @code{@value{AS}}.  For details,
  [ -f ] [ --gstabs ] [ --gdwarf2 ] [ --help ] [ -I @var{dir} ] [ -J ] [ -K ] [ -L ]
  [ --keep-locals ] [ -o @var{objfile} ] [ -R ] [ --statistics ] [ -v ]
  [ -version ] [ --version ] [ -W ] [ --warn ] [ --fatal-warnings ] 
- [ -w ] [ -x ] [ -Z ]
+ [ -w ] [ -x ] [ -Z ] [ --target-help ]
 @ifset A29K
 @c am29k has no machine-dependent assembler options
 @end ifset
 @ifset ARC
- [ -mbig-endian | -mlittle-endian ]
+ [ -marc[5|6|7|8] ]
+ [ -EB | -EL ]
 @end ifset
 @ifset ARM
  [ -m[arm]1 | -m[arm]2 | -m[arm]250 | -m[arm]3 | -m[arm]6 | -m[arm]60 |
@@ -219,7 +218,7 @@ Here is a brief summary of how to invoke @code{@value{AS}}.  For details,
    -m[arm]810 | -m[arm]9 | -m[arm]920 | -m[arm]920t | -m[arm]9tdmi |
    -mstrongarm | -mstrongarm110 | -mstrongarm1100 ]
  [ -m[arm]v2 | -m[arm]v2a | -m[arm]v3 | -m[arm]v3m | -m[arm]v4 | -m[arm]v4t |
-   -m[arm]v5 | -[arm]v5t ]
+   -m[arm]v5 | -[arm]v5t | -[arm]v5te ]
  [ -mthumb | -mall ]
  [ -mfpa10 | -mfpa11 | -mfpe-old | -mno-fpu ]
  [ -EB | -EL ]
@@ -249,6 +248,10 @@ Here is a brief summary of how to invoke @code{@value{AS}}.  For details,
    -Av8plus | -Av8plusa | -Av9 | -Av9a ]
  [ -xarch=v8plus | -xarch=v8plusa ] [ -bump ] [ -32 | -64 ]
 @end ifset
+@ifset TIC54X
+ [ -mcpu=54[123589] | -mcpu=54[56]lp ] [ -mfar-mode | -mf ] 
+ [ -merrors-to-file <filename> | -me <filename> ]
+@end ifset
 @ifset Z8000
 @c Z8000 has no machine-dependent assembler options
 @end ifset
@@ -257,15 +260,26 @@ Here is a brief summary of how to invoke @code{@value{AS}}.  For details,
  [ -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC ]
  [ -b ] [ -no-relax ]
 @end ifset
+@ifset M32R
+ [ --m32rx | --[no-]warn-explicit-parallel-conflicts | --W[n]p ]
+@end ifset
 @ifset M680X0
  [ -l ] [ -m68000 | -m68010 | -m68020 | ... ]
 @end ifset
 @ifset MCORE
  [ -jsri2bsr ] [ -sifilter ] [ -relax ]
+ [ -mcpu=[210|340] ]
+@end ifset
+@ifset M68HC11
+ [ -m68hc11 | -m68hc12 ]
+ [ --force-long-branchs ] [ --short-branchs ] [ --strict-direct-mode ]
+ [ --print-insn-syntax ] [ --print-opcodes ] [ --generate-example ]
 @end ifset
 @ifset MIPS
  [ -nocpp ] [ -EL ] [ -EB ] [ -G @var{num} ] [ -mcpu=@var{CPU} ]
- [ -mips1 ] [ -mips2 ] [ -mips3 ] [ -m4650 ] [ -no-m4650 ]
+ [ -mips1 ] [ -mips2 ] [ -mips3 ] [ -mips4 ] [ -mips5 ]
+ [ -mips32 ] [ -mips64 ]
+ [ -m4650 ] [ -no-m4650 ]
  [ --trap ] [ --break ]
  [ --emulation=@var{name} ]
 @end ifset
@@ -325,11 +339,15 @@ may help debugging assembler code, if the debugger can handle it.
 
 @item --gdwarf2
 Generate DWARF2 debugging information for each assembler line.  This
-may help debugging assembler code, if the debugger can handle it.
+may help debugging assembler code, if the debugger can handle it.  Note - this
+option is only supported by some targets, not all of them.
 
 @item --help
 Print a summary of the command line options and exit.
 
+@item --target-help
+Print a summary of all target specific options and exit.
+
 @item -I @var{dir}
 Add directory @var{dir} to the search list for @code{.include} directives.
 
@@ -399,17 +417,10 @@ The following options are available when @value{AS} is configured for
 an ARC processor.
 
 @table @code
-
-@cindex ARC endianness
-@cindex endianness, ARC
-@cindex big endian output, ARC
-@item -mbig-endian
-Generate ``big endian'' format output.
-
-@cindex little endian output, ARC
-@item -mlittle-endian
-Generate ``little endian'' format output.
-
+@item -marc[5|6|7|8]
+This option selects the core processor variant.
+@item -EB | -EL
+Select either big-endian (-EB) or little-endian (-EL) output.
 @end table
 @end ifset
 
@@ -425,7 +436,7 @@ Specify which ARM architecture variant is used by the target.
 @item -mthumb | -mall
 Enable or disable Thumb only instruction decoding.
 @item -mfpa10 | -mfpa11 | -mfpe-old | -mno-fpu
-Select which Floating Point architcture is the target.
+Select which Floating Point architecture is the target.
 @item -mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant | -moabi
 Select which procedure calling convention is in use.
 @item -EB | -EL
@@ -486,6 +497,26 @@ error if necessary.
 @end table
 @end ifset
 
+@ifset M32R
+The following options are available when @value{AS} is configured for the
+Mitsubishi M32R series.
+
+@table @code
+
+@item --m32rx
+Specify which processor in the M32R family is the target.  The default
+is normally the M32R, but this option changes it to the M32RX.
+
+@item --warn-explicit-parallel-conflicts or --Wp
+Produce warning messages when questionable parallel constructs are
+encountered. 
+
+@item --no-warn-explicit-parallel-conflicts or --Wnp
+Do not produce warning messages when questionable parallel constructs are 
+encountered. 
+
+@end table
+@end ifset
 
 @ifset M680X0
 The following options are available when @value{AS} is configured for the
@@ -534,6 +565,41 @@ Generate ``little endian'' format output.
 @end table
 @end ifset
 
+@ifset M68HC11
+The following options are available when @value{AS} is configured for the
+Motorola 68HC11 or 68HC12 series.
+
+@table @code
+
+@item -m68hc11 | -m68hc12
+Specify what processor is the target.  The default is
+defined by the configuration option when building the assembler.
+
+@item --force-long-branchs
+Relative branches are turned into absolute ones. This concerns
+conditional branches, unconditional branches and branches to a
+sub routine.
+
+@item -S | --short-branchs
+Do not turn relative branchs into absolute ones
+when the offset is out of range.
+
+@item --strict-direct-mode
+Do not turn the direct addressing mode into extended addressing mode
+when the instruction does not support direct addressing mode.
+
+@item --print-insn-syntax
+Print the syntax of instruction in case of error.
+
+@item --print-opcodes
+print the list of instructions with syntax and then exit.
+
+@item --generate-example
+print an example of instruction for each possible instruction and then exit.
+This option is only useful for testing @code{@value{AS}}.
+
+@end table
+@end ifset
 
 @ifset SPARC
 The following options are available when @code{@value{AS}} is configured
@@ -559,6 +625,22 @@ Warn when the assembler switches to another architecture.
 @end table
 @end ifset
 
+@ifset TIC54X
+The following options are available when @value{AS} is configured for the 'c54x
+architecture. 
+
+@table @code
+@item -mfar-mode
+Enable extended addressing mode.  All addresses and relocations will assume
+extended addressing (usually 23 bits).
+@item -mcpu=@var{CPU_VERSION}
+Sets the CPU version being compiled for.
+@item -merrors-to-file @var{FILENAME}
+Redirect error output to a file, for broken systems which don't support such
+behaviour in the shell.
+@end table
+@end ifset
+
 @ifset MIPS
 The following options are available when @value{AS} is configured for
 a MIPS processor.
@@ -583,10 +665,15 @@ Generate ``little endian'' format output.
 @item -mips1
 @itemx -mips2
 @itemx -mips3
+@itemx -mips4
+@itemx -mips32
 Generate code for a particular MIPS Instruction Set Architecture level.
 @samp{-mips1} corresponds to the @sc{r2000} and @sc{r3000} processors,
 @samp{-mips2} to the @sc{r6000} processor, and @samp{-mips3} to the @sc{r4000}
 processor.
+@samp{-mips5}, @samp{-mips32}, and @samp{-mips64} correspond
+to generic @sc{MIPS V}, @sc{MIPS32}, and @sc{MIPS64} ISA
+processors, respectively.
 
 @item -m4650
 @itemx -no-m4650
@@ -596,8 +683,9 @@ instructions around accesses to the @samp{HI} and @samp{LO} registers.
 @samp{-no-m4650} turns off this option.
 
 @item -mcpu=@var{CPU}
-Generate code for a particular MIPS cpu.  This has little effect on the
-assembler, but it is passed by @code{@value{GCC}}.
+Generate code for a particular MIPS cpu.  It is exactly equivalent to
+@samp{-m@var{cpu}}, except that there are more value of @var{cpu}
+understood.
 
 @cindex emulation
 @item --emulation=@var{name}
@@ -654,11 +742,20 @@ The command line option @samp{-nojsri2bsr} can be used to disable it.
 @item -sifilter
 @itemx -nosifilter
 Enable or disable the silicon filter behaviour.  By default this is disabled.
-The default can be overidden by the @samp{-sifilter} command line option.
+The default can be overridden by the @samp{-sifilter} command line option.
 
 @item -relax
 Alter jump instructions for long displacements.
 
+@item -mcpu=[210|340]
+Select the cpu type on the target hardware.  This controls which instructions
+can be assembled.
+
+@item -EB
+Assemble for a big endian target.
+
+@item -EL
+Assemble for a little endian target.
 
 @end table
 @end ifset
@@ -933,7 +1030,7 @@ information for the debugger.
 @node Errors
 @section Error and Warning Messages
 
-@cindex error messsages
+@cindex error messages
 @cindex warning messages
 @cindex messages from assembler
 @code{@value{AS}} may write warnings and error messages to the standard error
@@ -1564,6 +1661,9 @@ is considered a comment and is ignored.  The line comment character is
 @ifset HPPA
 @samp{;} for the HPPA;
 @end ifset
+@ifset I80386
+@samp{#} on the i386 and x86-64;
+@end ifset
 @ifset I960
 @samp{#} on the i960;
 @end ifset
@@ -1582,6 +1682,9 @@ is considered a comment and is ignored.  The line comment character is
 @ifset M680X0
 @samp{|} on the 680x0;
 @end ifset
+@ifset M68HC11
+@samp{#} on the 68HC11 and 68HC12;
+@end ifset
 @ifset VAX
 @samp{#} on the Vax;
 @end ifset
@@ -1592,7 +1695,7 @@ is considered a comment and is ignored.  The line comment character is
 @samp{#} on the V850;
 @end ifset
 see @ref{Machine Dependencies}.  @refill
-@c FIXME What about i386, m88k, i860?
+@c FIXME What about m88k, i860?
 
 @ifset GENERIC
 On some machines there are two different line comment characters.  One
@@ -2297,7 +2400,7 @@ in the data section.
 @cindex bss section
 @item bss section
 This section contains zeroed bytes when your program begins running.  It
-is used to hold unitialized variables or common storage.  The length of
+is used to hold uninitialized variables or common storage.  The length of
 each partial program's bss section is important, but because it starts
 out containing zeroed bytes there is no need to store explicit zero
 bytes in the object file.  The bss section was invented to eliminate
@@ -3128,11 +3231,19 @@ Some machine configurations provide additional directives.
 * Float::                       @code{.float @var{flonums}}
 * Func::                        @code{.func}  
 * Global::                      @code{.global @var{symbol}}, @code{.globl @var{symbol}}
+@ifset ELF
+* Hidden::                      @code{.hidden @var{names}}
+@end ifset
+
 * hword::                       @code{.hword @var{expressions}}
 * Ident::                       @code{.ident}
 * If::                          @code{.if @var{absolute expression}}
 * Include::                     @code{.include "@var{file}"}
 * Int::                         @code{.int @var{expressions}}
+@ifset ELF
+* Internal::                    @code{.internal @var{names}}
+@end ifset
+
 * Irp::				@code{.irp @var{symbol},@var{values}}@dots{}
 * Irpc::			@code{.irpc @var{symbol},@var{values}}@dots{}
 * Lcomm::                       @code{.lcomm @var{symbol} , @var{length}}
@@ -3151,14 +3262,26 @@ Some machine configurations provide additional directives.
 
 * Macro::			@code{.macro @var{name} @var{args}}@dots{}
 * MRI::				@code{.mri @var{val}}
-
 * Nolist::                      @code{.nolist}
 * Octa::                        @code{.octa @var{bignums}}
 * Org::                         @code{.org @var{new-lc} , @var{fill}}
 * P2align::                     @code{.p2align @var{abs-expr} , @var{abs-expr}}
+@ifset ELF
+* PopSection::                  @code{.popsection}
+* Previous::                    @code{.previous}
+@end ifset
+
 * Print::			@code{.print @var{string}}
+@ifset ELF
+* Protected::                   @code{.protected @var{names}}
+@end ifset
+
 * Psize::                       @code{.psize @var{lines}, @var{columns}}
 * Purgem::			@code{.purgem @var{name}}
+@ifset ELF
+* PushSection::                 @code{.pushsection @var{name}}
+@end ifset
+
 * Quad::                        @code{.quad @var{bignums}}
 * Rept::			@code{.rept @var{count}}
 * Sbttl::                       @code{.sbttl "@var{subheading}"}
@@ -3170,10 +3293,7 @@ Some machine configurations provide additional directives.
 * Set::                         @code{.set @var{symbol}, @var{expression}}
 * Short::                       @code{.short @var{expressions}}
 * Single::                      @code{.single @var{flonums}}
-@ifset COFF
-* Size::                        @code{.size}
-@end ifset
-
+* Size::                        @code{.size [@var{name} , @var{expression}]}
 * Skip::                        @code{.skip @var{size} , @var{fill}}
 * Sleb128::			@code{.sleb128 @var{expressions}}
 * Space::                       @code{.space @var{size} , @var{fill}}
@@ -3184,23 +3304,29 @@ Some machine configurations provide additional directives.
 * String::                      @code{.string "@var{str}"}
 * Struct::			@code{.struct @var{expression}}
 @ifset ELF
+* SubSection::                  @code{.subsection}
 * Symver::                      @code{.symver @var{name},@var{name2@@nodename}}
 @end ifset
+
 @ifset COFF
 * Tag::                         @code{.tag @var{structname}}
 @end ifset
 
 * Text::                        @code{.text @var{subsection}}
 * Title::                       @code{.title "@var{heading}"}
+* Type::                        @code{.type <@var{int} | @var{name} , @var{type description}>}
+* Uleb128::                     @code{.uleb128 @var{expressions}}
 @ifset COFF
-* Type::                        @code{.type @var{int}}
 * Val::                         @code{.val @var{addr}}
 @end ifset
+
 @ifset ELF
-* Visibility::                  @code{.internal @var{name}, .hidden @var{name}, .protected @var{name}}
+* Version::                     @code{.version "@var{string}"}
+* VTableEntry::                 @code{.vtable_entry @var{table}, @var{offset}}
+* VTableInherit::               @code{.vtable_inherit @var{child}, @var{parent}}
+* Weak::                        @code{.weak @var{names}}
 @end ifset
 
-* Uleb128::                     @code{.uleb128 @var{expressions}}
 * Word::                        @code{.word @var{expressions}}
 * Deprecated::                  Deprecated Directives
 @end menu
@@ -3658,6 +3784,22 @@ partial programs.  You may need the HPPA-only @code{.EXPORT} directive as well.
 @xref{HPPA Directives,, HPPA Assembler Directives}.
 @end ifset
 
+@ifset ELF
+@node Hidden
+@section @code{.hidden @var{names}}
+
+@cindex @code{.hidden} directive
+@cindex Visibility
+This one of the ELF visibility directives.  The other two are
+@code{.internal} (@pxref{Internal,,@code{.internal}}) and 
+@code{.protected} (@pxref{Protected,,@code{.protected}}).
+
+This directive overrides the named symbols default visibility (which is set by
+their binding: local, global or weak).  The directive sets the visibility to
+@code{hidden} which means that the symbols are not visible to other components.
+Such symbols are always considered to be @code{protected} as well. 
+@end ifset
+
 @node hword
 @section @code{.hword @var{expressions}}
 
@@ -3800,6 +3942,23 @@ integers.  On the H8/300H and the Hitachi SH, however, @code{.int} emits
 @end ifset
 @end ifclear
 
+@ifset ELF
+@node Internal
+@section @code{.internal @var{names}}
+
+@cindex @code{.internal} directive
+@cindex Visibility
+This one of the ELF visibility directives.  The other two are
+@code{.hidden} (@pxref{Hidden,,@code{.hidden}}) and 
+@code{.protected} (@pxref{Protected,,@code{.protected}}).
+
+This directive overrides the named symbols default visibility (which is set by
+their binding: local, global or weak).  The directive sets the visibility to
+@code{internal} which means that the symbols are considered to be @code{hidden}
+(ie not visible to other components), and that some extra, processor specific
+processing must also be performed upon the  symbols as well.
+@end ifset
+
 @node Irp
 @section @code{.irp @var{symbol},@var{values}}@dots{}
 
@@ -4227,6 +4386,42 @@ filled in with the value 0x368d (the exact placement of the bytes depends upon
 the endianness of the processor).  If it skips 1 or 3 bytes, the fill value is
 undefined.
 
+@ifset ELF
+@node Previous
+@section @code{.previous}
+
+@cindex @code{.previous} directive
+@cindex Section Stack
+This is one of the ELF section stack manipulation directives.  The others are
+@code{.section} (@pxref{Section}), @code{.subsection} (@pxref{SubSection}),
+@code{.pushsection} (@pxref{PushSection}), and @code{.popsection}
+(@pxref{PopSection}).
+
+This directive swaps the current section (and subsection) with most recently
+referenced section (and subsection) prior to this one.  Multiple
+@code{.previous} directives in a row will flip between two sections (and their
+subsections).
+
+In terms of the section stack, this directive swaps the current section with
+the top section on the section stack.
+@end ifset
+
+@ifset ELF
+@node PopSection
+@section @code{.popsection}
+
+@cindex @code{.popsection} directive
+@cindex Section Stack
+This is one of the ELF section stack manipulation directives.  The others are
+@code{.section} (@pxref{Section}), @code{.subsection} (@pxref{SubSection}), 
+@code{.pushsection} (@pxref{PushSection}), and @code{.previous} 
+(@pxref{Previous}).
+
+This directive replaces the current section (and subsection) with the top
+section (and subsection) on the section stack.  This section is popped off the
+stack. 
+@end ifset
+
 @node Print
 @section @code{.print @var{string}}
 
@@ -4234,6 +4429,23 @@ undefined.
 @code{@value{AS}} will print @var{string} on the standard output during
 assembly.  You must put @var{string} in double quotes.
 
+@ifset ELF
+@node Protected
+@section @code{.protected @var{names}}
+
+@cindex @code{.protected} directive
+@cindex Visibility
+This one of the ELF visibility directives.  The other two are
+@code{.hidden} (@pxref{Hidden}) and @code{.internal} (@pxref{Internal}).
+
+This directive overrides the named symbols default visibility (which is set by
+their binding: local, global or weak).  The directive sets the visibility to
+@code{protected} which means that any references to the symbols from within the
+components that defines them must be resolved to the definition in that
+component, even if a definition in another component would normally preempt
+this. 
+@end ifset
+
 @node Psize
 @section @code{.psize @var{lines} , @var{columns}}
 
@@ -4261,6 +4473,22 @@ those explicitly specified with @code{.eject}.
 Undefine the macro @var{name}, so that later uses of the string will not be
 expanded.  @xref{Macro}.
 
+@ifset ELF
+@node PushSection
+@section @code{.pushsection @var{name} , @var{subsection}}
+
+@cindex @code{.pushsection} directive
+@cindex Section Stack
+This is one of the ELF section stack manipulation directives.  The others are
+@code{.section} (@pxref{Section}), @code{.subsection} (@pxref{SubSection}), 
+@code{.popsection} (@pxref{PopSection}), and @code{.previous} 
+(@pxref{Previous}).
+
+This directive is a synonym for @code{.section}.  It pushes the current section
+(and subsection) onto the top of the section stack, and then replaces the
+current section and subsection with @code{name} and @code{subsection}.
+@end ifset
+
 @node Quad
 @section @code{.quad @var{bignums}}
 
@@ -4338,7 +4566,7 @@ accepts this directive but ignores it.
 @end ifset
 
 @node Section
-@section @code{.section @var{name}}
+@section @code{.section @var{name}} (COFF version)
 
 @cindex @code{section} directive
 @cindex named section
@@ -4349,9 +4577,9 @@ This directive is only supported for targets that actually support arbitrarily
 named sections; on @code{a.out} targets, for example, it is not accepted, even
 with a standard @code{a.out} section name.
 
-@ifset COFF
 For COFF targets, the @code{.section} directive is used in one of the following
 ways:
+
 @smallexample
 .section @var{name}[, "@var{flags}"]
 .section @var{name}[, @var{subsegment}]
@@ -4382,15 +4610,28 @@ loaded and writable.
 
 If the optional argument to the @code{.section} directive is not quoted, it is
 taken as a subsegment number (@pxref{Sub-Sections}).
-@end ifset
 
+
+@section @code{.section @var{name}} (ELF version)
+
+@cindex @code{section} directive
+@cindex named section
 @ifset ELF
+@cindex Section Stack
+This is one of the ELF section stack manipulation directives.  The others are
+@code{.subsection} (@pxref{SubSection}), @code{.pushsection} 
+(@pxref{PushSection}), @code{.popsection} (@pxref{PopSection}), and
+@code{.previous} (@pxref{Previous}).
+@end ifset
+
 For ELF targets, the @code{.section} directive is used like this:
+
 @smallexample
-.section @var{name}[, "@var{flags}"[, @@@var{type}]]
+.section @var{name} [, "@var{flags}"[, @@@var{type}]]
 @end smallexample
+
 The optional @var{flags} argument is a quoted string which may contain any
-combintion of the following characters:
+combination of the following characters:
 @table @code
 @item a
 section is allocatable
@@ -4415,9 +4656,11 @@ executable.  The section will contain data.
 
 For ELF targets, the assembler supports another type of @code{.section}
 directive for compatibility with the Solaris assembler:
+
 @smallexample
 .section "@var{name}"[, @var{flags}...]
 @end smallexample
+
 Note that the section name is quoted.  There may be a sequence of comma
 separated flags:
 @table @code
@@ -4428,7 +4671,11 @@ section is writable
 @item #execinstr
 section is executable
 @end table
-@end ifset
+
+This directive replaces the current section and subsection.  The replaced
+section and subsection are pushed onto the section stack.  See the contents of
+the gas testsuite directory @code{gas/testsuite/gas/elf} for some examples of
+how this directive and the other section stack directives work.
 
 @node Set
 @section @code{.set @var{symbol}, @var{expression}}
@@ -4489,21 +4736,27 @@ numbers in @sc{ieee} format.
 @end ifset
 @end ifclear
 
-@ifset COFF
 @node Size
-@section @code{.size}
+@section @code{.size} (COFF version)
 
 @cindex @code{size} directive
 This directive is generated by compilers to include auxiliary debugging
 information in the symbol table.  It is only permitted inside
 @code{.def}/@code{.endef} pairs.
-@ifset BOUT
 
+@ifset BOUT
 @samp{.size} is only meaningful when generating COFF format output; when
 @code{@value{AS}} is generating @code{b.out}, it accepts this directive but
 ignores it.
 @end ifset
-@end ifset
+
+@section @code{.size @var{name} , @var{expression}} (ELF version)
+@cindex @code{size} directive
+
+This directive is used to set the size associated with a symbol @var{name}.
+The size in bytes is computed from @var{expression} which can make use of label
+arithmetic.  This directive is typically used to set the size of function
+symbols.
 
 @node Sleb128
 @section @code{.sleb128 @var{expressions}}
@@ -4658,6 +4911,22 @@ use a @code{.section} directive of some sort to change to some other section
 before further assembly.
 
 @ifset ELF
+@node SubSection
+@section @code{.subsection @var{name}}
+
+@cindex @code{.subsection} directive
+@cindex Section Stack
+This is one of the ELF section stack manipulation directives.  The others are
+@code{.section} (@pxref{Section}), @code{.pushsection} (@pxref{PushSection}), 
+@code{.popsection} (@pxref{PopSection}), and @code{.previous} 
+(@pxref{Previous}).
+
+This directive replaces the current subsection with @code{name}.  The current
+section is not changed.  The replaced subsection is put onto the section stack
+in place of the then current top of stack subsection.
+@end ifset
+
+@ifset ELF
 @node Symver
 @section @code{.symver}
 @cindex @code{symver} directive
@@ -4670,12 +4939,12 @@ There are cases where it may make sense to use this in objects to be bound
 into an application itself so as to override a versioned symbol from a
 shared library.
 
-For ELF targets, the @code{.symver} directive is used like this:
+For ELF targets, the @code{.symver} directive can be used like this:
 @smallexample
 .symver @var{name}, @var{name2@@nodename}
 @end smallexample
-In this case, the symbol @var{name} must exist and be defined within the file
-being assembled.  The @code{.versym} directive effectively creates a symbol
+If the symbol @var{name} is defined within the file
+being assembled, the @code{.symver} directive effectively creates a symbol
 alias with the name @var{name2@@nodename}, and in fact the main reason that we
 just don't try and create a regular alias is that the @var{@@} character isn't
 permitted in symbol names.  The @var{name2} part of the name is the actual name
@@ -4688,6 +4957,29 @@ the name of a node specified in the version script supplied to the linker when
 building a shared library.  If you are attempting to override a versioned
 symbol from a shared library, then @var{nodename} should correspond to the
 nodename of the symbol you are trying to override.
+
+If the symbol @var{name} is not defined within the file being assembled, all
+references to @var{name} will be changed to @var{name2@@nodename}.  If no
+reference to @var{name} is made, @var{name2@@nodename} will be removed from the
+symbol table.
+
+Another usage of the @code{.symver} directive is:
+@smallexample
+.symver @var{name}, @var{name2@@@@nodename}
+@end smallexample
+In this case, the symbol @var{name} must exist and be defined within
+the file being assembled. It is similar to @var{name2@@nodename}. The
+difference is @var{name2@@@@nodename} will also be used to resolve
+references to @var{name2} by the linker.
+
+The third usage of the @code{.symver} directive is:
+@smallexample
+.symver @var{name}, @var{name2@@@@@@nodename}
+@end smallexample
+When @var{name} is not defined within the
+file being assembled, it is treated as @var{name2@@nodename}. When
+@var{name} is defined within the file being assembled, the symbol
+name, @var{name}, will be changed to @var{name2@@@@nodename}.
 @end ifset
 
 @ifset COFF
@@ -4729,22 +5021,55 @@ source file name and pagenumber) when generating assembly listings.
 This directive affects subsequent pages, as well as the current page if
 it appears within ten lines of the top of a page.
 
-@ifset COFF
 @node Type
-@section @code{.type @var{int}}
+@section @code{.type @var{int}} (COFF version)
 
 @cindex COFF symbol type
 @cindex symbol type, COFF
 @cindex @code{type} directive
 This directive, permitted only within @code{.def}/@code{.endef} pairs,
 records the integer @var{int} as the type attribute of a symbol table entry.
-@ifset BOUT
 
+@ifset BOUT
 @samp{.type} is associated only with COFF format output; when
 @code{@value{AS}} is configured for @code{b.out} output, it accepts this
 directive but ignores it.
 @end ifset
-@end ifset
+
+@section @code{.type @var{name} , @var{type description}} (ELF version)
+
+@cindex ELF symbol type
+@cindex symbol type, ELF
+@cindex @code{type} directive
+This directive is used to set the type of symbol @var{name} to be either a
+function symbol or an object symbol.  There are five different syntaxes
+supported for the @var{type description} field, in order to provide
+compatibility with various other assemblers.  The syntaxes supported are:
+
+@smallexample
+  .type <name>,#function
+  .type <name>,#object
+
+  .type <name>,@@function
+  .type <name>,@@object
+
+  .type <name>,%function
+  .type <name>,%object
+  
+  .type <name>,"function"
+  .type <name>,"object"
+  
+  .type <name> STT_FUNCTION
+  .type <name> STT_OBJECT
+@end smallexample
+
+@node Uleb128
+@section @code{.uleb128 @var{expressions}}
+
+@cindex @code{uleb128} directive
+@var{uleb128} stands for ``unsigned little endian base 128.''  This is a 
+compact, variable length representation of numbers used by the DWARF
+symbolic debugging format.  @xref{Sleb128,@code{.sleb128}}.
 
 @ifset COFF
 @node Val
@@ -4763,46 +5088,40 @@ configured for @code{b.out}, it accepts this directive but ignores it.
 @end ifset
 @end ifset
 
-@node Uleb128
-@section @code{.uleb128 @var{expressions}}
-
-@cindex @code{uleb128} directive
-@var{uleb128} stands for ``unsigned little endian base 128.''  This is a 
-compact, variable length representation of numbers used by the DWARF
-symbolic debugging format.  @xref{Sleb128,@code{.sleb128}}.
-
 @ifset ELF
-@node Visibility
-@section @code{.internal}, @code{.hidden}, @code{.protected}
-@cindex @code{internal} directive
-@cindex @code{hidden} directive
-@cindex @code{protected} directive
-@cindex symbol visibility
+@node Version
+@section @code{.version "@var{string}"}
 
-These directives can be used to set the visibility of a specified symbol.  By
-default a symbol's visibility is set by its binding (local, global or weak),
-but these directives can be used to override that.
+@cindex @code{.version}
+This directive creates a @code{.note} section and places into it an ELF
+formatted note of type NT_VERSION.  The note's name is set to @code{string}.
+@end ifset
 
-A visibility of @code{protected} means that any references to the symbol from
-within the component that defines the symbol must be resolved to the definition
-in that component, even if a definition in another component would normally
-preempt this.
+@ifset ELF
+@node VTableEntry
+@section @code{.vtable_entry @var{table}, @var{offset}}
 
-A visibility of @code{hidden} means that the symbol is not visible to other 
-components.  Such a symbol is always considered to be protected as well.
+@cindex @code{.vtable_entry}
+This directive finds or creates a symbol @code{table} and creates a
+@code{VTABLE_ENTRY} relocation for it with an addend of @code{offset}.
 
-A visibility of @code{internal} is the same as a visibility of @code{hidden},
-except that some extra, processor specific processing must also be performed
-upon the symbol. 
+@node VTableInherit
+@section @code{.vtable_inherit @var{child}, @var{parent}}
 
-For ELF targets, the directives are used like this:
+@cindex @code{.vtable_inherit}
+This directive finds the symbol @code{child} and finds or creates the symbol
+@code{parent} and then creates a @code{VTABLE_INHERIT} relocation for the
+parent whose addend is the value of the child symbol.  As a special case the
+parent name of @code{0} is treated as refering the @code{*ABS*} section.
+@end ifset
 
-@smallexample
-.internal @var{name}
-.hidden @var{name}
-.protected @var{name}
-@end smallexample
+@ifset ELF
+@node Weak
+@section @code{.weak @var{names}}
 
+@cindex @code{.weak}
+This directive sets the weak attribute on the comma separated list of symbol
+@code{names}.  If the symbols do not already exist, they will be created.
 @end ifset
 
 @node Word
@@ -4842,7 +5161,7 @@ interest to you does 32-bit addressing (or doesn't require it;
 
 @end ifset
 In order to assemble compiler output into something that works,
-@code{@value{AS}} occasionlly does strange things to @samp{.word} directives.
+@code{@value{AS}} occasionally does strange things to @samp{.word} directives.
 Directives of the form @samp{.word sym1-sym2} are often emitted by
 compilers as part of jump tables.  Therefore, when @code{@value{AS}} assembles a
 directive of the form @samp{.word sym1-sym2}, and the difference between
@@ -4929,14 +5248,23 @@ subject, see the hardware manufacturer's manual.
 * ESA/390-Dependent::           IBM ESA/390 Dependent Features
 @end ifset
 @ifset I80386
-* i386-Dependent::              Intel 80386 Dependent Features
+* i386-Dependent::              Intel 80386 and AMD x86-64 Dependent Features
+@end ifset
+@ifset I860
+* i860-Dependent::              Intel 80860 Dependent Features
 @end ifset
 @ifset I960
 * i960-Dependent::              Intel 80960 Dependent Features
 @end ifset
+@ifset M32R
+* M32R-Dependent::              M32R Dependent Features
+@end ifset
 @ifset M680X0
 * M68K-Dependent::              M680x0 Dependent Features
 @end ifset
+@ifset M68HC11
+* M68HC11-Dependent::           M68HC11 and 68HC12 Dependent Features
+@end ifset
 @ifset MIPS
 * MIPS-Dependent::              MIPS Dependent Features
 @end ifset
@@ -4949,6 +5277,9 @@ subject, see the hardware manufacturer's manual.
 @ifset SPARC
 * Sparc-Dependent::             SPARC Dependent Features
 @end ifset
+@ifset TIC54X
+* TIC54X-Dependent::            TI TMS320C54x Dependent Features
+@end ifset
 @ifset V850
 * V850-Dependent::              V850 Dependent Features
 @end ifset
@@ -4972,80 +5303,7 @@ subject, see the hardware manufacturer's manual.
 @c in both conditional blocks.
 
 @ifset ARC
-@ifset GENERIC
-@page
-@node ARC-Dependent
-@chapter ARC Dependent Features
-@end ifset
-@ifclear GENERIC
-@node Machine Dependencies
-@chapter ARC Dependent Features
-@end ifclear
-
-@cindex ARC support
-@menu
-* ARC-Opts::                    Options
-* ARC-Float::                   Floating Point
-* ARC-Directives::              Sparc Machine Directives
-@end menu
-
-@node ARC-Opts
-@section Options
-
-@cindex options for ARC
-@cindex ARC options
-@cindex architectures, ARC
-@cindex ARC architectures
-The ARC chip family includes several successive levels (or other
-variants) of chip, using the same core instruction set, but including
-a few additional instructions at each level.
-
-By default, @code{@value{AS}} assumes the core instruction set (ARC
-base).  The @code{.cpu} pseudo-op is intended to be used to select
-the variant.
-
-@table @code
-@cindex @code{-mbig-endian} option (ARC)
-@cindex @code{-mlittle-endian} option (ARC)
-@cindex ARC big-endian output
-@cindex ARC little-endian output
-@cindex big-endian output, ARC
-@cindex little-endian output, ARC
-@item -mbig-endian
-@itemx -mlittle-endian
-Any @sc{arc} configuration of @code{@value{AS}} can select big-endian or
-little-endian output at run time (unlike most other @sc{gnu} development
-tools, which must be configured for one or the other).  Use
-@samp{-mbig-endian} to select big-endian output, and @samp{-mlittle-endian}
-for little-endian.
-@end table
-
-@node ARC-Float
-@section Floating Point
-
-@cindex floating point, ARC (@sc{ieee})
-@cindex ARC floating point (@sc{ieee})
-The ARC cpu family currently does not have hardware floating point
-support.  Software floating point support is provided by @code{GCC}
-and uses @sc{ieee} floating-point numbers.
-
-@node ARC-Directives
-@section ARC Machine Directives
-
-@cindex ARC machine directives
-@cindex machine directives, ARC
-The ARC version of @code{@value{AS}} supports the following additional
-machine directives:
-
-@table @code
-@item .cpu
-@cindex @code{cpu} directive, SPARC
-This must be followed by the desired cpu.
-The ARC is intended to be customizable, @code{.cpu} is used to
-select the desired variant [though currently there are none].
-
-@end table
-
+@include c-arc.texi
 @end ifset
 
 @ifset A29K
@@ -5103,15 +5361,26 @@ family.
 @include c-i386.texi
 @end ifset
 
+@ifset I860
+@include c-i860.texi
+@end ifset
+
 @ifset I960
 @include c-i960.texi
 @end ifset
 
+@ifset M32R
+@include c-m32r.texi
+@end ifset
 
 @ifset M680X0
 @include c-m68k.texi
 @end ifset
 
+@ifset M68HC11
+@include c-m68hc11.texi
+@end ifset
+
 @ifset MIPS
 @include c-mips.texi
 @end ifset
@@ -5132,6 +5401,10 @@ family.
 @include c-sparc.texi
 @end ifset
 
+@ifset TIC54X
+@include c-tic54x.texi
+@end ifset
+
 @ifset Z8000
 @include c-z8k.texi
 @end ifset
@@ -5212,7 +5485,7 @@ individuals in the file @file{etc/SERVICE} in the @sc{gnu} Emacs
 distribution.
 
 In any event, we also recommend that you send bug reports for @code{@value{AS}}
-to @samp{bug-gnu-utils@@gnu.org}.
+to @samp{bug-binutils@@gnu.org}.
 
 The fundamental principle of reporting bugs usefully is this:
 @strong{report all the facts}.  If you are not sure whether to state a
@@ -5435,6 +5708,9 @@ Linas Vepstas added GAS support for the ESA/390 "IBM 370" architecture.
 Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote GAS and BFD
 support for openVMS/Alpha.
 
+Timothy Wall, Michael Hayes, and Greg Smart contributed to the various tic*
+flavors.
+
 Several engineers at Cygnus Support have also provided many small bug fixes and
 configuration enhancements.
 
@@ -5443,6 +5719,369 @@ you have contributed significant work and are not mentioned on this list, and
 want to be, let us know.  Some of the history has been lost; we are not
 intentionally leaving anyone out.
 
+@node GNU Free Documentation License
+@chapter GNU Free Documentation License
+
+                GNU Free Documentation License
+                
+                   Version 1.1, March 2000
+
+ Copyright (C) 2000  Free Software Foundation, Inc.
+  59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+     
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+0. PREAMBLE
+
+The purpose of this License is to make a manual, textbook, or other
+written document "free" in the sense of freedom: to assure everyone
+the effective freedom to copy and redistribute it, with or without
+modifying it, either commercially or noncommercially.  Secondarily,
+this License preserves for the author and publisher a way to get
+credit for their work, while not being considered responsible for
+modifications made by others.
+
+This License is a kind of "copyleft", which means that derivative
+works of the document must themselves be free in the same sense.  It
+complements the GNU General Public License, which is a copyleft
+license designed for free software.
+
+We have designed this License in order to use it for manuals for free
+software, because free software needs free documentation: a free
+program should come with manuals providing the same freedoms that the
+software does.  But this License is not limited to software manuals;
+it can be used for any textual work, regardless of subject matter or
+whether it is published as a printed book.  We recommend this License
+principally for works whose purpose is instruction or reference.
+
+
+1. APPLICABILITY AND DEFINITIONS
+
+This License applies to any manual or other work that contains a
+notice placed by the copyright holder saying it can be distributed
+under the terms of this License.  The "Document", below, refers to any
+such manual or work.  Any member of the public is a licensee, and is
+addressed as "you".
+
+A "Modified Version" of the Document means any work containing the
+Document or a portion of it, either copied verbatim, or with
+modifications and/or translated into another language.
+
+A "Secondary Section" is a named appendix or a front-matter section of
+the Document that deals exclusively with the relationship of the
+publishers or authors of the Document to the Document's overall subject
+(or to related matters) and contains nothing that could fall directly
+within that overall subject.  (For example, if the Document is in part a
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+connection with the subject or with related matters, or of legal,
+commercial, philosophical, ethical or political position regarding
+them.
+
+The "Invariant Sections" are certain Secondary Sections whose titles
+are designated, as being those of Invariant Sections, in the notice
+that says that the Document is released under this License.
+
+The "Cover Texts" are certain short passages of text that are listed,
+as Front-Cover Texts or Back-Cover Texts, in the notice that says that
+the Document is released under this License.
+
+A "Transparent" copy of the Document means a machine-readable copy,
+represented in a format whose specification is available to the
+general public, whose contents can be viewed and edited directly and
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+
+Examples of suitable formats for Transparent copies include plain
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+machine-generated HTML produced by some word processors for output
+purposes only.
+
+The "Title Page" means, for a printed book, the title page itself,
+plus such following pages as are needed to hold, legibly, the material
+this License requires to appear in the title page.  For works in
+formats which do not have any title page as such, "Title Page" means
+the text near the most prominent appearance of the work's title,
+preceding the beginning of the body of the text.
+
+
+2. VERBATIM COPYING
+
+You may copy and distribute the Document in any medium, either
+commercially or noncommercially, provided that this License, the
+copyright notices, and the license notice saying this License applies
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+
+You may also lend copies, under the same conditions stated above, and
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+
+
+3. COPYING IN QUANTITY
+
+If you publish printed copies of the Document numbering more than 100,
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+
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+
+4. MODIFICATIONS
+
+You may copy and distribute a Modified Version of the Document under
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+D. Preserve all the copyright notices of the Document.
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+
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+instead of saying which ones are invariant.  If you have no
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+to permit their use in free software.
+
 @node Index
 @unnumbered Index
 
diff --git a/contrib/binutils/gas/doc/c-arm.texi b/contrib/binutils/gas/doc/c-arm.texi
index e354982..d3de43b 100644
--- a/contrib/binutils/gas/doc/c-arm.texi
+++ b/contrib/binutils/gas/doc/c-arm.texi
@@ -32,15 +32,18 @@
 
 @cindex @code{-marm} command line option, ARM
 @item -marm@code{[2|250|3|6|60|600|610|620|7|7m|7d|7dm|7di|7dmi|70|700|700i|710|710c|7100|7500|7500fe|7tdmi|8|810|9|9tdmi|920|strongarm|strongarm110|strongarm1100]}
+@itemx -mxscale
 This option specifies the target processor.  The assembler will issue an
 error message if an attempt is made to assemble an instruction which
 will not execute on the target processor.
 
 @cindex @code{-marmv} command line option, ARM
-@item -marmv@code{[2|2a|3|3m|4|4t|5|5t]}
+@item -marmv@code{[2|2a|3|3m|4|4t|5|5t|5te]}
 This option specifies the target architecture.  The assembler will issue
 an error message if an attempt is made to assemble an instruction which
 will not execute on the target architecture.
+The option @code{-marmv5te} specifies that v5t architecture should be
+used with the El Segundo extensions enabled.
 
 @cindex @code{-mthumb} command line option, ARM
 @item -mthumb
@@ -51,13 +54,13 @@ This option specifies that only Thumb instructions should be assembled.
 This option specifies that any Arm or Thumb instruction should be assembled.
 
 @cindex @code{-mfpa} command line option, ARM
-@item -mfpa @var{[10|11]}
+@item -mfpa @code{[10|11]}
 This option specifies the floating point architecture in use on the
 target processor. 
 
 @cindex @code{-mfpe-old} command line option, ARM
 @item -mfpe-old
-Do not allow the assemble of floating point multiple instructions.
+Do not allow the assembly of floating point multiple instructions.
 
 @cindex @code{-mno-fpu} command line option, ARM
 @item -mno-fpu
@@ -69,11 +72,19 @@ This option specifies that the output generated by the assembler should
 be marked as supporting interworking.
 
 @cindex @code{-mapcs} command line option, ARM
-@item -mapcs @var{[26|32]}
+@item -mapcs @code{[26|32]}
 This option specifies that the output generated by the assembler should
 be marked as supporting the indicated version of the Arm Procedure.
 Calling Standard.
 
+@cindex @code{-matpcs} command line option, ARM
+@item -matpcs
+This option specifies that the output generated by the assembler should 
+be marked as supporting the Arm/Thumb Procedure Calling Standard.  If
+enabled this option will cause the assembler to create an empty
+debugging section in the object file called .arm.atpcs.  Debuggers can
+use this to determine the ABI being used by.
+
 @cindex @code{-mapcs-float} command line option, ARM
 @item -mapcs-float
 This indicates the the floating point variant of the APCS should be
@@ -98,7 +109,8 @@ be marked as being encoded for a little-endian processor.
 @cindex @code{-k} command line option, ARM
 @cindex PIC code generation for ARM
 @item -k
-This option enables the generation of PIC (position independent code).
+This option specifies that the output of the assembler should be marked
+as position-independent code (PIC).
 
 @cindex @code{-moabi} command line option, ARM
 @item -moabi
@@ -129,8 +141,8 @@ the first character of a line, the whole line is treated as a comment.
 @cindex line separator, ARM
 @cindex statement separator, ARM
 @cindex ARM line separator
-On ARM systems running the GNU/Linux operating system, @samp{;} can be
-used instead of a newline to separate statements.
+The @samp{;} character can be used instead of a newline to separate
+statements.
 
 @cindex immediate character, ARM
 @cindex ARM immediate character
@@ -180,7 +192,7 @@ example:
 @end smallexample
 
 @cindex @code{code} directive, ARM
-@item .code @var{[16|32]}
+@item .code @code{[16|32]}
 This directive selects the instruction set being generated. The value 16
 selects Thumb, with the value 32 selecting ARM.
 
@@ -203,7 +215,8 @@ This directive specifies that the following symbol is the name of a
 Thumb encoded function.  This information is necessary in order to allow
 the assembler and linker to generate correct code for interworking
 between Arm and Thumb instructions and should be used even if
-interworking is not going to be performed.
+interworking is not going to be performed.  The presence of this
+directive also implies @code{.thumb}
 
 @cindex @code{thumb_set} directive, ARM
 @item .thumb_set
@@ -277,7 +290,7 @@ will not make use of the literal pool.
 @end smallexample
 
 This instruction will load the address of @var{label} into the indicated
-register.  The instruction will evaluate to one or two a PC relative ADD
+register.  The instruction will evaluate to one or two PC relative ADD
 or SUB instructions depending upon where the label is located.  If a
 second instruction is not needed a NOP instruction will be generated in
 its place, so that this instruction is always 8 bytes long.
diff --git a/contrib/binutils/gas/doc/c-i386.texi b/contrib/binutils/gas/doc/c-i386.texi
index 8a9c85a..110d560 100644
--- a/contrib/binutils/gas/doc/c-i386.texi
+++ b/contrib/binutils/gas/doc/c-i386.texi
@@ -13,6 +13,12 @@
 
 @cindex i386 support
 @cindex i80306 support
+@cindex x86-64 support
+
+The i386 version @code{@value{AS}} supports both the original Intel 386
+architecture in both 16 and 32-bit mode as well as AMD x86-64 architecture
+extending the Intel architecture to 64-bits.
+
 @menu
 * i386-Options::                Options
 * i386-Syntax::                 AT&T Syntax versus Intel Syntax
@@ -24,6 +30,7 @@
 * i386-Float::                  Floating Point
 * i386-SIMD::                   Intel's MMX and AMD's 3DNow! SIMD Operations
 * i386-16bit::                  Writing 16-bit Code
+* i386-Arch::                   Specifying an x86 CPU architecture
 * i386-Bugs::                   AT&T Syntax bugs
 * i386-Notes::                  Notes
 @end menu
@@ -31,17 +38,52 @@
 @node i386-Options
 @section Options
 
-@cindex options for i386 (none)
-@cindex i386 options (none)
-The 80386 has no machine dependent options.
+@cindex options for i386
+@cindex options for x86-64
+@cindex i386 options
+@cindex x86-64 options 
+
+The i386 version of @code{@value{AS}} has a few machine
+dependent options:
+
+@table @code
+@cindex @samp{--32} option, i386
+@cindex @samp{--32} option, x86-64
+@cindex @samp{--64} option, i386
+@cindex @samp{--64} option, x86-64
+@item --32 | --64
+Select the word size, either 32 bits or 64 bits. Selecting 32-bit
+implies Intel i386 architecture, while 64-bit implies AMD x86-64
+architecture.
+
+These options are only available with the ELF object file format, and
+require that the necessary BFD support has been included (on a 32-bit
+platform you have to add --enable-64-bit-bfd to configure enable 64-bit
+usage and use x86-64 as target platform).
+@end table
 
 @node i386-Syntax
 @section AT&T Syntax versus Intel Syntax
 
+@cindex i386 intel_syntax pseudo op
+@cindex intel_syntax pseudo op, i386
+@cindex i386 att_syntax pseudo op
+@cindex att_syntax pseudo op, i386
 @cindex i386 syntax compatibility
 @cindex syntax compatibility, i386
-In order to maintain compatibility with the output of @code{@value{GCC}},
-@code{@value{AS}} supports AT&T System V/386 assembler syntax.  This is quite
+@cindex x86-64 intel_syntax pseudo op
+@cindex intel_syntax pseudo op, x86-64
+@cindex x86-64 att_syntax pseudo op
+@cindex att_syntax pseudo op, x86-64
+@cindex x86-64 syntax compatibility
+@cindex syntax compatibility, x86-64
+
+@code{@value{AS}} now supports assembly using Intel assembler syntax.
+@code{.intel_syntax} selects Intel mode, and @code{.att_syntax} switches
+back to the usual AT&T mode for compatibility with the output of
+@code{@value{GCC}}.  Either of these directives may have an optional
+argument, @code{prefix}, or @code{noprefix} specifying whether registers
+require a @samp{%} prefix.  AT&T System V/386 assembler syntax is quite
 different from Intel syntax.  We mention these differences because
 almost all 80386 documents use Intel syntax.  Notable differences
 between the two syntaxes are:
@@ -53,6 +95,14 @@ between the two syntaxes are:
 @cindex jump/call operands, i386
 @cindex i386 jump/call operands
 @cindex operand delimiters, i386
+
+@cindex immediate operands, x86-64
+@cindex x86-64 immediate operands
+@cindex register operands, x86-64
+@cindex x86-64 register operands
+@cindex jump/call operands, x86-64
+@cindex x86-64 jump/call operands
+@cindex operand delimiters, x86-64
 @itemize @bullet
 @item
 AT&T immediate operands are preceded by @samp{$}; Intel immediate
@@ -63,6 +113,8 @@ operands are prefixed by @samp{*}; they are undelimited in Intel syntax.
 
 @cindex i386 source, destination operands
 @cindex source, destination operands; i386
+@cindex x86-64 source, destination operands
+@cindex source, destination operands; x86-64
 @item
 AT&T and Intel syntax use the opposite order for source and destination
 operands.  Intel @samp{add eax, 4} is @samp{addl $4, %eax}.  The
@@ -74,17 +126,23 @@ reversed order.  @ref{i386-Bugs}.
 @cindex mnemonic suffixes, i386
 @cindex sizes operands, i386
 @cindex i386 size suffixes
+@cindex mnemonic suffixes, x86-64
+@cindex sizes operands, x86-64
+@cindex x86-64 size suffixes
 @item
 In AT&T syntax the size of memory operands is determined from the last
 character of the instruction mnemonic.  Mnemonic suffixes of @samp{b},
-@samp{w}, and @samp{l} specify byte (8-bit), word (16-bit), and long
-(32-bit) memory references.  Intel syntax accomplishes this by prefixing
-memory operands (@emph{not} the instruction mnemonics) with @samp{byte
-ptr}, @samp{word ptr}, and @samp{dword ptr}.  Thus, Intel @samp{mov al,
-byte ptr @var{foo}} is @samp{movb @var{foo}, %al} in AT&T syntax.
+@samp{w}, @samp{l} and @samp{q} specify byte (8-bit), word (16-bit), long
+(32-bit) and quadruple word (64-bit) memory references.  Intel syntax accomplishes
+this by prefixing memory operands (@emph{not} the instruction mnemonics) with
+@samp{byte ptr}, @samp{word ptr}, @samp{dword ptr} and @samp{qword ptr}.  Thus,
+Intel @samp{mov al, byte ptr @var{foo}} is @samp{movb @var{foo}, %al} in AT&T
+syntax.
 
 @cindex return instructions, i386
 @cindex i386 jump, call, return
+@cindex return instructions, x86-64
+@cindex x86-64 jump, call, return
 @item
 Immediate form long jumps and calls are
 @samp{lcall/ljmp $@var{section}, $@var{offset}} in AT&T syntax; the
@@ -96,6 +154,8 @@ is @samp{lret $@var{stack-adjust}} in AT&T syntax; Intel syntax is
 
 @cindex sections, i386
 @cindex i386 sections
+@cindex sections, x86-64
+@cindex x86-64 sections
 @item
 The AT&T assembler does not provide support for multiple section
 programs.  Unix style systems expect all programs to be single sections.
@@ -106,17 +166,20 @@ programs.  Unix style systems expect all programs to be single sections.
 
 @cindex i386 instruction naming
 @cindex instruction naming, i386
+@cindex x86-64 instruction naming
+@cindex instruction naming, x86-64
+
 Instruction mnemonics are suffixed with one character modifiers which
-specify the size of operands.  The letters @samp{b}, @samp{w}, and
-@samp{l} specify byte, word, and long operands.  If no suffix is
-specified by an instruction then @code{@value{AS}} tries to fill in the
-missing suffix based on the destination register operand (the last one
-by convention).  Thus, @samp{mov %ax, %bx} is equivalent to @samp{movw
-%ax, %bx}; also, @samp{mov $1, %bx} is equivalent to @samp{movw $1,
-%bx}.  Note that this is incompatible with the AT&T Unix assembler which
-assumes that a missing mnemonic suffix implies long operand size.  (This
-incompatibility does not affect compiler output since compilers always
-explicitly specify the mnemonic suffix.)
+specify the size of operands.  The letters @samp{b}, @samp{w}, @samp{l}
+and @samp{q} specify byte, word, long and quadruple word operands.  If
+no suffix is specified by an instruction then @code{@value{AS}} tries to
+fill in the missing suffix based on the destination register operand
+(the last one by convention).  Thus, @samp{mov %ax, %bx} is equivalent
+to @samp{movw %ax, %bx}; also, @samp{mov $1, %bx} is equivalent to
+@samp{movw $1, bx}.  Note that this is incompatible with the AT&T Unix
+assembler which assumes that a missing mnemonic suffix implies long
+operand size.  (This incompatibility does not affect compiler output
+since compilers always explicitly specify the mnemonic suffix.)
 
 Almost all instructions have the same names in AT&T and Intel format.
 There are a few exceptions.  The sign extend and zero extend
@@ -130,10 +193,14 @@ are tacked on to this base name, the @emph{from} suffix before the
 @emph{to} suffix.  Thus, @samp{movsbl %al, %edx} is AT&T syntax for
 ``move sign extend @emph{from} %al @emph{to} %edx.''  Possible suffixes,
 thus, are @samp{bl} (from byte to long), @samp{bw} (from byte to word),
-and @samp{wl} (from word to long).
+@samp{wl} (from word to long), @samp{bq} (from byte to quadruple word),
+@samp{wq} (from word to quadruple word), and @samp{lq} (from long to
+quadruple word).
 
 @cindex conversion instructions, i386
 @cindex i386 conversion instructions
+@cindex conversion instructions, x86-64
+@cindex x86-64 conversion instructions
 The Intel-syntax conversion instructions
 
 @itemize @bullet
@@ -148,14 +215,25 @@ The Intel-syntax conversion instructions
 
 @item
 @samp{cdq} --- sign-extend dword in @samp{%eax} to quad in @samp{%edx:%eax},
+
+@item
+@samp{cdqe} --- sign-extend dword in @samp{%eax} to quad in @samp{%rax}
+(x86-64 only),
+
+@item
+@samp{cdo} --- sign-extend quad in @samp{%rax} to octuple in
+@samp{%rdx:%rax} (x86-64 only),
 @end itemize
 
 @noindent
-are called @samp{cbtw}, @samp{cwtl}, @samp{cwtd}, and @samp{cltd} in
-AT&T naming.  @code{@value{AS}} accepts either naming for these instructions.
+are called @samp{cbtw}, @samp{cwtl}, @samp{cwtd}, @samp{cltd}, @samp{cltq}, and
+@samp{cqto} in AT&T naming.  @code{@value{AS}} accepts either naming for these
+instructions.
 
 @cindex jump instructions, i386
 @cindex call instructions, i386
+@cindex jump instructions, x86-64
+@cindex call instructions, x86-64
 Far call/jump instructions are @samp{lcall} and @samp{ljmp} in
 AT&T syntax, but are @samp{call far} and @samp{jump far} in Intel
 convention.
@@ -165,6 +243,8 @@ convention.
 
 @cindex i386 registers
 @cindex registers, i386
+@cindex x86-64 registers
+@cindex registers, x86-64
 Register operands are always prefixed with @samp{%}.  The 80386 registers
 consist of
 
@@ -204,6 +284,44 @@ the 2 test registers @samp{%tr6} and @samp{%tr7}.
 the 8 floating point register stack @samp{%st} or equivalently
 @samp{%st(0)}, @samp{%st(1)}, @samp{%st(2)}, @samp{%st(3)},
 @samp{%st(4)}, @samp{%st(5)}, @samp{%st(6)}, and @samp{%st(7)}.
+These registers are overloaded by 8 MMX registers @samp{%mm0},
+@samp{%mm1}, @samp{%mm2}, @samp{%mm3}, @samp{%mm4}, @samp{%mm5},
+@samp{%mm6} and @samp{%mm7}.
+
+@item
+the 8 SSE registers registers @samp{%xmm0}, @samp{%xmm1}, @samp{%xmm2},
+@samp{%xmm3}, @samp{%xmm4}, @samp{%xmm5}, @samp{%xmm6} and @samp{%xmm7}.
+@end itemize
+
+The AMD x86-64 architecture extends the register set by:
+
+@itemize @bullet
+@item
+enhancing the 8 32-bit registers to 64-bit: @samp{%rax} (the
+accumulator), @samp{%rbx}, @samp{%rcx}, @samp{%rdx}, @samp{%rdi},
+@samp{%rsi}, @samp{%rbp} (the frame pointer), @samp{%rsp} (the stack
+pointer)
+
+@item
+the 8 extended registers @samp{%r8}--@samp{%r15}.
+
+@item
+the 8 32-bit low ends of the extended registers: @samp{%r8d}--@samp{%r15d}
+
+@item
+the 8 16-bit low ends of the extended registers: @samp{%r8w}--@samp{%r15w}
+
+@item
+the 8 8-bit low ends of the extended registers: @samp{%r8b}--@samp{%r15b}
+
+@item
+the 4 8-bit registers: @samp{%sil}, @samp{%dil}, @samp{%bpl}, @samp{%spl}.
+
+@item
+the 8 debug registers: @samp{%db8}--@samp{%db15}.
+
+@item
+the 8 SSE registers: @samp{%xmm8}--@samp{%xmm15}.
 @end itemize
 
 @node i386-Prefixes
@@ -270,6 +388,20 @@ complete the current instruction.  This should never be needed for the
 The @samp{rep}, @samp{repe}, and @samp{repne} prefixes are added
 to string instructions to make them repeat @samp{%ecx} times (@samp{%cx}
 times if the current address size is 16-bits).
+@cindex REX prefixes, i386
+@item
+The @samp{rex} family of prefixes is used by x86-64 to encode
+extensions to i386 instruction set.  The @samp{rex} prefix has four
+bits --- an operand size overwrite (@code{64}) used to change operand size
+from 32-bit to 64-bit and X, Y and Z extensions bits used to extend the
+register set.
+
+You may write the @samp{rex} prefixes directly. The @samp{rex64xyz}
+instruction emits @samp{rex} prefix with all the bits set.  By omitting
+the @code{64}, @code{x}, @code{y} or @code{z} you may write other
+prefixes as well.  Normally, there is no need to write the prefixes
+explicitly, since gas will automatically generate them based on the
+instruction operands.
 @end itemize
 
 @node i386-Memory
@@ -277,6 +409,8 @@ times if the current address size is 16-bits).
 
 @cindex i386 memory references
 @cindex memory references, i386
+@cindex x86-64 memory references
+@cindex memory references, x86-64
 An Intel syntax indirect memory reference of the form
 
 @smallexample
@@ -333,14 +467,34 @@ prefixed with @samp{*}.  If no @samp{*} is specified, @code{@value{AS}}
 always chooses PC relative addressing for jump/call labels.
 
 Any instruction that has a memory operand, but no register operand,
-@emph{must} specify its size (byte, word, or long) with an instruction
-mnemonic suffix (@samp{b}, @samp{w}, or @samp{l}, respectively).
+@emph{must} specify its size (byte, word, long, or quadruple) with an
+instruction mnemonic suffix (@samp{b}, @samp{w}, @samp{l} or @samp{q},
+respectively).
+
+The x86-64 architecture adds an RIP (instruction pointer relative)
+addressing.  This addressing mode is specified by using @samp{rip} as a
+base register.  Only constant offsets are valid. For example:
+
+@table @asis
+@item AT&T: @samp{1234(%rip)}, Intel: @samp{[rip + 1234]}
+Points to the address 1234 bytes past the end of the current
+instruction.
+
+@item AT&T: @samp{symbol(%rip)}, Intel: @samp{[rip + symbol]}
+Points to the @code{symbol} in RIP relative way, this is shorter than
+the default absolute addressing.
+@end table
+
+Other addressing modes remain unchanged in x86-64 architecture, except
+registers used are 64-bit instead of 32-bit.
 
 @node i386-jumps
 @section Handling of Jump Instructions
 
 @cindex jump optimization, i386
 @cindex i386 jump optimization
+@cindex jump optimization, x86-64
+@cindex x86-64 jump optimization
 Jump instructions are always optimized to use the smallest possible
 displacements.  This is accomplished by using byte (8-bit) displacement
 jumps whenever the target is sufficiently close.  If a byte displacement
@@ -369,6 +523,8 @@ cx_nonzero:
 
 @cindex i386 floating point
 @cindex floating point, i386
+@cindex x86-64 floating point
+@cindex floating point, x86-64
 All 80387 floating point types except packed BCD are supported.
 (BCD support may be added without much difficulty).  These data
 types are 16-, 32-, and 64- bit integers, and single (32-bit),
@@ -381,6 +537,10 @@ data type.  Constructors build these data types into memory.
 @cindex @code{single} directive, i386
 @cindex @code{double} directive, i386
 @cindex @code{tfloat} directive, i386
+@cindex @code{float} directive, x86-64
+@cindex @code{single} directive, x86-64
+@cindex @code{double} directive, x86-64
+@cindex @code{tfloat} directive, x86-64
 @itemize @bullet
 @item
 Floating point constructors are @samp{.float} or @samp{.single},
@@ -394,6 +554,10 @@ top) and @samp{fstpt} (store 80-bit real and pop stack) instructions.
 @cindex @code{long} directive, i386
 @cindex @code{int} directive, i386
 @cindex @code{quad} directive, i386
+@cindex @code{word} directive, x86-64
+@cindex @code{long} directive, x86-64
+@cindex @code{int} directive, x86-64
+@cindex @code{quad} directive, x86-64
 @item
 Integer constructors are @samp{.word}, @samp{.long} or @samp{.int}, and
 @samp{.quad} for the 16-, 32-, and 64-bit integer formats.  The
@@ -417,6 +581,9 @@ then stores the result in the 4 byte location @samp{mem})
 @cindex MMX, i386
 @cindex 3DNow!, i386
 @cindex SIMD, i386
+@cindex MMX, x86-64
+@cindex 3DNow!, x86-64
+@cindex SIMD, x86-64
 
 @code{@value{AS}} supports Intel's MMX instruction set (SIMD
 instructions for integer data), available on Intel's Pentium MMX
@@ -446,7 +613,10 @@ instructions is reversed from the Intel syntax.
 @cindex @code{code16gcc} directive, i386
 @cindex @code{code16} directive, i386
 @cindex @code{code32} directive, i386
-While @code{@value{AS}} normally writes only ``pure'' 32-bit i386 code,
+@cindex @code{code64} directive, i386
+@cindex @code{code64} directive, x86-64
+While @code{@value{AS}} normally writes only ``pure'' 32-bit i386 code
+or 64-bit x86-64 code depending on the default configuration,
 it also supports writing code to run in real mode or in 16-bit protected
 mode code segments.  To do this, put a @samp{.code16} or
 @samp{.code16gcc} directive before the assembly language instructions to
@@ -506,14 +676,44 @@ non-commutative arithmetic floating point operations with two register
 operands where the source register is @samp{%st} and the destination
 register is @samp{%st(i)}.
 
+@node i386-Arch
+@section Specifying CPU Architecture
+
+@cindex arch directive, i386
+@cindex i386 arch directive
+@cindex arch directive, x86-64
+@cindex x86-64 arch directive
+
+@code{@value{AS}} may be told to assemble for a particular CPU
+architecture with the @code{.arch @var{cpu_type}} directive.  This
+directive enables a warning when gas detects an instruction that is not
+supported on the CPU specified.  The choices for @var{cpu_type} are:
+
+@multitable @columnfractions .20 .20 .20 .20
+@item @samp{i8086} @tab @samp{i186} @tab @samp{i286} @tab @samp{i386}
+@item @samp{i486} @tab @samp{i586} @tab @samp{i686} @tab @samp{pentium}
+@item @samp{pentiumpro} @tab @samp{pentium4} @tab @samp{k6} @tab @samp{athlon}
+@item @samp{sledgehammer}
+@end multitable
+
+Apart from the warning, there is only one other effect on
+@code{@value{AS}} operation;  If you specify a CPU other than
+@samp{i486}, then shift by one instructions such as @samp{sarl $1, %eax}
+will automatically use a two byte opcode sequence.  The larger three
+byte opcode sequence is used on the 486 (and when no architecture is
+specified) because it executes faster on the 486.  Note that you can
+explicitly request the two byte opcode by writing @samp{sarl %eax}.
+
 @node i386-Notes
 @section Notes
 
 @cindex i386 @code{mul}, @code{imul} instructions
 @cindex @code{mul} instruction, i386
 @cindex @code{imul} instruction, i386
+@cindex @code{mul} instruction, x86-64
+@cindex @code{imul} instruction, x86-64
 There is some trickery concerning the @samp{mul} and @samp{imul}
-instructions that deserves mention.  The 16-, 32-, and 64-bit expanding
+instructions that deserves mention.  The 16-, 32-, 64- and 128-bit expanding
 multiplies (base opcode @samp{0xf6}; extension 4 for @samp{mul} and 5
 for @samp{imul}) can be output only in the one operand form.  Thus,
 @samp{imul %ebx, %eax} does @emph{not} select the expanding multiply;
diff --git a/contrib/binutils/gas/doc/gasp.texi b/contrib/binutils/gas/doc/gasp.texi
index 64cd6f4..e023edc 100644
--- a/contrib/binutils/gas/doc/gasp.texi
+++ b/contrib/binutils/gas/doc/gasp.texi
@@ -3,10 +3,14 @@
 @c
 @c This file documents the assembly preprocessor "GASP"
 @c
-@c Copyright (c) 1994 Free Software Foundation, Inc.
+@c Copyright (c) 1994, 2000 Free Software Foundation, Inc.
 @c
-@c This text may be freely distributed under the terms of the GNU
-@c General Public License.
+@c    Permission is granted to copy, distribute and/or modify this document
+@c    under the terms of the GNU Free Documentation License, Version 1.1
+@c    or any later version published by the Free Software Foundation;
+@c    with no Invariant Sections, with no Front-Cover Texts, and with no
+@c    Back-Cover Texts.  A copy of the license is included in the
+@c    section entitled "GNU Free Documentation License".
 
 @ifinfo
 @format
@@ -37,27 +41,19 @@ END-INFO-DIR-ENTRY
 @end tex
 
 @vskip 0pt plus 1filll
-Copyright @copyright{} 1994, 1995 Free Software Foundation, Inc.
+Copyright @copyright{} 1994, 1995, 2000 Free Software Foundation, Inc.
 
-Permission is granted to make and distribute verbatim copies of
-this manual provided the copyright notice and this permission notice
-are preserved on all copies.
+      Permission is granted to copy, distribute and/or modify this document
+      under the terms of the GNU Free Documentation License, Version 1.1
+      or any later version published by the Free Software Foundation;
+      with no Invariant Sections, with no Front-Cover Texts, and with no
+      Back-Cover Texts.  A copy of the license is included in the
+      section entitled "GNU Free Documentation License".
 
-Permission is granted to copy and distribute modified versions of this
-manual under the conditions for verbatim copying, provided also that
-the entire resulting derived work is distributed under the terms of a
-permission notice identical to this one.
-
-Permission is granted to copy and distribute translations of this manual
-into another language, under the above conditions for modified versions.
 @end titlepage
 
 @ifinfo
-Copyright @copyright{} 1994, 1995 Free Software Foundation, Inc.
-
-Permission is granted to make and distribute verbatim copies of
-this manual provided the copyright notice and this permission notice
-are preserved on all copies.
+Copyright @copyright{} 1994, 1995, 2000 Free Software Foundation, Inc.
 
 @ignore
 Permission is granted to process this file through TeX and print the
@@ -66,13 +62,13 @@ notice identical to this one except for the removal of this paragraph
 (this paragraph not being relevant to the printed manual).
 @end ignore
 
-Permission is granted to copy and distribute modified versions of this
-manual under the conditions for verbatim copying, provided also that
-the entire resulting derived work is distributed under the terms of a
-permission notice identical to this one.
+      Permission is granted to copy, distribute and/or modify this document
+      under the terms of the GNU Free Documentation License, Version 1.1
+      or any later version published by the Free Software Foundation;
+      with no Invariant Sections, with no Front-Cover Texts, and with no
+      Back-Cover Texts.  A copy of the license is included in the
+      section entitled "GNU Free Documentation License".
 
-Permission is granted to copy and distribute translations of this manual
-into another language, under the above conditions for modified versions.
 
 @node Top
 @top GASP
@@ -87,6 +83,7 @@ Steve Chamberlain wrote GASP; Roland Pesch wrote this manual.
 * Overview::                    What is GASP?
 * Invoking GASP::               Command line options.
 * Commands::                    Preprocessor commands.
+* GNU Free Documentation License::  GNU Free Documentation License
 * Index::                       Index.
 @end menu
 @end ifinfo
@@ -1077,6 +1074,369 @@ You can write @samp{%@var{expr}} to evaluate the expression @var{expr}
 and use the result as a string.  
 @end table
 
+@node GNU Free Documentation License
+@chapter GNU Free Documentation License
+
+                GNU Free Documentation License
+                
+                   Version 1.1, March 2000
+
+ Copyright (C) 2000  Free Software Foundation, Inc.
+  59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+     
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+0. PREAMBLE
+
+The purpose of this License is to make a manual, textbook, or other
+written document "free" in the sense of freedom: to assure everyone
+the effective freedom to copy and redistribute it, with or without
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+credit for their work, while not being considered responsible for
+modifications made by others.
+
+This License is a kind of "copyleft", which means that derivative
+works of the document must themselves be free in the same sense.  It
+complements the GNU General Public License, which is a copyleft
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+
+We have designed this License in order to use it for manuals for free
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+program should come with manuals providing the same freedoms that the
+software does.  But this License is not limited to software manuals;
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+1. APPLICABILITY AND DEFINITIONS
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+This License applies to any manual or other work that contains a
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+under the terms of this License.  The "Document", below, refers to any
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+5. COMBINING DOCUMENTS
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+7. AGGREGATION WITH INDEPENDENT WORKS
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+8. TRANSLATION
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+original versions of these Invariant Sections.  You may include a
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+
+You may not copy, modify, sublicense, or distribute the Document except
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+copy, modify, sublicense or distribute the Document is void, and will
+automatically terminate your rights under this License.  However,
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+
+10. FUTURE REVISIONS OF THIS LICENSE
+
+The Free Software Foundation may publish new, revised versions
+of the GNU Free Documentation License from time to time.  Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.  See
+http://www.gnu.org/copyleft/.
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+of any later version that has been published (not as a draft) by the
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+number of this License, you may choose any version ever published (not
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+
+ADDENDUM: How to use this License for your documents
+
+To use this License in a document you have written, include a copy of
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+license notices just after the title page:
+
+@smallexample
+    Copyright (c)  YEAR  YOUR NAME.
+    Permission is granted to copy, distribute and/or modify this document
+    under the terms of the GNU Free Documentation License, Version 1.1
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+    Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST.
+    A copy of the license is included in the section entitled "GNU
+    Free Documentation License".
+@end smallexample
+
+If you have no Invariant Sections, write "with no Invariant Sections"
+instead of saying which ones are invariant.  If you have no
+Front-Cover Texts, write "no Front-Cover Texts" instead of
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+If your document contains nontrivial examples of program code, we
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+to permit their use in free software.
+
 @node Index
 @unnumbered Index
 
diff --git a/contrib/binutils/gas/doc/internals.texi b/contrib/binutils/gas/doc/internals.texi
index 8453c48..a42bc0f 100644
--- a/contrib/binutils/gas/doc/internals.texi
+++ b/contrib/binutils/gas/doc/internals.texi
@@ -8,8 +8,7 @@
 This chapter describes the internals of the assembler.  It is incomplete, but
 it may help a bit.
 
-This chapter was last modified on $Date: 2000/03/26 14:47:33 $.  It is not updated regularly, and it
-may be out of date.
+This chapter is not updated regularly, and it may be out of date.
 
 @menu
 * GAS versions::        GAS versions
@@ -464,7 +463,7 @@ the other fields; see the definition in @file{expr.h} for the possibilities.
 
 An @code{operatorT} value of @code{O_big} indicates either a floating point
 number, stored in the global variable @code{generic_floating_point_number}, or
-an integer to large to store in an @code{offsetT} type, stored in the global
+an integer too large to store in an @code{offsetT} type, stored in the global
 array @code{generic_bignum}.  This rather inflexible approach makes it
 impossible to use floating point numbers or large expressions in complex
 expressions.
@@ -645,7 +644,7 @@ The variable characters are to be repeated @code{fr_offset} times.  If
 have this type.
 
 @item rs_leb128
-This state is used to implement the DWARF ``little endian base 128'' 
+This state is used to implement the DWARF ``little endian base 128''
 variable length number format.  The @code{fr_symbol} is always an expression
 symbol, as constant expressions are emitted directly.  The @code{fr_offset}
 field is used during relaxation to hold the previous size of the number so
@@ -774,6 +773,12 @@ variable.  Normally the default value of @samp{generic} is fine.  The
 configuration process will create a file named @file{targ-env.h} in the build
 directory which includes @file{te-@var{em}.h}.
 
+There is a special case for COFF. For historical reason, the GNU COFF
+assembler doesn't follow the documented behavior on certain debug symbols for
+the compatibility with other COFF assemblers. A port can define
+@code{STRICTCOFF} in the configure script to make the GNU COFF assembler
+to follow the documented behavior.
+
 Porting GAS to a new CPU requires writing the @file{tc-@var{CPU}} files.
 Porting GAS to a new object file format requires writing the
 @file{obj-@var{fmt}} files.  There is sometimes some interaction between these
@@ -884,7 +889,7 @@ pseudo-ops which are specific to the CPU.
 If this macro is defined, GAS will call it with a @code{pseudo_typeS} argument.
 It should return non-zero if the pseudo-op is a conditional which controls
 whether code is assembled, such as @samp{.if}.  GAS knows about the normal
-conditional pseudo-ops,and you should normally not have to define this macro.
+conditional pseudo-ops, and you should normally not have to define this macro.
 
 @item comment_chars
 @cindex comment_chars
@@ -913,7 +918,7 @@ comment when they appear at the start of a line.
 @item line_separator_chars
 @cindex line_separator_chars
 This is a null terminated @code{const char} array of characters which separate
-lines (semicolon and newline are such characters by default, and need not be
+lines (null and newline are such characters by default, and need not be
 listed in this array).  Note that line_separator_chars do not separate lines
 if found in a comment, such as after a character in line_comment_chars or
 comment_chars.
@@ -965,7 +970,7 @@ default value is @code{LEX_NAME | LEX_BEGIN_NAME}.
 @item NUMBERS_WITH_SUFFIX
 @cindex NUMBERS_WITH_SUFFIX
 When this macro is defined to be non-zero, the parser allows the radix of a
-constant to be indicated with a suffix.  Valid suffixes are binary (B), 
+constant to be indicated with a suffix.  Valid suffixes are binary (B),
 octal (Q), and hexadecimal (H).  Case is not significant.
 
 @item SINGLE_QUOTE_STRINGS
@@ -992,6 +997,7 @@ If you define this macro, GAS will assume that any text at the start of a line
 is a label, even if it does not have a colon.
 
 @item TC_START_LABEL
+@itemx TC_START_LABEL_WITHOUT_COLON
 @cindex TC_START_LABEL
 You may define this macro to control what GAS considers to be a label.  The
 default definition is to accept any name followed by a colon character.
@@ -999,7 +1005,7 @@ default definition is to accept any name followed by a colon character.
 @item TC_START_LABEL_WITHOUT_COLON
 @cindex TC_START_LABEL_WITHOUT_COLON
 Same as TC_START_LABEL, but should be used instead of TC_START_LABEL when
-LABELS_WITHOUT_COLONS is defined. 
+LABELS_WITHOUT_COLONS is defined.
 
 @item NO_PSEUDO_DOT
 @cindex NO_PSEUDO_DOT
@@ -1133,11 +1139,13 @@ relocation entry.
 @itemx md_long_jump_size
 @itemx md_create_short_jump
 @itemx md_create_long_jump
+@itemx TC_CHECK_ADJUSTED_BROKEN_DOT_WORD
 @cindex WORKING_DOT_WORD
 @cindex md_short_jump_size
 @cindex md_long_jump_size
 @cindex md_create_short_jump
 @cindex md_create_long_jump
+@cindex TC_CHECK_ADJUSTED_BROKEN_DOT_WORD
 If @code{WORKING_DOT_WORD} is defined, GAS will not do broken word processing
 (@pxref{Broken words}).  Otherwise, you should set @code{md_short_jump_size} to
 the size of a short jump (a jump that is just long enough to jump around a
@@ -1145,6 +1153,10 @@ number of long jumps) and @code{md_long_jump_size} to the size of a long jump
 (a jump that can go anywhere in the function).  You should define
 @code{md_create_short_jump} to create a short jump around a number of long
 jumps, and define @code{md_create_long_jump} to create a long jump.
+If defined, the macro TC_CHECK_ADJUSTED_BROKEN_DOT_WORD will be called for each
+adjusted word just before the word is output.  The macro takes two arguments,
+an @code{addressT} with the adjusted word and a pointer to the current
+@code{struct broken_word}.
 
 @item md_estimate_size_before_relax
 @cindex md_estimate_size_before_relax
@@ -1177,6 +1189,15 @@ If you define this macro, and the global variable @samp{linkrelax} is set
 @samp{.align} directive will cause extra space to be allocated.  The linker can
 then discard this space when relaxing the section.
 
+@item TC_LINKRELAX_FIXUP (@var{segT})
+@cindex TC_LINKRELAX_FIXUP
+If defined, this macro allows control over whether fixups for a
+given section will be processed when the @var{linkrelax} variable is
+set.  The macro is given the N_TYPE bits for the section in its
+@var{segT} argument.  If the macro evaluates to a non-zero value
+then the fixups will be converted into relocs, otherwise they will
+be passed to @var{md_apply_fix3} as normal.
+
 @item md_convert_frag
 @cindex md_convert_frag
 GAS will call this for each rs_machine_dependent fragment.
@@ -1251,7 +1272,7 @@ size.
 @cindex md_macro_start
 If defined, GAS will call this macro when it starts to include a macro
 expansion.  @code{macro_nest} indicates the current macro nesting level, which
-includes the one being expanded. 
+includes the one being expanded.
 
 @item md_macro_info
 @cindex md_macro_info
@@ -1263,7 +1284,7 @@ macro (macro_entry *), which includes expansion of the formal arguments.
 @item md_macro_end
 @cindex md_macro_end
 Complement to md_macro_start.  If defined, it is called when finished
-processing an inserted macro expansion, just before decrementing macro_nest. 
+processing an inserted macro expansion, just before decrementing macro_nest.
 
 @item DOUBLEBAR_PARALLEL
 @cindex DOUBLEBAR_PARALLEL
@@ -1332,6 +1353,13 @@ source line.  The default value is 4.
 @item LISTING_RHS_WIDTH
 The maximum number of characters to print from one line of the input file.  The
 default value is 100.
+
+@item TC_COFF_SECTION_DEFAULT_ATTRIBUTES
+@cindex TC_COFF_SECTION_DEFAULT_ATTRIBUTES
+The COFF @code{.section} directive will use the value of this macro to set
+a new section's attributes when a directive has no valid flags or when the
+flag is @code{w}. The default value of the macro is @code{SEC_LOAD | SEC_DATA}.
+
 @end table
 
 @node Object format backend
@@ -1400,8 +1428,8 @@ generate a @code{.file} symbol if none was generated previously.
 
 @item SEPARATE_STAB_SECTIONS
 @cindex SEPARATE_STAB_SECTIONS
-You may define this macro to indicate that stabs should be placed in separate
-sections, as in ELF.
+You may define this macro to a nonzero value to indicate that stabs should be
+placed in separate sections, as in ELF.
 
 @item INIT_STAB_SECTION
 @cindex INIT_STAB_SECTION
@@ -1573,6 +1601,16 @@ called to convert the frag to an @code{rs_fill} frag with no variant part.
 Sometimes changing addressing modes may also require rewriting the instruction.
 It can be accessed via @code{fr_opcode} or @code{fr_fix}.
 
+If you generate frags separately for the basic insn opcode and any relaxable
+operands, do not call @code{fix_new} thinking you can emit fixups for the
+opcode field from the relaxable frag.  It is not garanteed to be the same frag.
+If you need to emit fixups for the opcode field from inspection of the
+relaxable frag, then you need to generate a common frag for both the basic
+opcode and relaxable fields, or you need to provide the frag for the opcode to
+pass to @code{fix_new}.  The latter can be done for example by defining
+@code{TC_FRAG_TYPE} to include a pointer to it and defining @code{TC_FRAG_INIT}
+to set the pointer.
+
 Sometimes @code{fr_var} is increased instead, and @code{frag_wane} is not
 called.  I'm not sure, but I think this is to keep @code{fr_fix} referring to
 an earlier byte, and @code{fr_subtype} set to @code{rs_machine_dependent} so