This commit was generated by cvs2svn to compensate for changes in r99461,

which included commits to RCS files with non-trunk default branches.

3 files changed, 55 insertions, 53 deletions

diff --git a/contrib/binutils/bfd/doc/archures.texi b/contrib/binutils/bfd/doc/archures.texi
index dcdaff9..eb4d180 100644
--- a/contrib/binutils/bfd/doc/archures.texi
+++ b/contrib/binutils/bfd/doc/archures.texi
@@ -225,8 +225,8 @@ enum bfd_architecture
 #define bfd_mach_avr5          5
   bfd_arch_cris,      /* Axis CRIS */
   bfd_arch_s390,      /* IBM s390 */
-#define bfd_mach_s390_esa      0
-#define bfd_mach_s390_esame    1
+#define bfd_mach_s390_31       0
+#define bfd_mach_s390_64       1
   bfd_arch_openrisc,  /* OpenRISC */
   bfd_arch_mmix,      /* Donald Knuth's educational processor.  */
   bfd_arch_xstormy16,
@@ -253,7 +253,9 @@ typedef struct bfd_arch_info
   const char *arch_name;
   const char *printable_name;
   unsigned int section_align_power;
-  /* True if this is the default machine for the architecture.  */
+  /* True if this is the default machine for the architecture.
+     The default arch should be the first entry for an arch so that
+     all the entries for that arch can be accessed via @code{next}.  */
   boolean the_default;
   const struct bfd_arch_info * (*compatible)
        PARAMS ((const struct bfd_arch_info *a,
diff --git a/contrib/binutils/bfd/doc/libbfd.texi b/contrib/binutils/bfd/doc/libbfd.texi
index 0c20a07..b28650f 100644
--- a/contrib/binutils/bfd/doc/libbfd.texi
+++ b/contrib/binutils/bfd/doc/libbfd.texi
@@ -10,7 +10,7 @@ completeness.
 @subsubsection @code{bfd_write_bigendian_4byte_int}
 @strong{Synopsis}
 @example
-void bfd_write_bigendian_4byte_int (bfd *, unsigned int);
+boolean bfd_write_bigendian_4byte_int (bfd *, unsigned int);
 @end example
 @strong{Description}@*
 Write a 4 byte integer @var{i} to the output BFD @var{abfd}, in big
diff --git a/contrib/binutils/bfd/doc/reloc.texi b/contrib/binutils/bfd/doc/reloc.texi
index 2b449d3..2f462fd 100644
--- a/contrib/binutils/bfd/doc/reloc.texi
+++ b/contrib/binutils/bfd/doc/reloc.texi
@@ -768,55 +768,6 @@ Relocation against a MIPS literal section.
 @deffnx {} BFD_RELOC_MIPS_REL16
 @deffnx {} BFD_RELOC_MIPS_RELGOT
 @deffnx {} BFD_RELOC_MIPS_JALR
-@deffnx {} BFD_RELOC_SH_GOT_LOW16
-@deffnx {} BFD_RELOC_SH_GOT_MEDLOW16
-@deffnx {} BFD_RELOC_SH_GOT_MEDHI16
-@deffnx {} BFD_RELOC_SH_GOT_HI16
-@deffnx {} BFD_RELOC_SH_GOTPLT_LOW16
-@deffnx {} BFD_RELOC_SH_GOTPLT_MEDLOW16
-@deffnx {} BFD_RELOC_SH_GOTPLT_MEDHI16
-@deffnx {} BFD_RELOC_SH_GOTPLT_HI16
-@deffnx {} BFD_RELOC_SH_PLT_LOW16
-@deffnx {} BFD_RELOC_SH_PLT_MEDLOW16
-@deffnx {} BFD_RELOC_SH_PLT_MEDHI16
-@deffnx {} BFD_RELOC_SH_PLT_HI16
-@deffnx {} BFD_RELOC_SH_GOTOFF_LOW16
-@deffnx {} BFD_RELOC_SH_GOTOFF_MEDLOW16
-@deffnx {} BFD_RELOC_SH_GOTOFF_MEDHI16
-@deffnx {} BFD_RELOC_SH_GOTOFF_HI16
-@deffnx {} BFD_RELOC_SH_GOTPC_LOW16
-@deffnx {} BFD_RELOC_SH_GOTPC_MEDLOW16
-@deffnx {} BFD_RELOC_SH_GOTPC_MEDHI16
-@deffnx {} BFD_RELOC_SH_GOTPC_HI16
-@deffnx {} BFD_RELOC_SH_COPY64
-@deffnx {} BFD_RELOC_SH_GLOB_DAT64
-@deffnx {} BFD_RELOC_SH_JMP_SLOT64
-@deffnx {} BFD_RELOC_SH_RELATIVE64
-@deffnx {} BFD_RELOC_SH_GOT10BY4
-@deffnx {} BFD_RELOC_SH_GOT10BY8
-@deffnx {} BFD_RELOC_SH_GOTPLT10BY4
-@deffnx {} BFD_RELOC_SH_GOTPLT10BY8
-@deffnx {} BFD_RELOC_SH_GOTPLT32
-@deffnx {} BFD_RELOC_SH_SHMEDIA_CODE
-@deffnx {} BFD_RELOC_SH_IMMU5
-@deffnx {} BFD_RELOC_SH_IMMS6
-@deffnx {} BFD_RELOC_SH_IMMS6BY32
-@deffnx {} BFD_RELOC_SH_IMMU6
-@deffnx {} BFD_RELOC_SH_IMMS10
-@deffnx {} BFD_RELOC_SH_IMMS10BY2
-@deffnx {} BFD_RELOC_SH_IMMS10BY4
-@deffnx {} BFD_RELOC_SH_IMMS10BY8
-@deffnx {} BFD_RELOC_SH_IMMS16
-@deffnx {} BFD_RELOC_SH_IMMU16
-@deffnx {} BFD_RELOC_SH_IMM_LOW16
-@deffnx {} BFD_RELOC_SH_IMM_LOW16_PCREL
-@deffnx {} BFD_RELOC_SH_IMM_MEDLOW16
-@deffnx {} BFD_RELOC_SH_IMM_MEDLOW16_PCREL
-@deffnx {} BFD_RELOC_SH_IMM_MEDHI16
-@deffnx {} BFD_RELOC_SH_IMM_MEDHI16_PCREL
-@deffnx {} BFD_RELOC_SH_IMM_HI16
-@deffnx {} BFD_RELOC_SH_IMM_HI16_PCREL
-@deffnx {} BFD_RELOC_SH_PT_16
 MIPS ELF relocations.
 @end deffn
 @deffn {} BFD_RELOC_386_GOT32
@@ -996,6 +947,55 @@ These relocs are only used within the ARM assembler.  They are not
 @deffnx {} BFD_RELOC_SH_JMP_SLOT
 @deffnx {} BFD_RELOC_SH_RELATIVE
 @deffnx {} BFD_RELOC_SH_GOTPC
+@deffnx {} BFD_RELOC_SH_GOT_LOW16
+@deffnx {} BFD_RELOC_SH_GOT_MEDLOW16
+@deffnx {} BFD_RELOC_SH_GOT_MEDHI16
+@deffnx {} BFD_RELOC_SH_GOT_HI16
+@deffnx {} BFD_RELOC_SH_GOTPLT_LOW16
+@deffnx {} BFD_RELOC_SH_GOTPLT_MEDLOW16
+@deffnx {} BFD_RELOC_SH_GOTPLT_MEDHI16
+@deffnx {} BFD_RELOC_SH_GOTPLT_HI16
+@deffnx {} BFD_RELOC_SH_PLT_LOW16
+@deffnx {} BFD_RELOC_SH_PLT_MEDLOW16
+@deffnx {} BFD_RELOC_SH_PLT_MEDHI16
+@deffnx {} BFD_RELOC_SH_PLT_HI16
+@deffnx {} BFD_RELOC_SH_GOTOFF_LOW16
+@deffnx {} BFD_RELOC_SH_GOTOFF_MEDLOW16
+@deffnx {} BFD_RELOC_SH_GOTOFF_MEDHI16
+@deffnx {} BFD_RELOC_SH_GOTOFF_HI16
+@deffnx {} BFD_RELOC_SH_GOTPC_LOW16
+@deffnx {} BFD_RELOC_SH_GOTPC_MEDLOW16
+@deffnx {} BFD_RELOC_SH_GOTPC_MEDHI16
+@deffnx {} BFD_RELOC_SH_GOTPC_HI16
+@deffnx {} BFD_RELOC_SH_COPY64
+@deffnx {} BFD_RELOC_SH_GLOB_DAT64
+@deffnx {} BFD_RELOC_SH_JMP_SLOT64
+@deffnx {} BFD_RELOC_SH_RELATIVE64
+@deffnx {} BFD_RELOC_SH_GOT10BY4
+@deffnx {} BFD_RELOC_SH_GOT10BY8
+@deffnx {} BFD_RELOC_SH_GOTPLT10BY4
+@deffnx {} BFD_RELOC_SH_GOTPLT10BY8
+@deffnx {} BFD_RELOC_SH_GOTPLT32
+@deffnx {} BFD_RELOC_SH_SHMEDIA_CODE
+@deffnx {} BFD_RELOC_SH_IMMU5
+@deffnx {} BFD_RELOC_SH_IMMS6
+@deffnx {} BFD_RELOC_SH_IMMS6BY32
+@deffnx {} BFD_RELOC_SH_IMMU6
+@deffnx {} BFD_RELOC_SH_IMMS10
+@deffnx {} BFD_RELOC_SH_IMMS10BY2
+@deffnx {} BFD_RELOC_SH_IMMS10BY4
+@deffnx {} BFD_RELOC_SH_IMMS10BY8
+@deffnx {} BFD_RELOC_SH_IMMS16
+@deffnx {} BFD_RELOC_SH_IMMU16
+@deffnx {} BFD_RELOC_SH_IMM_LOW16
+@deffnx {} BFD_RELOC_SH_IMM_LOW16_PCREL
+@deffnx {} BFD_RELOC_SH_IMM_MEDLOW16
+@deffnx {} BFD_RELOC_SH_IMM_MEDLOW16_PCREL
+@deffnx {} BFD_RELOC_SH_IMM_MEDHI16
+@deffnx {} BFD_RELOC_SH_IMM_MEDHI16_PCREL
+@deffnx {} BFD_RELOC_SH_IMM_HI16
+@deffnx {} BFD_RELOC_SH_IMM_HI16_PCREL
+@deffnx {} BFD_RELOC_SH_PT_16
 Hitachi SH relocs.  Not all of these appear in object files.
 @end deffn
 @deffn {} BFD_RELOC_THUMB_PCREL_BRANCH9