Update subversion-1.8.0 -> 1.8.1. Update supporting

components: apr-1.4.6 -> 1.4.8 and apr-util-1.4.1 -> 1.5.2.

This is a post point-zero bug-fix / fix-sharp-edges release, including
some workarounds for UTF-8 for people who haven't yet turned on WITH_ICONV.

3 files changed, 85 insertions, 85 deletions

diff --git a/contrib/apr/atomic/unix/ia32.c b/contrib/apr/atomic/unix/ia32.c
index 3826f92..63f48a7 100644
--- a/contrib/apr/atomic/unix/ia32.c
+++ b/contrib/apr/atomic/unix/ia32.c
@@ -117,7 +117,7 @@ APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem, void *with)
 #elif APR_SIZEOF_VOIDP == 8
     asm volatile ("xchgq %q2, %1"
                   : "=a" (prev), "+m" (*mem)
-                  : "r" ((unsigned long)with));
+                  : "0" (with));
 #else
 #error APR_SIZEOF_VOIDP value not supported
 #endif
diff --git a/contrib/apr/atomic/unix/ppc.c b/contrib/apr/atomic/unix/ppc.c
index db9fca9..ae8d503 100644
--- a/contrib/apr/atomic/unix/ppc.c
+++ b/contrib/apr/atomic/unix/ppc.c
@@ -19,7 +19,7 @@
 #ifdef USE_ATOMICS_PPC
 
 #ifdef PPC405_ERRATA
-#   define PPC405_ERR77_SYNC   "	sync\n"
+#   define PPC405_ERR77_SYNC   "    sync\n"
 #else
 #   define PPC405_ERR77_SYNC
 #endif
@@ -43,12 +43,12 @@ APR_DECLARE(apr_uint32_t) apr_atomic_add32(volatile apr_uint32_t *mem, apr_uint3
 {
     apr_uint32_t prev, temp;
 
-    asm volatile ("loop_%=:\n"                  /* lost reservation     */
-                  "	lwarx   %0,0,%3\n"      /* load and reserve     */
-                  "	add     %1,%0,%4\n"     /* add val and prev     */
-                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
-                  "	stwcx.  %1,0,%3\n"      /* store new value      */
-                  "	bne-    loop_%=\n"      /* loop if lost         */
+    asm volatile ("1:\n"                       /* lost reservation     */
+                  "    lwarx   %0,0,%3\n"      /* load and reserve     */
+                  "    add     %1,%0,%4\n"     /* add val and prev     */
+                  PPC405_ERR77_SYNC            /* ppc405 Erratum 77    */
+                  "    stwcx.  %1,0,%3\n"      /* store new value      */
+                  "    bne-    1b\n"           /* loop if lost         */
                   : "=&r" (prev), "=&r" (temp), "=m" (*mem)
                   : "b" (mem), "r" (val)
                   : "cc", "memory");
@@ -60,12 +60,12 @@ APR_DECLARE(void) apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val)
 {
     apr_uint32_t temp;
 
-    asm volatile ("loop_%=:\n"                  /* lost reservation     */
-                  "	lwarx   %0,0,%2\n"      /* load and reserve     */
-                  "	subf    %0,%3,%0\n"     /* subtract val         */
-                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
-                  "	stwcx.  %0,0,%2\n"      /* store new value      */
-                  "	bne-    loop_%=\n"      /* loop if lost         */
+    asm volatile ("1:\n"                       /* lost reservation     */
+                  "    lwarx   %0,0,%2\n"      /* load and reserve     */
+                  "    subf    %0,%3,%0\n"     /* subtract val         */
+                  PPC405_ERR77_SYNC            /* ppc405 Erratum 77    */
+                  "    stwcx.  %0,0,%2\n"      /* store new value      */
+                  "    bne-    1b\n"           /* loop if lost         */
                   : "=&r" (temp), "=m" (*mem)
                   : "b" (mem), "r" (val)
                   : "cc", "memory");
@@ -75,13 +75,13 @@ APR_DECLARE(apr_uint32_t) apr_atomic_inc32(volatile apr_uint32_t *mem)
 {
     apr_uint32_t prev;
 
-    asm volatile ("loop_%=:\n"                  /* lost reservation     */
-                  "	lwarx   %0,0,%2\n"      /* load and reserve     */
-                  "	addi    %0,%0,1\n"      /* add immediate        */
-                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
-                  "	stwcx.  %0,0,%2\n"      /* store new value      */
-                  "	bne-    loop_%=\n"      /* loop if lost         */
-                  "	subi    %0,%0,1\n"      /* return old value     */
+    asm volatile ("1:\n"                       /* lost reservation     */
+                  "    lwarx   %0,0,%2\n"      /* load and reserve     */
+                  "    addi    %0,%0,1\n"      /* add immediate        */
+                  PPC405_ERR77_SYNC            /* ppc405 Erratum 77    */
+                  "    stwcx.  %0,0,%2\n"      /* store new value      */
+                  "    bne-    1b\n"           /* loop if lost         */
+                  "    subi    %0,%0,1\n"      /* return old value     */
                   : "=&b" (prev), "=m" (*mem)
                   : "b" (mem), "m" (*mem)
                   : "cc", "memory");
@@ -93,12 +93,12 @@ APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
 {
     apr_uint32_t prev;
 
-    asm volatile ("loop_%=:\n"                  /* lost reservation     */
-                  "	lwarx   %0,0,%2\n"      /* load and reserve     */
-                  "	subi    %0,%0,1\n"      /* subtract immediate   */
-                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
-                  "	stwcx.  %0,0,%2\n"      /* store new value      */
-                  "	bne-    loop_%=\n"      /* loop if lost         */
+    asm volatile ("1:\n"                       /* lost reservation     */
+                  "    lwarx   %0,0,%2\n"      /* load and reserve     */
+                  "    subi    %0,%0,1\n"      /* subtract immediate   */
+                  PPC405_ERR77_SYNC            /* ppc405 Erratum 77    */
+                  "    stwcx.  %0,0,%2\n"      /* store new value      */
+                  "    bne-    1b\n"           /* loop if lost         */
                   : "=&b" (prev), "=m" (*mem)
                   : "b" (mem), "m" (*mem)
                   : "cc", "memory");
@@ -111,14 +111,14 @@ APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint3
 {
     apr_uint32_t prev;
 
-    asm volatile ("loop_%=:\n"                  /* lost reservation     */
-                  "	lwarx   %0,0,%1\n"      /* load and reserve     */
-                  "	cmpw    %0,%3\n"        /* compare operands     */
-                  "	bne-    exit_%=\n"      /* skip if not equal    */
-                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
-                  "	stwcx.  %2,0,%1\n"      /* store new value      */
-                  "	bne-    loop_%=\n"      /* loop if lost         */
-                  "exit_%=:\n"                  /* not equal            */
+    asm volatile ("1:\n"                       /* lost reservation     */
+                  "    lwarx   %0,0,%1\n"      /* load and reserve     */
+                  "    cmpw    %0,%3\n"        /* compare operands     */
+                  "    bne-    exit_%=\n"      /* skip if not equal    */
+                  PPC405_ERR77_SYNC            /* ppc405 Erratum 77    */
+                  "    stwcx.  %2,0,%1\n"      /* store new value      */
+                  "    bne-    1b\n"           /* loop if lost         */
+                  "exit_%=:\n"                 /* not equal            */
                   : "=&r" (prev)
                   : "b" (mem), "r" (with), "r" (cmp)
                   : "cc", "memory");
@@ -130,11 +130,11 @@ APR_DECLARE(apr_uint32_t) apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint
 {
     apr_uint32_t prev;
 
-    asm volatile ("loop_%=:\n"                  /* lost reservation     */
-                  "	lwarx   %0,0,%1\n"      /* load and reserve     */
-                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
-                  "	stwcx.  %2,0,%1\n"      /* store new value      */
-                  "	bne-    loop_%="        /* loop if lost         */
+    asm volatile ("1:\n"                       /* lost reservation     */
+                  "    lwarx   %0,0,%1\n"      /* load and reserve     */
+                  PPC405_ERR77_SYNC            /* ppc405 Erratum 77    */
+                  "    stwcx.  %2,0,%1\n"      /* store new value      */
+                  "    bne-    1b"             /* loop if lost         */
                   : "=&r" (prev)
                   : "b" (mem), "r" (val)
                   : "cc", "memory");
@@ -146,26 +146,26 @@ APR_DECLARE(void*) apr_atomic_casptr(volatile void **mem, void *with, const void
 {
     void *prev;
 #if APR_SIZEOF_VOIDP == 4
-    asm volatile ("loop_%=:\n"                  /* lost reservation     */
-                  "	lwarx   %0,0,%1\n"      /* load and reserve     */
-                  "	cmpw    %0,%3\n"        /* compare operands     */
-                  "	bne-    exit_%=\n"      /* skip if not equal    */
-                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
-                  "	stwcx.  %2,0,%1\n"      /* store new value      */
-                  "	bne-    loop_%=\n"      /* loop if lost         */
-                  "exit_%=:\n"                  /* not equal            */
+    asm volatile ("1:\n"                       /* lost reservation     */
+                  "    lwarx   %0,0,%1\n"      /* load and reserve     */
+                  "    cmpw    %0,%3\n"        /* compare operands     */
+                  "    bne-    2f\n"           /* skip if not equal    */
+                  PPC405_ERR77_SYNC            /* ppc405 Erratum 77    */
+                  "    stwcx.  %2,0,%1\n"      /* store new value      */
+                  "    bne-    1b\n"           /* loop if lost         */
+                  "2:\n"                       /* not equal            */
                   : "=&r" (prev)
                   : "b" (mem), "r" (with), "r" (cmp)
                   : "cc", "memory");
 #elif APR_SIZEOF_VOIDP == 8
-    asm volatile ("loop_%=:\n"                  /* lost reservation     */
-                  "	ldarx   %0,0,%1\n"      /* load and reserve     */
-                  "	cmpd    %0,%3\n"        /* compare operands     */
-                  "	bne-    exit_%=\n"      /* skip if not equal    */
-                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
-                  "	stdcx.  %2,0,%1\n"      /* store new value      */
-                  "	bne-    loop_%=\n"      /* loop if lost         */
-                  "exit_%=:\n"                  /* not equal            */
+    asm volatile ("1:\n"                       /* lost reservation     */
+                  "    ldarx   %0,0,%1\n"      /* load and reserve     */
+                  "    cmpd    %0,%3\n"        /* compare operands     */
+                  "    bne-    2f\n"           /* skip if not equal    */
+                  PPC405_ERR77_SYNC            /* ppc405 Erratum 77    */
+                  "    stdcx.  %2,0,%1\n"      /* store new value      */
+                  "    bne-    1b\n"           /* loop if lost         */
+                  "2:\n"                       /* not equal            */
                   : "=&r" (prev)
                   : "b" (mem), "r" (with), "r" (cmp)
                   : "cc", "memory");
@@ -179,22 +179,22 @@ APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem, void *with)
 {
     void *prev;
 #if APR_SIZEOF_VOIDP == 4
-    asm volatile ("loop_%=:\n"                  /* lost reservation     */
-                  "	lwarx   %0,0,%1\n"      /* load and reserve     */
-                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
-                  "	stwcx.  %2,0,%1\n"      /* store new value      */
-                  "	bne-    loop_%=\n"      /* loop if lost         */
-                  "	isync\n"                /* memory barrier       */
+    asm volatile ("1:\n"                       /* lost reservation     */
+                  "    lwarx   %0,0,%1\n"      /* load and reserve     */
+                  PPC405_ERR77_SYNC            /* ppc405 Erratum 77    */
+                  "    stwcx.  %2,0,%1\n"      /* store new value      */
+                  "    bne-    1b\n"           /* loop if lost         */
+                  "    isync\n"                /* memory barrier       */
                   : "=&r" (prev)
                   : "b" (mem), "r" (with)
                   : "cc", "memory");
 #elif APR_SIZEOF_VOIDP == 8
-    asm volatile ("loop_%=:\n"                  /* lost reservation     */
-                  "	ldarx   %0,0,%1\n"      /* load and reserve     */
-                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
-                  "	stdcx.  %2,0,%1\n"      /* store new value      */
-                  "	bne-    loop_%=\n"      /* loop if lost         */
-                  "	isync\n"                /* memory barrier       */
+    asm volatile ("1:\n"                       /* lost reservation     */
+                  "    ldarx   %0,0,%1\n"      /* load and reserve     */
+                  PPC405_ERR77_SYNC            /* ppc405 Erratum 77    */
+                  "    stdcx.  %2,0,%1\n"      /* store new value      */
+                  "    bne-    1b\n"           /* loop if lost         */
+                  "    isync\n"                /* memory barrier       */
                   : "=&r" (prev)
                   : "b" (mem), "r" (with)
                   : "cc", "memory");
diff --git a/contrib/apr/atomic/unix/s390.c b/contrib/apr/atomic/unix/s390.c
index 3e23320..b6b6f42 100644
--- a/contrib/apr/atomic/unix/s390.c
+++ b/contrib/apr/atomic/unix/s390.c
@@ -38,10 +38,10 @@ static APR_INLINE apr_uint32_t atomic_add(volatile apr_uint32_t *mem, apr_uint32
     apr_uint32_t prev = *mem, temp;
 
     asm volatile ("loop_%=:\n"
-                  "	lr  %1,%0\n"
-                  "	alr %1,%3\n"
-                  "	cs  %0,%1,%2\n"
-                  "	jl  loop_%=\n"
+                  "    lr  %1,%0\n"
+                  "    alr %1,%3\n"
+                  "    cs  %0,%1,%2\n"
+                  "    jl  loop_%=\n"
                   : "+d" (prev), "+d" (temp), "=Q" (*mem)
                   : "d" (val), "m" (*mem)
                   : "cc", "memory");
@@ -64,10 +64,10 @@ static APR_INLINE apr_uint32_t atomic_sub(volatile apr_uint32_t *mem, apr_uint32
     apr_uint32_t prev = *mem, temp;
 
     asm volatile ("loop_%=:\n"
-                  "	lr  %1,%0\n"
-                  "	slr %1,%3\n"
-                  "	cs  %0,%1,%2\n"
-                  "	jl  loop_%=\n"
+                  "    lr  %1,%0\n"
+                  "    slr %1,%3\n"
+                  "    cs  %0,%1,%2\n"
+                  "    jl  loop_%=\n"
                   : "+d" (prev), "+d" (temp), "=Q" (*mem)
                   : "d" (val), "m" (*mem)
                   : "cc", "memory");
@@ -88,7 +88,7 @@ APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
 APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint32_t with,
                                            apr_uint32_t cmp)
 {
-    asm volatile ("	cs  %0,%2,%1\n"
+    asm volatile ("    cs  %0,%2,%1\n"
                   : "+d" (cmp), "=Q" (*mem)
                   : "d" (with), "m" (*mem)
                   : "cc", "memory");
@@ -101,8 +101,8 @@ APR_DECLARE(apr_uint32_t) apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint
     apr_uint32_t prev = *mem;
 
     asm volatile ("loop_%=:\n"
-                  "	cs  %0,%2,%1\n"
-                  "	jl  loop_%=\n"
+                  "    cs  %0,%2,%1\n"
+                  "    jl  loop_%=\n"
                   : "+d" (prev), "=Q" (*mem)
                   : "d" (val), "m" (*mem)
                   : "cc", "memory");
@@ -114,12 +114,12 @@ APR_DECLARE(void*) apr_atomic_casptr(volatile void **mem, void *with, const void
 {
     void *prev = (void *) cmp;
 #if APR_SIZEOF_VOIDP == 4
-    asm volatile ("	cs  %0,%2,%1\n"
+    asm volatile ("    cs  %0,%2,%1\n"
                   : "+d" (prev), "=Q" (*mem)
                   : "d" (with), "m" (*mem)
                   : "cc", "memory");
 #elif APR_SIZEOF_VOIDP == 8
-    asm volatile ("	csg %0,%2,%1\n"
+    asm volatile ("    csg %0,%2,%1\n"
                   : "+d" (prev), "=Q" (*mem)
                   : "d" (with), "m" (*mem)
                   : "cc", "memory");
@@ -134,15 +134,15 @@ APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem, void *with)
     void *prev = (void *) *mem;
 #if APR_SIZEOF_VOIDP == 4
     asm volatile ("loop_%=:\n"
-                  "	cs  %0,%2,%1\n"
-                  "	jl  loop_%=\n"
+                  "    cs  %0,%2,%1\n"
+                  "    jl  loop_%=\n"
                   : "+d" (prev), "=Q" (*mem)
                   : "d" (with), "m" (*mem)
                   : "cc", "memory");
 #elif APR_SIZEOF_VOIDP == 8
     asm volatile ("loop_%=:\n"
-                  "	csg %0,%2,%1\n"
-                  "	jl  loop_%=\n"
+                  "    csg %0,%2,%1\n"
+                  "    jl  loop_%=\n"
                   : "+d" (prev), "=Q" (*mem)
                   : "d" (with), "m" (*mem)
                   : "cc", "memory");