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authoradrian <adrian@FreeBSD.org>2011-05-14 05:43:33 +0000
committeradrian <adrian@FreeBSD.org>2011-05-14 05:43:33 +0000
commitc3c15582fd9fd8090ba32903c221ff11efab1f49 (patch)
treeadf81c3a5489e8b16238277357143dc8a6feba7a
parent8366271eef9f85e00c66dcfd54384e940432136c (diff)
downloadFreeBSD-src-c3c15582fd9fd8090ba32903c221ff11efab1f49.zip
FreeBSD-src-c3c15582fd9fd8090ba32903c221ff11efab1f49.tar.gz
When disabling RIFS for Sowl (AR9160) and Howl (AR9130), make sure RIFS
is totally disabled. The Atheros HAL code does this for Sowl/Howl but not for Owl (AR5416) where RIFS is disabled by default. This seems to quieten the occasional baseband hang I've been seeing with the AR9160 in STA mode under constant heavy traffic load. Obtained from: Atheros
-rw-r--r--sys/dev/ath/ath_hal/ar5416/ar5416.h3
-rw-r--r--sys/dev/ath/ath_hal/ar5416/ar5416_misc.c36
-rw-r--r--sys/dev/ath/ath_hal/ar5416/ar5416_reset.c2
-rw-r--r--sys/dev/ath/ath_hal/ar5416/ar5416phy.h2
4 files changed, 40 insertions, 3 deletions
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416.h b/sys/dev/ath/ath_hal/ar5416/ar5416.h
index 14ad03c..5327296 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416.h
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416.h
@@ -199,7 +199,8 @@ extern HAL_STATUS ar5416GetCapability(struct ath_hal *ah,
extern HAL_BOOL ar5416GetDiagState(struct ath_hal *ah, int request,
const void *args, uint32_t argsize,
void **result, uint32_t *resultsize);
-extern HAL_BOOL ar5416SetRifsDelay(struct ath_hal *ah, HAL_BOOL enable);
+extern HAL_BOOL ar5416SetRifsDelay(struct ath_hal *ah,
+ const struct ieee80211_channel *chan, HAL_BOOL enable);
extern HAL_BOOL ar5416SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode,
int setChip);
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_misc.c b/sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
index 3ed44c7..8f18c46 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
@@ -367,9 +367,18 @@ typedef struct {
} hal_mac_hang_check_t;
HAL_BOOL
-ar5416SetRifsDelay(struct ath_hal *ah, HAL_BOOL enable)
+ar5416SetRifsDelay(struct ath_hal *ah, const struct ieee80211_channel *chan,
+ HAL_BOOL enable)
{
uint32_t val;
+ HAL_BOOL is_chan_2g = AH_FALSE;
+ HAL_BOOL is_ht40 = AH_FALSE;
+
+ if (chan)
+ is_chan_2g = IEEE80211_IS_CHAN_2GHZ(chan);
+
+ if (chan)
+ is_ht40 = IEEE80211_IS_CHAN_HT40(chan);
/* Only support disabling RIFS delay for now */
HALASSERT(enable == AH_FALSE);
@@ -382,6 +391,31 @@ ar5416SetRifsDelay(struct ath_hal *ah, HAL_BOOL enable)
val &= ~AR_PHY_RIFS_INIT_DELAY;
OS_REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val);
+ /*
+ * For Owl, RIFS RX parameters are controlled differently;
+ * it isn't enabled in the inivals by default.
+ *
+ * For Sowl/Howl, RIFS RX is enabled in the inivals by default;
+ * the following code sets them back to non-RIFS values.
+ *
+ * For > Sowl/Howl, RIFS RX can be left on by default and so
+ * this function shouldn't be called.
+ */
+ if ((! AR_SREV_SOWL(ah)) && (! AR_SREV_HOWL(ah)))
+ return AH_TRUE;
+
+ /* Reset search delay to default values */
+ if (is_chan_2g)
+ if (is_ht40)
+ OS_REG_WRITE(ah, AR_PHY_SEARCH_START_DELAY, 0x268);
+ else
+ OS_REG_WRITE(ah, AR_PHY_SEARCH_START_DELAY, 0x134);
+ else
+ if (is_ht40)
+ OS_REG_WRITE(ah, AR_PHY_SEARCH_START_DELAY, 0x370);
+ else
+ OS_REG_WRITE(ah, AR_PHY_SEARCH_START_DELAY, 0x1b8);
+
return AH_TRUE;
}
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
index 22f7698..e45a829 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
@@ -2591,7 +2591,7 @@ ar5416OverrideIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
* hang issues.
*/
if (AR_SREV_HOWL(ah) || AR_SREV_SOWL(ah))
- (void) ar5416SetRifsDelay(ah, AH_FALSE);
+ (void) ar5416SetRifsDelay(ah, chan, AH_FALSE);
if (!AR_SREV_5416_V20_OR_LATER(ah) || AR_SREV_MERLIN(ah))
return;
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416phy.h b/sys/dev/ath/ath_hal/ar5416/ar5416phy.h
index fc02886..86643f0 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416phy.h
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416phy.h
@@ -93,6 +93,8 @@
#define AR9280_PHY_RXGAIN_TXRX_MARGIN 0x001FC000
#define AR9280_PHY_RXGAIN_TXRX_MARGIN_S 14
+#define AR_PHY_SEARCH_START_DELAY 0x9918 /* search start delay */
+
#define AR_PHY_EXT_CCA 0x99bc
#define AR_PHY_EXT_CCA_CYCPWR_THR1 0x0000FE00
#define AR_PHY_EXT_CCA_CYCPWR_THR1_S 9
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